test/CodeGen/RISCV/double-frem.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefix=RV32ID %s

define double @frem_f64(double %a, double %b) nounwind {
; RV32ID-LABEL: frem_f64:
; RV32ID:       # %bb.0:
; RV32ID-NEXT:    addi sp, sp, -16
; RV32ID-NEXT:    sw ra, 12(sp)
; RV32ID-NEXT:    call fmod
; RV32ID-NEXT:    lw ra, 12(sp)
; RV32ID-NEXT:    addi sp, sp, 16
; RV32ID-NEXT:    ret
  %1 = frem double %a, %b
  ret double %1
}