)]}' { "commit": "cc532a593e04874bcada3fa45a6db893f2606800", "tree": "f5f1cd7a60ace31e9340f9173a5cc4154e282586", "parents": [ "a83ee713941c9af19656550f9169df10a995859e" ], "author": { "name": "David Green", "email": "david.green@arm.com", "time": "Sun Apr 21 09:54:29 2019 +0000" }, "committer": { "name": "David Green", "email": "david.green@arm.com", "time": "Sun Apr 21 09:54:29 2019 +0000" }, "message": "[ARM] Rewrite isLegalT2AddressImmediate\n\nThis does two main things, firstly adding some at least basic addressing modes\nfor i64 types, and secondly treats floats and doubles sensibly when there is no\nfpu. The floating point change can help codesize in some cases, especially with\nD60294.\n\nMost backends seems to not consider the exact VT in isLegalAddressingMode,\ninstead switching on type size. That is now what this does when the target does\nnot have an fpu (as the float data will be loaded using LDR\u0027s). i64\u0027s currently\nuse the address range of an LDRD (even though they may be legalised and loaded\nwith an LDR). This is at least better than marking them all as illegal\naddressing modes.\n\nI have not attempted to do much with vectors yet. That will need changing once\nMVE is added.\n\nDifferential Revision: https://reviews.llvm.org/D60677\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358845 91177308-0d34-0410-b5e6-96231b3b80d8\n", "tree_diff": [ { "type": "modify", "old_id": "0281d68fcfd40b723d15b1783cacd016a0465e2c", "old_mode": 33188, "old_path": "lib/Target/ARM/ARMISelLowering.cpp", "new_id": "8a9792c8ee185356e2726b15ec7d86ee4d748f71", "new_mode": 33188, "new_path": "lib/Target/ARM/ARMISelLowering.cpp" }, { "type": "modify", "old_id": "12e314e24073d64e3396995637f16706702b3c88", "old_mode": 33188, "old_path": "test/Analysis/CostModel/ARM/gep.ll", "new_id": "333b41dd418453c3db9638b37cc9bc3129551e90", "new_mode": 33188, "new_path": "test/Analysis/CostModel/ARM/gep.ll" } ] }