test/CodeGen/AMDGPU/GlobalISel/legalize-fconstant.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI  %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s

---
name: test_fconstant_s32
body: |
  bb.0:

    ; SI-LABEL: name: test_fconstant_s32
    ; SI: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
    ; SI: $vgpr0 = COPY [[C]](s32)
    ; VI-LABEL: name: test_fconstant_s32
    ; VI: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
    ; VI: $vgpr0 = COPY [[C]](s32)
    %0:_(s32) = G_FCONSTANT float 1.0
    $vgpr0 = COPY %0
...
---
name: test_fconstant_s64
body: |
  bb.0:

    ; SI-LABEL: name: test_fconstant_s64
    ; SI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
    ; SI: $vgpr0_vgpr1 = COPY [[C]](s64)
    ; VI-LABEL: name: test_fconstant_s64
    ; VI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
    ; VI: $vgpr0_vgpr1 = COPY [[C]](s64)
    %0:_(s64) = G_FCONSTANT double 1.0
    $vgpr0_vgpr1 = COPY %0
...

---
name: test_fconstant_s16
body: |
  bb.0:

    ; SI-LABEL: name: test_fconstant_s16
    ; SI: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
    ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[C]](s32)
    ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
    ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
    ; VI-LABEL: name: test_fconstant_s16
    ; VI: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00
    ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16)
    ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s16) = G_FCONSTANT half 1.0
    %1:_(s32) = G_ANYEXT %0
    $vgpr0 = COPY %1
...