| commit | 150b0bedb7f0aa3af89dbd75a3f046b76260c191 | [log] [tgz] |
|---|---|---|
| author | Roman Lebedev <lebedev.ri@gmail.com> | Sun Oct 20 20:51:37 2019 +0000 |
| committer | Roman Lebedev <lebedev.ri@gmail.com> | Sun Oct 20 20:51:37 2019 +0000 |
| tree | ac4bf80dd1215309a62eff909357959c1b63675f | |
| parent | b7aa2ef391f765dccd54d5a28ec4762a03ce090c [diff] |
[NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be 'or' pattern. In this pattern, all the "magic" bits that we'd add are all high sign bits, and in the value we'd be adding to they are all unset, not unexpectedly, so we can have an `or` there: https://rise4fun.com/Alive/ups git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375377 91177308-0d34-0410-b5e6-96231b3b80d8