tree 1f049f6c2a9a460ce76043a2708b9fbc32b7ce83
parent 65f398e46778167fc7503db1bd24f6dc69860bad
author Sjoerd Meijer <sjoerd.meijer@arm.com> 1549877862 +0000
committer Sjoerd Meijer <sjoerd.meijer@arm.com> 1549877862 +0000

[ARM] LoadStoreOptimizer: reoder limit

The whole design of generating LDMs/STMs is fragile and unreliable: it depends on
rescheduling here in the LoadStoreOptimizer that isn't register pressure aware
and regalloc that isn't aware of generating LDMs/STMs.
This patch adds a (hidden) option to control the total number of instructions that
can be re-ordered. I appreciate this looks only a tiny bit better than a hard-coded
constant, but at least it allows more easy experimentation with different values
for now. Ideally we calculate this reorder limit based on some heuristics, and take
register pressure into account. I might be looking into that next.

Differential Revision: https://reviews.llvm.org/D57954


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353678 91177308-0d34-0410-b5e6-96231b3b80d8