commit a2c8107c80101593ce06445cd3dcb3628dc95819
author Kang Zhang <shkzhang@cn.ibm.com> Thu Apr 18 07:24:15 2019 +0000
committer Kang Zhang <shkzhang@cn.ibm.com> Thu Apr 18 07:24:15 2019 +0000
tree 0b9f118ef033084d820699a455b0e072e029623c
parent 94148739fa0776f811c9f8c69b90f24d06771e6b

[PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS()

Summary:
This issue from the bugzilla: https://bugs.llvm.org/show_bug.cgi?id=41177

When the two operands for BUILD_VECTOR are same, we will get assert error.
llvm::SDValue combineBVOfConsecutiveLoads(llvm::SDNode*, llvm::SelectionDAG&):
Assertion `!(InputsAreConsecutiveLoads && InputsAreReverseConsecutive) &&
"The loads cannot be both consecutive and reverse consecutive."' failed.

This error caused by the wrong ElemSIze when calling isConsecutiveLS(). We
should use `getScalarType().getStoreSize();` to get the ElemSize instread of
 `getScalarSizeInBits() / 8`.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D60811


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358644 91177308-0d34-0410-b5e6-96231b3b80d8