tree cb147dba450bb174323b17ab69ea9f6fb731829c
parent 4a50374b480f6aa06cf8175b694395937eaad82f
author Matt Arsenault <Matthew.Arsenault@amd.com> 1552604083 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> 1552604083 +0000

MIR: Allow targets to serialize MachineFunctionInfo

This has been a very painful missing feature that has made producing
reduced testcases difficult. In particular the various registers
determined for stack access during function lowering were necessary to
avoid undefined register errors in a large percentage of
cases. Implement a subset of the important fields that need to be
preserved for AMDGPU.

Most of the changes are to support targets parsing register fields and
properly reporting errors. The biggest sort-of bug remaining is for
fields that can be initialized from the IR section will be overwritten
by a default initialized machineFunctionInfo section. Another
remaining bug is the machineFunctionInfo section is still printed even
if empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356215 91177308-0d34-0410-b5e6-96231b3b80d8