| # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra -o - %s | FileCheck -check-prefix=GCN %s |
| |
| # GCN: name: negated_cond_vop2 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop2 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_redef_vcc1 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| # GCN-NEXT: $vcc_lo = COPY $sgpr0 |
| # GCN-NEXT: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop2_redef_vcc1 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc_lo = COPY $sgpr0 |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_redef_vcc2 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| # GCN-NEXT: $vcc_hi = COPY $sgpr0 |
| # GCN-NEXT: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop2_redef_vcc2 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc_hi = COPY $sgpr0 |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_redef_cmp |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| # GCN-NEXT: %2.sub1:sreg_64_xexec = COPY $sgpr0 |
| # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_redef_cmp |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| %2.sub1 = COPY $sgpr0 |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_undef_vcc |
| # GCN: $vcc = S_AND_B64 $exec, undef $vcc, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_undef_vcc |
| body: | |
| bb.0: |
| $vcc = S_AND_B64 $exec, undef $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_imp_vcc |
| # GCN: $vcc = IMPLICIT_DEF |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, $vcc, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_imp_vcc |
| body: | |
| bb.0: |
| $vcc = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $vcc, implicit $exec |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_imp_vcc |
| # GCN: $vcc = IMPLICIT_DEF |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, $vcc, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop2_imp_vcc |
| body: | |
| bb.0: |
| $vcc = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $vcc, implicit $exec |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc = S_AND_B64 killed $vcc, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_redef_sel |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: %1:vgpr_32 = COPY $vgpr0 |
| # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_redef_sel |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %1:vgpr_32 = COPY $vgpr0 |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_used_sel |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop2_used_sel |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| $vgpr0 = COPY %1 |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_used_vcc |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| # GCN-NEXT: $sgpr0_sgpr1 = COPY $vcc |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop2_used_vcc |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $sgpr0_sgpr1 = COPY $vcc |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_sel_wrong_subreg1 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| # GCN-NEXT: %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_sel_wrong_subreg1 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1.sub1 = IMPLICIT_DEF |
| %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_sel_wrong_subreg2 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_sel_wrong_subreg2 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %1.sub1 = IMPLICIT_DEF |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub1, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_sel_right_subreg1 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_sel_right_subreg1 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1.sub1 = IMPLICIT_DEF |
| %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub0, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_sel_right_subreg2 |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1.sub1:vreg_64 = IMPLICIT_DEF |
| # GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_sel_right_subreg2 |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1.sub0:vreg_64 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %1.sub1 = IMPLICIT_DEF |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub0, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop3_sel_subreg_overlap |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN-NEXT: %1.sub2:vreg_128 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN-NEXT: %1.sub2_sub3:vreg_128 = IMPLICIT_DEF |
| # GCN-NEXT: %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub2, 1, implicit $exec |
| # GCN-NEXT: $vcc = S_AND_B64 %2, $exec, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc |
| --- |
| name: negated_cond_vop3_sel_subreg_overlap |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1.sub2:vreg_128 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %1.sub2_sub3 = IMPLICIT_DEF |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1.sub2, 1, implicit $exec |
| $vcc = S_AND_B64 killed %2, $exec, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_BRANCH %bb.0 |
| |
| bb.2: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_dominated_blocks |
| # GCN: %0:sreg_64_xexec = IMPLICIT_DEF |
| # GCN: $vcc = S_ANDN2_B64 $exec, %0, implicit-def $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.3, implicit $vcc |
| --- |
| name: negated_cond_vop2_dominated_blocks |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| |
| bb.1: |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.3, implicit killed $vcc |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| S_BRANCH %bb.1 |
| |
| bb.3: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_different_blocks_cmp_and |
| # GCN: %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| # GCN: $vcc = S_AND_B64 $exec, %2, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.3, implicit $vcc |
| --- |
| name: negated_cond_vop2_different_blocks_cmp_and |
| body: | |
| bb.0: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| %2:sreg_64_xexec = V_CMP_NE_U32_e64 %1, 1, implicit $exec |
| |
| bb.1: |
| $vcc = S_AND_B64 $exec, killed %2, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.3, implicit killed $vcc |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| S_BRANCH %bb.1 |
| |
| bb.3: |
| S_ENDPGM 0 |
| ... |
| |
| # GCN: name: negated_cond_vop2_not_dominated_blocks |
| # GCN: V_CNDMASK_B32_e64 0, 0, 0, 1, |
| # GCN: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc |
| # GCN-NEXT: S_CBRANCH_VCCNZ %bb.4, implicit $vcc |
| --- |
| name: negated_cond_vop2_not_dominated_blocks |
| body: | |
| bb.0: |
| $vcc = IMPLICIT_DEF |
| %1 = IMPLICIT_DEF |
| S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| %0:sreg_64_xexec = IMPLICIT_DEF |
| %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0, implicit $exec |
| |
| bb.2: |
| V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec |
| $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc |
| S_CBRANCH_VCCNZ %bb.4, implicit killed $vcc |
| S_BRANCH %bb.3 |
| |
| bb.3: |
| S_BRANCH %bb.2 |
| |
| bb.4: |
| S_ENDPGM 0 |
| ... |
