| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=thumbv7m-none-eabi -run-pass=if-converter -o - %s | FileCheck %s |
| |
| --- | |
| define i32 @f1(i32 %x) #0 { ret i32 %x } |
| define i32 @f2(i32 %x) #0 { ret i32 %x } |
| define i32 @f3(i32 %x) #0 { ret i32 %x } |
| declare i32 @fn(i32 %x) #0 |
| |
| attributes #0 = { minsize nounwind optsize } |
| |
| ... |
| --- |
| name: f1 |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$r0', virtual-reg: '' } |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| body: | |
| ; CHECK-LABEL: name: f1 |
| ; CHECK: bb.0: |
| ; CHECK: liveins: $r0, $lr, $r7 |
| ; CHECK: t2CMPri killed renamable $r0, 1, 14, $noreg, implicit-def $cpsr |
| ; CHECK: tBX_RET 1, killed $cpsr |
| ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK: $r0 = t2MOVi 0, 14, $noreg, $noreg |
| ; CHECK: tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 |
| ; CHECK: $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| ; CHECK: tBX_RET 14, $noreg |
| bb.0: |
| successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| liveins: $r0, $lr, $r7 |
| |
| t2CMPri killed renamable $r0, 1, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.2, 1, killed $cpsr |
| |
| bb.1: |
| liveins: $r7, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| $r0 = t2MOVi 0, 14, $noreg, $noreg |
| tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 |
| $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| tBX_RET 14, $noreg |
| |
| bb.2: |
| liveins: $lr, $r7 |
| |
| tBX_RET 14, $noreg |
| |
| ... |
| --- |
| name: f2 |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$r0', virtual-reg: '' } |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| body: | |
| ; CHECK-LABEL: name: f2 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $r0, $lr, $r7 |
| ; CHECK: t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| ; CHECK: t2Bcc %bb.2, 1, killed $cpsr |
| ; CHECK: bb.1: |
| ; CHECK: liveins: $r7, $lr |
| ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK: $r0 = t2MOVi 0, 14, $noreg, $noreg |
| ; CHECK: tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 |
| ; CHECK: $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| ; CHECK: tBX_RET 14, $noreg |
| ; CHECK: bb.2: |
| ; CHECK: liveins: $lr, $r7 |
| ; CHECK: tBX_RET 14, $noreg |
| bb.0: |
| successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| liveins: $r0, $lr, $r7 |
| |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.2, 1, killed $cpsr |
| |
| bb.1: |
| liveins: $r7, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| $r0 = t2MOVi 0, 14, $noreg, $noreg |
| tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 |
| $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| tBX_RET 14, $noreg |
| |
| bb.2: |
| liveins: $lr, $r7 |
| |
| tBX_RET 14, $noreg |
| |
| ... |
| --- |
| name: f3 |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$r0', virtual-reg: '' } |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| body: | |
| ; CHECK-LABEL: name: f3 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $r0, $lr, $r7 |
| ; CHECK: t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| ; CHECK: $r1 = t2MOVi 0, 14, $noreg, $noreg |
| ; CHECK: t2Bcc %bb.2, 1, killed $cpsr |
| ; CHECK: bb.1: |
| ; CHECK: liveins: $r7, $lr |
| ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 |
| ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8 |
| ; CHECK: $r0 = t2MOVi 0, 14, $noreg, $noreg |
| ; CHECK: tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 |
| ; CHECK: $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| ; CHECK: tBX_RET 14, $noreg |
| ; CHECK: bb.2: |
| ; CHECK: liveins: $lr, $r7 |
| ; CHECK: tBX_RET 14, $noreg |
| bb.0: |
| successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| liveins: $r0, $lr, $r7 |
| |
| t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr |
| $r1 = t2MOVi 0, 14, $noreg, $noreg |
| t2Bcc %bb.2, 1, killed $cpsr |
| |
| bb.1: |
| liveins: $r7, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| $r0 = t2MOVi 0, 14, $noreg, $noreg |
| tBL 14, $noreg, @fn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0 |
| $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr |
| tBX_RET 14, $noreg |
| |
| bb.2: |
| liveins: $lr, $r7 |
| |
| tBX_RET 14, $noreg |
| |
| ... |
