test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN

---

name: sext_scc_s1_to_sgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_scc_s1_to_sgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY]], implicit-def $scc
    ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
    ; GCN: $scc = COPY [[COPY1]]
    ; GCN: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, -1, implicit $scc
    ; GCN: $sgpr0 = COPY [[S_CSELECT_B32_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:scc(s1) = G_ICMP intpred(eq), %0, %0
    %2:sgpr(s32) = G_SEXT %1
    $sgpr0 = COPY %2
...

---

name: sext_scc_s1_to_sgpr_s64
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_scc_s1_to_sgpr_s64
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY]], implicit-def $scc
    ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $scc
    ; GCN: $scc = COPY [[COPY1]]
    ; GCN: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64_xexec = S_CSELECT_B64 0, -1, implicit $scc
    ; GCN: $sgpr0_sgpr1 = COPY [[S_CSELECT_B64_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:scc(s1) = G_ICMP intpred(eq), %0, %0
    %2:sgpr(s64) = G_SEXT %1
    $sgpr0_sgpr1 = COPY %2
...

---

name: sext_sgpr_s1_to_sgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
    ; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s1) = G_TRUNC %0
    %2:sgpr(s32) = G_SEXT %1
    $sgpr0 = COPY %2
...

---

name: sext_sgpr_s1_to_sgpr_s64
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s64
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1
    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64_xexec = S_BFE_I64 [[REG_SEQUENCE]], 65536, implicit-def $scc
    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s1) = G_TRUNC %0
    %2:sgpr(s64) = G_SEXT %1
    $sgpr0_sgpr1 = COPY %2
...

---

name: sext_sgpr_s8_to_sgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_sgpr_s8_to_sgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: [[S_SEXT_I32_I8_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I8 [[COPY]]
    ; GCN: $sgpr0 = COPY [[S_SEXT_I32_I8_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s8) = G_TRUNC %0
    %2:sgpr(s32) = G_SEXT %1
    $sgpr0 = COPY %2
...

---

name: sext_sgpr_s16_to_sgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_sgpr_s16_to_sgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[COPY]]
    ; GCN: $sgpr0 = COPY [[S_SEXT_I32_I16_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0
    %2:sgpr(s32) = G_SEXT %1
    $sgpr0 = COPY %2

...

---

name: sext_sgpr_s16_to_sgpr_s64
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: sext_sgpr_s16_to_sgpr_s64
    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1
    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64_xexec = S_BFE_I64 [[REG_SEQUENCE]], 1048576, implicit-def $scc
    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0
    %2:sgpr(s64) = G_SEXT %1
    $sgpr0_sgpr1 = COPY %2

...

---

name: sext_vcc_s1_to_vgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: sext_vcc_s1_to_vgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY]], implicit $exec
    ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, [[V_CMP_EQ_U32_e64_]], implicit $exec
    ; GCN: $vgpr0 = COPY [[V_CNDMASK_B32_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vcc(s1) = G_ICMP intpred(eq), %0, %0
    %2:vgpr(s32) = G_SEXT %1
    $vgpr0 = COPY %2
...

---

name: sext_vgpr_s1_to_vgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: sext_vgpr_s1_to_vgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 1, implicit $exec
    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s1) = G_TRUNC %0
    %2:vgpr(s32) = G_SEXT %1
    $vgpr0 = COPY %2
...

---

name: sext_vgpr_s8_to_vgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: sext_vgpr_s8_to_vgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 8, implicit $exec
    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s8) = G_TRUNC %0
    %2:vgpr(s32) = G_SEXT %1
    $vgpr0 = COPY %2

...

---

name: sext_vgpr_s16_to_vgpr_s32
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: sext_vgpr_s16_to_vgpr_s32
    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 16, implicit $exec
    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s16) = G_TRUNC %0
    %2:vgpr(s32) = G_SEXT %1
    $vgpr0 = COPY %2

...