| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GCN |
| |
| --- |
| name: fptosi_s32_to_s32_vv |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: fptosi_s32_to_s32_vv |
| ; GCN: liveins: $vgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $exec |
| ; GCN: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = G_FPTOSI %0 |
| $vgpr0 = COPY %1 |
| ... |
| |
| --- |
| name: fptosi_s32_to_s32_vs |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: fptosi_s32_to_s32_vs |
| ; GCN: liveins: $sgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $exec |
| ; GCN: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:vgpr(s32) = G_FPTOSI %0 |
| $vgpr0 = COPY %1 |
| ... |
| |
| --- |
| name: fptosi_s32_to_s32_fneg_vv |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: fptosi_s32_to_s32_fneg_vv |
| ; GCN: liveins: $vgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $exec |
| ; GCN: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = G_FNEG %0 |
| %2:vgpr(s32) = G_FPTOSI %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: fptosi_s16_to_s32_vv |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: fptosi_s16_to_s32_vv |
| ; GCN: liveins: $vgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[V_CVT_F32_F16_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_F16_e32 [[COPY]], implicit $exec |
| ; GCN: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e32_]], implicit $exec |
| ; GCN: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s16) = G_TRUNC %0 |
| %2:vgpr(s32) = G_FPTOSI %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: fptosi_s16_to_s32_vs |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: fptosi_s16_to_s32_vs |
| ; GCN: liveins: $sgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN: [[V_CVT_F32_F16_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_F16_e32 [[COPY]], implicit $exec |
| ; GCN: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e32_]], implicit $exec |
| ; GCN: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s16) = G_TRUNC %0 |
| %2:vgpr(s32) = G_FPTOSI %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| name: fptosi_s16_to_s32_fneg_vv |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: fptosi_s16_to_s32_fneg_vv |
| ; GCN: liveins: $vgpr0 |
| ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768 |
| ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec |
| ; GCN: [[V_CVT_F32_F16_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_F16_e32 [[V_XOR_B32_e32_]], implicit $exec |
| ; GCN: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e32_]], implicit $exec |
| ; GCN: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s16) = G_TRUNC %0 |
| %2:vgpr(s16) = G_FNEG %1 |
| %3:vgpr(s32) = G_FPTOSI %2 |
| $vgpr0 = COPY %3 |
| ... |