test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s  | FileCheck -check-prefix=WAVE64 %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s  | FileCheck -check-prefix=WAVE32 %s

---
name: fcmp_false_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_false_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
    ; WAVE64: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; WAVE64: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
    ; WAVE64: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(false), [[TRUNC]](s16), [[TRUNC1]]
    ; WAVE64: S_ENDPGM 0, implicit [[FCMP]](s1)
    ; WAVE32-LABEL: name: fcmp_false_s16_vv
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
    ; WAVE32: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; WAVE32: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
    ; WAVE32: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(false), [[TRUNC]](s16), [[TRUNC1]]
    ; WAVE32: S_ENDPGM 0, implicit [[FCMP]](s1)
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(false), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_oeq_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_oeq_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_EQ_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_EQ_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_oeq_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_EQ_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_EQ_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_EQ_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(oeq), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ogt_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ogt_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_GT_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_GT_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ogt_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_GT_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_GT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_GT_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(ogt), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_oge_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_oge_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_GE_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_GE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_GE_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_oge_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_GE_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_GE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_GE_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(oge), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_olt_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_olt_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_LT_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LT_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_olt_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_LT_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LT_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(olt), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ole_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ole_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_LE_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LE_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ole_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_LE_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LE_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(ole), %2, %3
    S_ENDPGM 0, implicit %4
...
---
name: fcmp_one_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_one_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_LG_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LG_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LG_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_one_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_LG_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LG_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LG_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(one), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ord_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ord_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_LG_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_LG_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_LG_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ord_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_LG_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_LG_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_LG_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(one), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_uno_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_uno_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_U_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_U_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_U_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_uno_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_U_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_U_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_U_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(uno), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ueq_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ueq_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_NLG_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NLG_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NLG_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ueq_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_NLG_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NLG_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NLG_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(ueq), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ugt_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ugt_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_NLE_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NLE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NLE_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ugt_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_NLE_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NLE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NLE_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(ugt), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_uge_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_uge_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_NLT_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NLT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NLT_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_uge_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_NLT_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NLT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NLT_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(uge), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ult_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ult_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_NGE_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NGE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NGE_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ult_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_NGE_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NGE_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NGE_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(ult), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_ule_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_ule_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_NGT_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NGT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NGT_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_ule_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_NGT_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NGT_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NGT_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(ule), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_une_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_une_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE64: [[V_CMP_NEQ_F16_e64_:%[0-9]+]]:sreg_64 = V_CMP_NEQ_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NEQ_F16_e64_]]
    ; WAVE32-LABEL: name: fcmp_une_s16_vv
    ; WAVE32: $vcc_hi = IMPLICIT_DEF
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; WAVE32: [[V_CMP_NEQ_F16_e64_:%[0-9]+]]:sreg_32 = V_CMP_NEQ_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $exec
    ; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NEQ_F16_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(une), %2, %3
    S_ENDPGM 0, implicit %4
...

---
name: fcmp_true_s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; WAVE64-LABEL: name: fcmp_true_s16_vv
    ; WAVE64: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
    ; WAVE64: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; WAVE64: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
    ; WAVE64: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(true), [[TRUNC]](s16), [[TRUNC1]]
    ; WAVE64: S_ENDPGM 0, implicit [[FCMP]](s1)
    ; WAVE32-LABEL: name: fcmp_true_s16_vv
    ; WAVE32: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
    ; WAVE32: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
    ; WAVE32: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
    ; WAVE32: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(true), [[TRUNC]](s16), [[TRUNC1]]
    ; WAVE32: S_ENDPGM 0, implicit [[FCMP]](s1)
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s16) = G_TRUNC %0
    %3:vgpr(s16) = G_TRUNC %1
    %4:vcc(s1) = G_FCMP floatpred(true), %2, %3
    S_ENDPGM 0, implicit %4
...