# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s

--- |
  define void @strxrox(i64* %addr) { ret void }
  define void @strdrox(i64* %addr) { ret void }
  define void @strwrox(i64* %addr) { ret void }
  define void @strsrox(i64* %addr) { ret void }
  define void @strhrox(i64* %addr) { ret void }
  define void @strqrox(i64* %addr) { ret void }
  define void @shl(i64* %addr) { ret void }
...

---
name:            strxrox
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $x2
    ; CHECK-LABEL: name: strxrox
    ; CHECK: liveins: $x0, $x1, $x2
    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
    ; CHECK: STRXroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 8 into %ir.addr)
    %0:gpr(p0) = COPY $x0
    %1:gpr(s64) = COPY $x1
    %ptr:gpr(p0) = G_GEP %0, %1
    %3:gpr(s64) = COPY $x2
    G_STORE %3, %ptr :: (store 8 into %ir.addr)
...
---
name:            strdrox
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $d2
    ; CHECK-LABEL: name: strdrox
    ; CHECK: liveins: $x0, $x1, $d2
    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY $d2
    ; CHECK: STRDroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 8 into %ir.addr)
    %0:gpr(p0) = COPY $x0
    %1:gpr(s64) = COPY $x1
    %ptr:gpr(p0) = G_GEP %0, %1
    %3:fpr(s64) = COPY $d2
    G_STORE %3, %ptr :: (store 8 into %ir.addr)
...
---
name:            strwrox
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $w2
    ; CHECK-LABEL: name: strwrox
    ; CHECK: liveins: $x0, $x1, $w2
    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK: STRWroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 4 into %ir.addr)
    %0:gpr(p0) = COPY $x0
    %1:gpr(s64) = COPY $x1
    %ptr:gpr(p0) = G_GEP %0, %1
    %3:gpr(s32) = COPY $w2
    G_STORE %3, %ptr :: (store 4 into %ir.addr)
...
---
name:            strsrox
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $s2
    ; CHECK-LABEL: name: strsrox
    ; CHECK: liveins: $x0, $x1, $s2
    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY $s2
    ; CHECK: STRSroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 4 into %ir.addr)
    %0:gpr(p0) = COPY $x0
    %1:gpr(s64) = COPY $x1
    %ptr:gpr(p0) = G_GEP %0, %1
    %3:fpr(s32) = COPY $s2
    G_STORE %3, %ptr :: (store 4 into %ir.addr)
...
---
name:            strhrox
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $h0
    ; CHECK-LABEL: name: strhrox
    ; CHECK: liveins: $x0, $x1, $h0
    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
    ; CHECK: STRHroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 2 into %ir.addr)
    %0:gpr(p0) = COPY $x0
    %1:gpr(s64) = COPY $x1
    %ptr:gpr(p0) = G_GEP %0, %1
    %3:fpr(s16) = COPY $h0
    G_STORE %3, %ptr :: (store 2 into %ir.addr)
...
---
name:            strqrox
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $q2
    ; CHECK-LABEL: name: strqrox
    ; CHECK: liveins: $x0, $x1, $q2
    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:fpr128 = COPY $q2
    ; CHECK: STRQroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store 16 into %ir.addr)
    %0:gpr(p0) = COPY $x0
    %1:gpr(s64) = COPY $x1
    %ptr:gpr(p0) = G_GEP %0, %1
    %2:fpr(<2 x s64>) = COPY $q2
    G_STORE %2, %ptr :: (store 16 into %ir.addr)
...
---
name:            shl
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0, $x1, $x2
    ; CHECK-LABEL: name: shl
    ; CHECK: liveins: $x0, $x1, $x2
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
    ; CHECK: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
    ; CHECK: STRXroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store 8 into %ir.addr)
    %0:gpr(s64) = COPY $x0
    %1:gpr(s64) = G_CONSTANT i64 3
    %2:gpr(s64) = G_SHL %0, %1(s64)
    %3:gpr(p0) = COPY $x1
    %ptr:gpr(p0) = G_GEP %3, %2
    %4:gpr(s64) = COPY $x2
    G_STORE %4, %ptr :: (store 8 into %ir.addr)