test/CodeGen/AArch64/GlobalISel/legalize-extload.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -verify-machineinstrs | FileCheck %s
--- |
  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64"

  define void @test_extload() {
  entry:
    ret void
  }

  define i64 @sext_i32_i64(i32* %ptr) {
    %ld = load i32, i32* %ptr, align 4
    %v = sext i32 %ld to i64
    ret i64 %v
  }

  define i64 @sext_i16_i64(i16* %ptr) {
    %ld = load i16, i16* %ptr, align 2
    %v = sext i16 %ld to i64
    ret i64 %v
  }

  define i64 @sext_i8_i64(i8* %ptr) {
    %ld = load i8, i8* %ptr, align 1
    %v = sext i8 %ld to i64
    ret i64 %v
  }

  define i64 @zext_i32_i64(i32* %ptr) {
    %ld = load i32, i32* %ptr, align 4
    %v = zext i32 %ld to i64
    ret i64 %v
  }

  define i64 @zext_i16_i64(i16* %ptr) {
    %ld = load i16, i16* %ptr, align 2
    %v = zext i16 %ld to i64
    ret i64 %v
  }

  define i64 @zext_i8_i64(i8* %ptr) {
    %ld = load i8, i8* %ptr, align 1
    %v = zext i8 %ld to i64
    ret i64 %v
  }

...
---
name:            test_extload
body: |
  bb.0.entry:
    liveins: $x0
    ; CHECK-LABEL: name: test_extload
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
    ; CHECK: $w0 = COPY [[LOAD]](s32)
    %0:_(p0) = COPY $x0
    %1:_(s32) = G_LOAD %0 :: (load 1)
    $w0 = COPY %1
...
---
name:            sext_i32_i64
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: sext_i32_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load 4 from %ir.ptr)
    ; CHECK: $x0 = COPY [[SEXTLOAD]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_SEXTLOAD %0(p0) :: (load 4 from %ir.ptr)
    $x0 = COPY %2(s64)
    RET_ReallyLR implicit $x0

...
---
name:            sext_i16_i64
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: sext_i16_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load 2 from %ir.ptr)
    ; CHECK: $x0 = COPY [[SEXTLOAD]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_SEXTLOAD %0(p0) :: (load 2 from %ir.ptr)
    $x0 = COPY %2(s64)
    RET_ReallyLR implicit $x0

...
---
name:            sext_i8_i64
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: sext_i8_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load 1 from %ir.ptr)
    ; CHECK: $x0 = COPY [[SEXTLOAD]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_SEXTLOAD %0(p0) :: (load 1 from %ir.ptr)
    $x0 = COPY %2(s64)
    RET_ReallyLR implicit $x0

...
---
name:            zext_i32_i64
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: zext_i32_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load 4 from %ir.ptr)
    ; CHECK: $x0 = COPY [[ZEXTLOAD]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_ZEXTLOAD %0(p0) :: (load 4 from %ir.ptr)
    $x0 = COPY %2(s64)
    RET_ReallyLR implicit $x0

...
---
name:            zext_i16_i64
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: zext_i16_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load 2 from %ir.ptr)
    ; CHECK: $x0 = COPY [[ZEXTLOAD]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_ZEXTLOAD %0(p0) :: (load 2 from %ir.ptr)
    $x0 = COPY %2(s64)
    RET_ReallyLR implicit $x0

...
---
name:            zext_i8_i64
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: zext_i8_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load 1 from %ir.ptr)
    ; CHECK: $x0 = COPY [[ZEXTLOAD]](s64)
    ; CHECK: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_ZEXTLOAD %0(p0) :: (load 1 from %ir.ptr)
    $x0 = COPY %2(s64)
    RET_ReallyLR implicit $x0

...