| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -O0 -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| # |
| # Verify the following: |
| # |
| # - We can fold compares into selects. |
| # - This only happens when the result of the compare is only used by the select. |
| # |
| # Also verify that, for now: |
| # |
| # - We only support condition flags that require a single instruction. |
| # |
| |
| ... |
| --- |
| name: fcmp_more_than_one_user_no_fold |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $s1, $w1 |
| |
| ; CHECK-LABEL: name: fcmp_more_than_one_user_no_fold |
| ; CHECK: liveins: $s0, $s1, $w1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv |
| ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[CSINCWr]] |
| ; CHECK: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]] |
| ; CHECK: $wzr = ANDSWri [[COPY3]], 0, implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[FMOVS0_]], [[COPY1]], 1, implicit $nzcv |
| ; CHECK: $w1 = COPY [[CSINCWr]] |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:fpr(s32) = COPY $s0 |
| %1:fpr(s32) = COPY $s1 |
| %2:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(oeq), %0(s32), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s32) = G_SELECT %6(s1), %2, %1 |
| $w1 = COPY %5(s32) |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: using_icmp |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $w0 |
| |
| ; CHECK-LABEL: name: using_icmp |
| ; CHECK: liveins: $s0, $w0 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: $wzr = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 0, implicit $nzcv |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:gpr(s32) = COPY $w0 |
| %1:fpr(s32) = COPY $s0 |
| %2:gpr(s32) = G_CONSTANT i32 0 |
| %5:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| %6:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2 |
| %3:gpr(s1) = G_TRUNC %6(s32) |
| %7:fpr(s1) = COPY %3(s1) |
| %4:fpr(s32) = G_SELECT %7(s1), %1, %5 |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: foeq |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $s1 |
| |
| ; CHECK-LABEL: name: foeq |
| ; CHECK: liveins: $s0, $s1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[FMOVS0_]], [[COPY1]], 0, implicit $nzcv |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:fpr(s32) = COPY $s0 |
| %1:fpr(s32) = COPY $s1 |
| %2:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(oeq), %0(s32), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s32) = G_SELECT %6(s1), %2, %1 |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: fueq |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $s1 |
| |
| ; CHECK-LABEL: name: fueq |
| ; CHECK: liveins: $s0, $s1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv |
| ; CHECK: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv |
| ; CHECK: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr [[CSINCWr]], [[CSINCWr1]] |
| ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[ORRWrr]] |
| ; CHECK: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]] |
| ; CHECK: $wzr = ANDSWri [[COPY3]], 0, implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[FMOVS0_]], [[COPY1]], 1, implicit $nzcv |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:fpr(s32) = COPY $s0 |
| %1:fpr(s32) = COPY $s1 |
| %2:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(ueq), %0(s32), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s32) = G_SELECT %6(s1), %2, %1 |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: fone |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $s1 |
| |
| ; CHECK-LABEL: name: fone |
| ; CHECK: liveins: $s0, $s1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv |
| ; CHECK: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv |
| ; CHECK: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr [[CSINCWr]], [[CSINCWr1]] |
| ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[ORRWrr]] |
| ; CHECK: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]] |
| ; CHECK: $wzr = ANDSWri [[COPY3]], 0, implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 1, implicit $nzcv |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:fpr(s32) = COPY $s0 |
| %1:fpr(s32) = COPY $s1 |
| %2:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(one), %0(s32), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s32) = G_SELECT %6(s1), %1, %2 |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: fune |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $s1 |
| |
| ; CHECK-LABEL: name: fune |
| ; CHECK: liveins: $s0, $s1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 1, implicit $nzcv |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:fpr(s32) = COPY $s0 |
| %1:fpr(s32) = COPY $s1 |
| %2:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(une), %0(s32), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s32) = G_SELECT %6(s1), %1, %2 |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: doeq |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: doeq |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 |
| ; CHECK: [[FMOVD0_:%[0-9]+]]:fpr64 = FMOVD0 |
| ; CHECK: FCMPDri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[FMOVD0_]], [[COPY1]], 0, implicit $nzcv |
| ; CHECK: $d0 = COPY [[FCSELDrrr]] |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %0:fpr(s64) = COPY $d0 |
| %1:fpr(s64) = COPY $d1 |
| %2:fpr(s64) = G_FCONSTANT double 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(oeq), %0(s64), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s64) = G_SELECT %6(s1), %2, %1 |
| $d0 = COPY %4(s64) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: dueq |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: dueq |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 |
| ; CHECK: [[FMOVD0_:%[0-9]+]]:fpr64 = FMOVD0 |
| ; CHECK: FCMPDri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv |
| ; CHECK: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv |
| ; CHECK: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr [[CSINCWr]], [[CSINCWr1]] |
| ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[ORRWrr]] |
| ; CHECK: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]] |
| ; CHECK: $wzr = ANDSWri [[COPY3]], 0, implicit-def $nzcv |
| ; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[FMOVD0_]], [[COPY1]], 1, implicit $nzcv |
| ; CHECK: $d0 = COPY [[FCSELDrrr]] |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %0:fpr(s64) = COPY $d0 |
| %1:fpr(s64) = COPY $d1 |
| %2:fpr(s64) = G_FCONSTANT double 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(ueq), %0(s64), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s64) = G_SELECT %6(s1), %2, %1 |
| $d0 = COPY %4(s64) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: done |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: done |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 |
| ; CHECK: [[FMOVD0_:%[0-9]+]]:fpr64 = FMOVD0 |
| ; CHECK: FCMPDri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv |
| ; CHECK: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv |
| ; CHECK: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr [[CSINCWr]], [[CSINCWr1]] |
| ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[ORRWrr]] |
| ; CHECK: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]] |
| ; CHECK: $wzr = ANDSWri [[COPY3]], 0, implicit-def $nzcv |
| ; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[COPY1]], [[FMOVD0_]], 1, implicit $nzcv |
| ; CHECK: $d0 = COPY [[FCSELDrrr]] |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %0:fpr(s64) = COPY $d0 |
| %1:fpr(s64) = COPY $d1 |
| %2:fpr(s64) = G_FCONSTANT double 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(one), %0(s64), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s64) = G_SELECT %6(s1), %1, %2 |
| $d0 = COPY %4(s64) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: dune |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: dune |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 |
| ; CHECK: [[FMOVD0_:%[0-9]+]]:fpr64 = FMOVD0 |
| ; CHECK: FCMPDri [[COPY]], implicit-def $nzcv |
| ; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[COPY1]], [[FMOVD0_]], 1, implicit $nzcv |
| ; CHECK: $d0 = COPY [[FCSELDrrr]] |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %0:fpr(s64) = COPY $d0 |
| %1:fpr(s64) = COPY $d1 |
| %2:fpr(s64) = G_FCONSTANT double 0.000000e+00 |
| %5:gpr(s32) = G_FCMP floatpred(une), %0(s64), %2 |
| %3:gpr(s1) = G_TRUNC %5(s32) |
| %6:fpr(s1) = COPY %3(s1) |
| %4:fpr(s64) = G_SELECT %6(s1), %1, %2 |
| $d0 = COPY %4(s64) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: copy_from_physreg |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $w0, $w1 |
| |
| ; CHECK-LABEL: name: copy_from_physreg |
| ; CHECK: liveins: $s0, $w0, $w1 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0 |
| ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 |
| ; CHECK: BL @copy_from_physreg, implicit-def $w0 |
| ; CHECK: $wzr = ANDSWri [[COPY]], 0, implicit-def $nzcv |
| ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 1, implicit $nzcv |
| ; CHECK: BL @copy_from_physreg, implicit-def $w0 |
| ; CHECK: $s0 = COPY [[FCSELSrrr]] |
| ; CHECK: RET_ReallyLR implicit $s0 |
| %0:gpr(s32) = COPY $w0 |
| %1:fpr(s32) = COPY $s0 |
| %5:fpr(s32) = G_FCONSTANT float 0.000000e+00 |
| BL @copy_from_physreg, implicit-def $w0 |
| %3:gpr(s1) = G_TRUNC %0(s32) |
| %4:fpr(s32) = G_SELECT %3(s1), %1, %5 |
| BL @copy_from_physreg, implicit-def $w0 |
| $s0 = COPY %4(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
