[x86] add tests for improved insertelement to index 0 (PR41512); NFC
Patch proposal in D60852.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358687 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/insertelement-zero.ll b/test/CodeGen/X86/insertelement-zero.ll
index 3b2faf4..901b59d 100644
--- a/test/CodeGen/X86/insertelement-zero.ll
+++ b/test/CodeGen/X86/insertelement-zero.ll
@@ -499,3 +499,196 @@
%4 = insertelement <32 x i8> %3, i8 0, i32 31
ret <32 x i8> %4
}
+
+; FIXME: Prefer 'movd' over 'pinsr' to element 0.
+
+define <4 x i32> @PR41512(i32 %x, i32 %y) {
+; SSE2-LABEL: PR41512:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movd %edi, %xmm0
+; SSE2-NEXT: movd %esi, %xmm1
+; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: PR41512:
+; SSE3: # %bb.0:
+; SSE3-NEXT: movd %edi, %xmm0
+; SSE3-NEXT: movd %esi, %xmm1
+; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: PR41512:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movd %edi, %xmm0
+; SSSE3-NEXT: movd %esi, %xmm1
+; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: PR41512:
+; SSE41: # %bb.0:
+; SSE41-NEXT: pxor %xmm1, %xmm1
+; SSE41-NEXT: pxor %xmm0, %xmm0
+; SSE41-NEXT: pinsrd $0, %edi, %xmm0
+; SSE41-NEXT: pinsrd $0, %esi, %xmm1
+; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: PR41512:
+; AVX: # %bb.0:
+; AVX-NEXT: vpxor %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vpinsrd $0, %edi, %xmm0, %xmm1
+; AVX-NEXT: vpinsrd $0, %esi, %xmm0, %xmm0
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX-NEXT: retq
+ %ins1 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %x, i32 0
+ %ins2 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %y, i32 0
+ %r = shufflevector <4 x i32> %ins1, <4 x i32> %ins2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+ ret <4 x i32> %r
+}
+
+define <4 x i64> @PR41512_v4i64(i64 %x, i64 %y) {
+; SSE2-LABEL: PR41512_v4i64:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movq %rdi, %xmm0
+; SSE2-NEXT: movq %rsi, %xmm1
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: PR41512_v4i64:
+; SSE3: # %bb.0:
+; SSE3-NEXT: movq %rdi, %xmm0
+; SSE3-NEXT: movq %rsi, %xmm1
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: PR41512_v4i64:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movq %rdi, %xmm0
+; SSSE3-NEXT: movq %rsi, %xmm1
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: PR41512_v4i64:
+; SSE41: # %bb.0:
+; SSE41-NEXT: pxor %xmm1, %xmm1
+; SSE41-NEXT: pxor %xmm0, %xmm0
+; SSE41-NEXT: pinsrq $0, %rdi, %xmm0
+; SSE41-NEXT: pinsrq $0, %rsi, %xmm1
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: PR41512_v4i64:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vpxor %xmm0, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrq $0, %rdi, %xmm0, %xmm1
+; AVX1-NEXT: vpinsrq $0, %rsi, %xmm0, %xmm0
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: PR41512_v4i64:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: vpinsrq $0, %rdi, %xmm0, %xmm1
+; AVX2-NEXT: vpinsrq $0, %rsi, %xmm0, %xmm0
+; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: retq
+ %ins1 = insertelement <4 x i64> <i64 undef, i64 0, i64 undef, i64 undef>, i64 %x, i32 0
+ %ins2 = insertelement <4 x i64> <i64 undef, i64 0, i64 undef, i64 undef>, i64 %y, i32 0
+ %r = shufflevector <4 x i64> %ins1, <4 x i64> %ins2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+ ret <4 x i64> %r
+}
+
+define <8 x float> @PR41512_v8f32(float %x, float %y) {
+; SSE2-LABEL: PR41512_v8f32:
+; SSE2: # %bb.0:
+; SSE2-NEXT: xorps %xmm2, %xmm2
+; SSE2-NEXT: xorps %xmm3, %xmm3
+; SSE2-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]
+; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
+; SSE2-NEXT: movaps %xmm3, %xmm0
+; SSE2-NEXT: movaps %xmm2, %xmm1
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: PR41512_v8f32:
+; SSE3: # %bb.0:
+; SSE3-NEXT: xorps %xmm2, %xmm2
+; SSE3-NEXT: xorps %xmm3, %xmm3
+; SSE3-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]
+; SSE3-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
+; SSE3-NEXT: movaps %xmm3, %xmm0
+; SSE3-NEXT: movaps %xmm2, %xmm1
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: PR41512_v8f32:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: xorps %xmm2, %xmm2
+; SSSE3-NEXT: xorps %xmm3, %xmm3
+; SSSE3-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]
+; SSSE3-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
+; SSSE3-NEXT: movaps %xmm3, %xmm0
+; SSSE3-NEXT: movaps %xmm2, %xmm1
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: PR41512_v8f32:
+; SSE41: # %bb.0:
+; SSE41-NEXT: xorps %xmm2, %xmm2
+; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: PR41512_v8f32:
+; AVX: # %bb.0:
+; AVX-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
+; AVX-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX-NEXT: retq
+ %ins1 = insertelement <8 x float> zeroinitializer, float %x, i32 0
+ %ins2 = insertelement <8 x float> zeroinitializer, float %y, i32 0
+ %r = shufflevector <8 x float> %ins1, <8 x float> %ins2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
+ ret <8 x float> %r
+}
+
+define <4 x i32> @PR41512_loads(i32* %p1, i32* %p2) {
+; SSE2-LABEL: PR41512_loads:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: PR41512_loads:
+; SSE3: # %bb.0:
+; SSE3-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: PR41512_loads:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: PR41512_loads:
+; SSE41: # %bb.0:
+; SSE41-NEXT: pxor %xmm1, %xmm1
+; SSE41-NEXT: pxor %xmm0, %xmm0
+; SSE41-NEXT: pinsrd $0, (%rdi), %xmm0
+; SSE41-NEXT: pinsrd $0, (%rsi), %xmm1
+; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: PR41512_loads:
+; AVX: # %bb.0:
+; AVX-NEXT: vpxor %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vpinsrd $0, (%rdi), %xmm0, %xmm1
+; AVX-NEXT: vpinsrd $0, (%rsi), %xmm0, %xmm0
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX-NEXT: retq
+ %x = load i32, i32* %p1
+ %y = load i32, i32* %p2
+ %ins1 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %x, i32 0
+ %ins2 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %y, i32 0
+ %r = shufflevector <4 x i32> %ins1, <4 x i32> %ins2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+ ret <4 x i32> %r
+}
