test/CodeGen/X86/GlobalISel/select-fptrunc-scalar.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
--- |

  define float @test_fptrunc(double %in) {
    %res = fptrunc double %in to float
    ret float %res
  }

...
---
name:            test_fptrunc
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
  - { id: 2, class: vecr }
  - { id: 3, class: vecr }
body:             |
  bb.1 (%ir-block.0):
    liveins: $xmm0

    ; ALL-LABEL: name: test_fptrunc
    ; ALL: liveins: $xmm0
    ; ALL: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
    ; ALL: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]]
    ; ALL: [[CVTSD2SSrr:%[0-9]+]]:fr32 = CVTSD2SSrr [[COPY1]]
    ; ALL: [[COPY2:%[0-9]+]]:vr128 = COPY [[CVTSD2SSrr]]
    ; ALL: $xmm0 = COPY [[COPY2]]
    ; ALL: RET 0, implicit $xmm0
    %1:vecr(s128) = COPY $xmm0
    %0:vecr(s64) = G_TRUNC %1(s128)
    %2:vecr(s32) = G_FPTRUNC %0(s64)
    %3:vecr(s128) = G_ANYEXT %2(s32)
    $xmm0 = COPY %3(s128)
    RET 0, implicit $xmm0

...