tree 7be605221fc9c45baec309b6287756fa8e5ae170
parent 90696971b2a4677279b1ebfcaf15ac89f82fefeb
author Matt Arsenault <Matthew.Arsenault@amd.com> 1571423197 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> 1571423197 +0000

AMDGPU: Relax 32-bit SGPR register class

Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.

For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375267 91177308-0d34-0410-b5e6-96231b3b80d8