test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir

# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN

--- |
  define amdgpu_kernel void @fmul(i32 addrspace(1)* %global0) {ret void}
...
---

name:            fmul
legalized:       true
regBankSelected: true

# GCN-LABEL: name: fmul
body: |
  bb.0:
    liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4
    %0:sgpr(s32) = COPY $sgpr0
    %1:vgpr(s32) = COPY $vgpr0
    %2:vgpr(s32) = COPY $vgpr1
    %3:vgpr(s64) = COPY $vgpr3_vgpr4

    ; fmul vs
    ; GCN: V_MUL_F32_e64
    %4:vgpr(s32) = G_FMUL %1, %0

    ; fmul sv
    ; GCN: V_MUL_F32_e64
    %5:vgpr(s32) = G_FMUL %0, %1

    ; fmul vv
    ; GCN: V_MUL_F32_e64
    %6:vgpr(s32) = G_FMUL %1, %2

    G_STORE %4, %3 :: (store 4 into %ir.global0)
    G_STORE %5, %3 :: (store 4 into %ir.global0)
    G_STORE %6, %3 :: (store 4 into %ir.global0)
...
---