tree 12c2efd32565408bba17d3acf9f07073a132c462
parent ad03152cf75950313d3756463611917d04e84450
author Craig Topper <craig.topper@intel.com> 1552502930 +0000
committer Craig Topper <craig.topper@intel.com> 1552502930 +0000

[X86] Check for 64-bit mode in X86Subtarget::hasCmpxchg16b()

The feature flag alone can't be trusted since it can be passed via -mattr. Need to ensure 64-bit mode as well.

We had a 64 bit mode check on the instruction to make the assembler work correctly. But we weren't guarding any of our lowering code or the hooks for the AtomicExpandPass.

I've added 32-bit command lines to atomic128.ll with and without cx16. The tests there would all previously fail if -mattr=cx16 was passed to them. I had to move one test case for f128 to a new file as it seems to have a different 32-bit mode or possibly sse issue.

Differential Revision: https://reviews.llvm.org/D59308

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356078 91177308-0d34-0410-b5e6-96231b3b80d8