57078b6e3a1a5b212aabfc0d42253b826c7c453e - llvm

commit	57078b6e3a1a5b212aabfc0d42253b826c7c453e	[log] [tgz]
author	Matt Arsenault <Matthew.Arsenault@amd.com>	Fri Feb 15 15:24:31 2019 +0000
committer	Matt Arsenault <Matthew.Arsenault@amd.com>	Fri Feb 15 15:24:31 2019 +0000
tree	a4883a58259f9235204c74484ef9e39579b5af20
parent	f6aa45dfcea0023f7cd605cf602e6497dd48795a [diff]

Try to organize MachineVerifier tests

The Verifier is separate from the MachineVerifier, so move it to a
different directory. Some other verifier tests were scattered in
target codegen tests as well (although I'm sure I missed some). Work
towards using a more consistent naming scheme to make it clearer where
the gaps still are for generic instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354138 91177308-0d34-0410-b5e6-96231b3b80d8

test/MachineVerifier/test_copy.mir[Renamed from test/Verifier/test_copy.mir - diff]
test/MachineVerifier/test_copy_mismatch_types.mir[Renamed from test/Verifier/test_copy_mismatch_types.mir - diff]
test/MachineVerifier/test_g_add.mir[Renamed from test/Verifier/test_g_add.mir - diff]
test/MachineVerifier/test_g_addrspacecast.mir[Renamed from test/Verifier/test_g_addrspacecast.mir - diff]
test/MachineVerifier/test_g_bitcast.mir[Renamed from test/Verifier/test_g_bitcast.mir - diff]
test/MachineVerifier/test_g_build_vector.mir[Renamed from test/Verifier/gisel-g_build_vector.mir - diff]
test/MachineVerifier/test_g_build_vector_trunc.mir[Renamed from test/Verifier/gisel-g_build_vector_trunc.mir - diff]
test/MachineVerifier/test_g_concat_vectors.mir[Renamed from test/Verifier/gisel-g_concat_vector.mir - diff]
test/MachineVerifier/test_g_constant.mir[Renamed from test/Verifier/test_g_constant.mir - diff]
test/MachineVerifier/test_g_extract.mir[Renamed from test/Verifier/test_g_extract.mir - diff]
test/MachineVerifier/test_g_fcmp.mir[Renamed from test/Verifier/test_g_fcmp.mir - diff]
test/MachineVerifier/test_g_fconstant.mir[Renamed from test/Verifier/test_g_fconstant.mir - diff]
test/MachineVerifier/test_g_gep.mir[Renamed from test/Verifier/test_g_gep.mir - diff]
test/MachineVerifier/test_g_icmp.mir[Renamed from test/Verifier/test_g_icmp.mir - diff]
test/MachineVerifier/test_g_inttoptr.mir[Renamed from test/Verifier/test_g_inttoptr.mir - diff]
test/MachineVerifier/test_g_load.mir[Renamed from test/Verifier/test_g_load.mir - diff]
test/MachineVerifier/test_g_phi.mir[Renamed from test/Verifier/test_g_phi.mir - diff]
test/MachineVerifier/test_g_ptrtoint.mir[Renamed from test/Verifier/test_g_ptrtoint.mir - diff]
test/MachineVerifier/test_g_select.mir[Renamed from test/Verifier/test_g_select.mir - diff]
test/MachineVerifier/test_g_sextload.mir[Renamed from test/Verifier/test_g_sextload.mir - diff]
test/MachineVerifier/test_g_store.mir[Renamed from test/Verifier/test_g_store.mir - diff]
test/MachineVerifier/test_g_trunc.mir[Renamed from test/Verifier/test_g_trunc.mir - diff]
test/MachineVerifier/test_g_zextload.mir[Renamed from test/Verifier/test_g_zextload.mir - diff]
test/MachineVerifier/test_phis_precede_nonphis.mir[Renamed from test/Verifier/test_phis_precede_nonphis.mir - diff]
test/MachineVerifier/verifier-generic-extend-truncate.mir[Renamed from test/CodeGen/X86/verifier-generic-extend-truncate.mir - diff]
test/MachineVerifier/verifier-generic-types-1.mir[Renamed from test/CodeGen/X86/verifier-generic-types-1.mir - diff]
test/MachineVerifier/verifier-generic-types-2.mir[Renamed from test/CodeGen/X86/verifier-generic-types-2.mir - diff]
test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir[Renamed from test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir - diff]
test/MachineVerifier/verifier-phi-fail0.mir[Renamed from test/CodeGen/X86/verifier-phi-fail0.mir - diff]
test/MachineVerifier/verifier-phi.mir[Renamed from test/CodeGen/X86/verifier-phi.mir - diff]
test/MachineVerifier/verifier-pseudo-terminators.mir[Renamed from test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir - diff]
test/MachineVerifier/verify-regbankselected.mir[Renamed from test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir - diff]
test/MachineVerifier/verify-selected.mir[Renamed from test/CodeGen/AArch64/GlobalISel/verify-selected.mir - diff]

33 files changed

tree: a4883a58259f9235204c74484ef9e39579b5af20