| // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s |
| |
| |
| // --------------------------------------------------------------------------// |
| // invalid/missing predicate operation specifier |
| |
| prfd p0, [x0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected |
| // CHECK-NEXT: prfd p0, [x0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #16, p0, [x0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected |
| // CHECK-NEXT: prfd #16, p0, [x0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd plil1keep, p0, [x0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected |
| // CHECK-NEXT: prfd plil1keep, p0, [x0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #pldl1keep, p0, [x0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand |
| // CHECK-NEXT: prfd #pldl1keep, p0, [x0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // invalid scalar + scalar addressing modes |
| |
| prfd #0, p0, [x0, #-33, mul vl] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31]. |
| // CHECK-NEXT: prfd #0, p0, [x0, #-33, mul vl] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, #32, mul vl] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31]. |
| // CHECK-NEXT: prfd #0, p0, [x0, #32, mul vl] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, w0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3' |
| // CHECK-NEXT: prfd #0, p0, [x0, w0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, x0, uxtw] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3' |
| // CHECK-NEXT: prfd #0, p0, [x0, x0, uxtw] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, x0, lsl #1] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3' |
| // CHECK-NEXT: prfd #0, p0, [x0, x0, lsl #1] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // Invalid scalar + vector addressing modes |
| |
| prfd #0, p0, [x0, z0.s] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #3' |
| // CHECK-NEXT: prfd #0, p0, [x0, z0.s] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, z0.d, uxtw #2] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3' |
| // CHECK-NEXT: prfd #0, p0, [x0, z0.d, uxtw #2] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, z0.d, lsl #2] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3' |
| // CHECK-NEXT: prfd #0, p0, [x0, z0.d, lsl #2] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [x0, z0.d, lsl] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier |
| // CHECK-NEXT: prfd #0, p0, [x0, z0.d, lsl] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // Invalid vector + immediate addressing modes |
| |
| prfd #0, p0, [z0.d, #-8] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. |
| // CHECK-NEXT: prfd #0, p0, [z0.d, #-8] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [z0.d, #-1] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. |
| // CHECK-NEXT: prfd #0, p0, [z0.d, #-1] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [z0.d, #249] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. |
| // CHECK-NEXT: prfd #0, p0, [z0.d, #249] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [z0.d, #256] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. |
| // CHECK-NEXT: prfd #0, p0, [z0.d, #256] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| prfd #0, p0, [z0.d, #3] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. |
| // CHECK-NEXT: prfd #0, p0, [z0.d, #3] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // invalid predicate |
| |
| prfd #0, p8, [x0] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. |
| // CHECK-NEXT: prfd #0, p8, [x0] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| |
| // --------------------------------------------------------------------------// |
| // Negative tests for instructions that are incompatible with movprfx |
| |
| movprfx z0.d, p0/z, z7.d |
| prfd pldl1keep, p0, [x0, z0.d, lsl #3] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov |
| // CHECK-NEXT: prfd pldl1keep, p0, [x0, z0.d, lsl #3] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
| |
| movprfx z0, z7 |
| prfd pldl1keep, p0, [x0, z0.d, lsl #3] |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov |
| // CHECK-NEXT: prfd pldl1keep, p0, [x0, z0.d, lsl #3] |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
