blob: 66e5951198f834f816692fcea5b7f531542507f8 [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
---
name: cttz_s32_s32
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: cttz_s32_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[CTTZ:%[0-9]+]]:_(s32) = G_CTTZ [[COPY]](s32)
; CHECK: $vgpr0 = COPY [[CTTZ]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_CTTZ %0
$vgpr0 = COPY %1
...
---
name: cttz_s32_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: cttz_s32_s64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[CTTZ:%[0-9]+]]:_(s32) = G_CTTZ [[COPY]](s64)
; CHECK: $vgpr0 = COPY [[CTTZ]](s32)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s32) = G_CTTZ %0
$vgpr0 = COPY %1
...
---
name: cttz_s64_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: cttz_s64_s64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[CTTZ:%[0-9]+]]:_(s32) = G_CTTZ [[COPY]](s64)
; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[CTTZ]](s32)
; CHECK: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = G_CTTZ %0
$vgpr0_vgpr1 = COPY %1
...
---
name: cttz_s16_s32
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: cttz_s16_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[CTTZ:%[0-9]+]]:_(s32) = G_CTTZ [[COPY]](s32)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[CTTZ]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; CHECK: $vgpr0 = COPY [[AND]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s16) = G_CTTZ %0
%2:_(s32) = G_ZEXT %1
$vgpr0 = COPY %2
...
---
name: cttz_s16_s16
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: cttz_s16_s16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65536
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[C1]]
; CHECK: [[CTTZ:%[0-9]+]]:_(s32) = G_CTTZ [[OR]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[CTTZ]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C2]]
; CHECK: $vgpr0 = COPY [[AND1]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s16) = G_TRUNC %0
%2:_(s16) = G_CTTZ %1
%3:_(s32) = G_ZEXT %2
$vgpr0 = COPY %3
...