tree e7e078440b1f22de9d801e180c155730c775e9aa
parent 2ca79fdeeecd7c54345e737e27a10a3121e9e0c4
author Craig Topper <craig.topper@intel.com> 1550882098 +0000
committer Craig Topper <craig.topper@intel.com> 1550882098 +0000

[X86] Add a few test cases for a v8i64 sext/zext from an illegal type that needs to be promoted to 128 bits.

If v8i64 isn't a legal type but v4i64 is, these will be split and then each half will get their input promoted and become an any_extend_vector_inreg/punpckhwd + any_extend + and/sign_extend_inreg.

If we instead recognize the input will be promoted we can emit the and/sign_extend_inreg first in a 128 bit register. Then we can sign_extend/zero_extend one half and pshufd+sign_extend/zero_extend the other half.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354708 91177308-0d34-0410-b5e6-96231b3b80d8