tree 99d175b5d2427bad67ff2985469695dd0e91e552
parent 2e390e6fde49dfa8c973a0889ccf62433a0b49df
author Valery Pykhtin <Valery.Pykhtin@amd.com> 1549627188 +0000
committer Valery Pykhtin <Valery.Pykhtin@amd.com> 1549627188 +0000

[AMDGPU] Fix DPP combiner

Differential revision: https://reviews.llvm.org/D55444

dpp move with uses and old reg initializer should be in the same BB.
bound_ctrl:0 is only considered when bank_mask and row_mask are fully enabled (0xF). Otherwise the old register value is checked for identity.
Added add, subrev, and, or instructions to the old folding function.
Kill flag is cleared for the src0 (DPP register) as it may be copied into more than one user.

The pass is still disabled by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353513 91177308-0d34-0410-b5e6-96231b3b80d8