tree 9f1c48fde5373c281b3c8724c37c4ff029724849
parent 74c57f24e76e9396f415164fabf785afd5292361
author Tom Stellard <thomas.stellard@amd.com> 1434985092 +0000
committer Tom Stellard <thomas.stellard@amd.com> 1434985092 +0000

Merging r237152:

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r237152 | thomas.stellard | 2015-05-12 13:13:02 -0400 (Tue, 12 May 2015) | 20 lines

R600/SI: add pass to mark CF live ranges as non-spillable

Spilling can insert instructions almost anywhere, and this can mess
up control flow lowering in a multitude of ways, due to instruction
reordering. Let's sort this out the easy way: never spill registers
involved with control flow, i.e. saved EXEC masks.

Unfortunately, this does not work at all with optimizations disabled,
as the register allocator ignores spill weights. This should be
addressed in a future commit.

The test was reduced from the "stacks" shader of [1]. Some issues
trigger the machine verifier while another one is checked manually.

[1] http://madebyevan.com/webgl-path-tracing/

v2: only insert pass with optimizations enabled, merge test runs.

Patch by: Grigori Goronzy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@240282 91177308-0d34-0410-b5e6-96231b3b80d8