test/CodeGen/SystemZ/debuginstr-01.mir

# Check that the backend can produce a load-and-trap instruction also in
# the presence of a DEBUG_VALUE machine instruction.
#
# RUN: llc %s -mtriple=s390x-linux-gnu -mcpu=zEC12 -start-before=postrapseudos \
# RUN:   -o - 2>&1 | FileCheck %s
#
# CHECK: lat

--- |
  
  define i32 @f1(i32* %ptr) #1 {
  entry:
    %val = load i32, i32* %ptr
    ; Keep the dbg metadata live by referencing it in the IR.
    call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !DIExpression()), !dbg !9
    %cmp = icmp eq i32 %val, 0
    br i1 %cmp, label %if.then, label %if.end
  
  if.then:                                          ; preds = %entry
    tail call void @llvm.trap()
    unreachable
  
  if.end:                                           ; preds = %entry
    ret i32 %val
  }
  
  declare void @llvm.trap() #0
  declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
  
  declare void @llvm.stackprotector(i8*, i8**) #2

  attributes #0 = { cold noreturn nounwind "target-cpu"="zEC12" }
  attributes #1 = { "target-cpu"="zEC12" }
  attributes #2 = { nounwind }

  !llvm.dbg.cu = !{!0}
  !llvm.module.flags = !{!3, !4}

  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
  !1 = !DIFile(filename: "test.ll", directory: "/tmp")
  !2 = !{}
  !3 = !{i32 2, !"Dwarf Version", i32 4}
  !4 = !{i32 2, !"Debug Info Version", i32 3}
  !5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
  !6 = !DISubroutineType(types: !2)
  !7 = !DILocalVariable(name: "in", arg: 1, scope: !5, file: !1, line: 1, type: !8)
  !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
  !9 = !DILocation(line: 1, column: 1, scope: !5)

...
---
name:            f1
alignment:       4
tracksRegLiveness: true
liveins:         
  - { reg: '$r2d' }
frameInfo:       
  maxCallFrameSize: 0
body:             |
  bb.0.entry:
    successors: %bb.1(0x00000001), %bb.2(0x7fffffff)
    liveins: $r2d
  
    renamable $r2l = LMux killed renamable $r2d, 0, $noreg :: (load 4 from %ir.ptr)
    DBG_VALUE $noreg, $r2l, !7, !DIExpression(), debug-location !9
    CHIMux renamable $r2l, 0, implicit-def $cc
    DBG_VALUE $noreg, $r2l, !7, !DIExpression(), debug-location !9
    BRC 14, 6, %bb.2, implicit killed $cc
  
  bb.1.if.then:
    successors: 
  
    Trap
  
  bb.2.if.end:
    liveins: $r2l
  
    Return implicit $r2l

...