| ============================ |
| AMDGPU Instructions Notation |
| ============================ |
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| .. contents:: |
| :local: |
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| .. _amdgpu_syn_instruction_notation: |
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| Introduction |
| ============ |
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| This is an overview of notation used to describe the syntax of AMDGPU assembler instructions. |
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| This notation mimics the :ref:`syntax of assembler instructions<amdgpu_syn_instructions>` |
| except that instead of real operands and modifiers it provides references to their description. |
| |
| Instructions |
| ============ |
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| Notation |
| ~~~~~~~~ |
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| This is the notation used to describe AMDGPU instructions: |
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| ``<``\ :ref:`opcode description<amdgpu_syn_opcode_notation>`\ ``> <``\ :ref:`operands description<amdgpu_syn_instruction_operands_notation>`\ ``> <``\ :ref:`modifiers description<amdgpu_syn_instruction_modifiers_notation>`\ ``>`` |
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| .. _amdgpu_syn_opcode_notation: |
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| Opcode |
| ====== |
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| Notation |
| ~~~~~~~~ |
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| TBD |
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| .. _amdgpu_syn_instruction_operands_notation: |
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| Operands |
| ======== |
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| An instruction may have zero or more *operands*. They are comma-separated in the description: |
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| ``<``\ :ref:`description of operand 0<amdgpu_syn_instruction_operand_notation>`\ ``>, <``\ :ref:`description of operand 1<amdgpu_syn_instruction_operand_notation>`\ ``>, ...`` |
| |
| The order of *operands* is fixed. *Operands* cannot be omitted |
| except for special cases described below. |
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| .. _amdgpu_syn_instruction_operand_notation: |
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| Notation |
| ~~~~~~~~ |
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| An operand is described using the following notation: |
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| *<name><tag0><tag1>...* |
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| Where: |
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| * *name* is a link to a description of the operand. |
| * *tags* are optional. They are used to indicate special operand properties: |
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| .. _amdgpu_syn_instruction_operand_tags: |
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| ============== ================================================================================= |
| Operand tag Meaning |
| ============== ================================================================================= |
| :opt An optional operand. |
| :m An operand which may be used with |
| :ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or |
| :ref:`SDWA operand modifiers<amdgpu_synid_sdwa_operand_modifiers>`. |
| :dst An input operand which may also serve as a destination |
| if :ref:`glc<amdgpu_synid_glc>` modifier is specified. |
| :fx This is an *f32* or *f16* operand depending on |
| :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` modifier. |
| :<type> Operand *type* differs from *type* |
| :ref:`implied by the opcode name<amdgpu_syn_instruction_type>`. |
| This tag specifies actual operand *type*. |
| ============== ================================================================================= |
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| Examples: |
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| .. parsed-literal:: |
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| src1:m // src1 operand may be used with operand modifiers |
| vdata:dst // vdata operand may be used as both source and destination |
| vdst:u32 // vdst operand has u32 type |
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| .. _amdgpu_syn_instruction_modifiers_notation: |
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| Modifiers |
| ========= |
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| An instruction may have zero or more optional *modifiers*. They are space-separated in the description: |
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| ``<``\ :ref:`description of modifier 0<amdgpu_syn_instruction_modifier_notation>`\ ``> <``\ :ref:`description of modifier 1<amdgpu_syn_instruction_modifier_notation>`\ ``> ...`` |
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| The order of *modifiers* is fixed. |
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| .. _amdgpu_syn_instruction_modifier_notation: |
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| Notation |
| ~~~~~~~~ |
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| A *modifier* is described using the following notation: |
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| *<name>* |
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| Where *name* is a link to a description of the *modifier*. |