tree c5de587dc9b3927097382c452429a24245f70cdb
parent 47100f5f523424a284c2ccf3f9442179aa27d6d4
author Craig Topper <craig.topper@intel.com> 1547348399 +0000
committer Craig Topper <craig.topper@intel.com> 1547348399 +0000

[X86] Add more ISD nodes to handle masked versions of VCVT(T)PD2DQZ128/VCVT(T)PD2UDQZ128 which only produce 2 result elements and zeroes the upper elements.

We can't represent this properly with vselect like we normally do. We also have to update the instruction definition to use a VK2WM mask instead of VK4WM to represent this.

Fixes another case from PR34877

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351018 91177308-0d34-0410-b5e6-96231b3b80d8