tree 655331efcbd8b0513657473fd6ff4df0ef2d281c
parent 37a984b8bc0e920d9810572e8531176cab0516a1
author Matt Arsenault <Matthew.Arsenault@amd.com> 1546929053 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> 1546929053 +0000

AMDGPU/GlobalISel: Introduce vcc reg bank

I'm not entirely sure this is the correct thing
to do with the global isel philosophy, but I think
this is necessary to handle how differently SGPRs
are used normally vs. from a condition.

For example, it makes sense to allow a copy
from a VGPR to an SGPR, but it makes no sense
to allow a copy from VGPRs to SGPRs used as
select mask.

This avoids regbankselecting strange code with
a truncate feeding directly into a condition field.
Now a copy is forced from sgpr(s1) to vcc, which is
more sensible to handle.

Some of these issues could probably avoided with making enough
operations resulting in i1 illegal. I think we can't avoid
this register bank for legality.

For example, an i1 and where one source is from a truncate, and
one source is a compare needs some kind of copy inserted to
make sure both are in condition registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350611 91177308-0d34-0410-b5e6-96231b3b80d8