tree d13f0b1b2b60e103b21ffbc4f85607b8c6e32106
parent c500c66b51d4d3b7e8c4d502b461e37f170d6bfa
author Changpeng Fang <changpeng.fang@gmail.com> 1547674373 +0000
committer Changpeng Fang <changpeng.fang@gmail.com> 1547674373 +0000

AMDGPU: Adjust the chain for loads writing to the HI part of a register.

Summary:
  For these loads that write to the HI part of a register, we should chain them to the op that writes to the LO part
of the register to maintain the appropriate order.

Reviewers:
  rampitec, arsenm

Differential Revision:
  https://reviews.llvm.org/D56454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351379 91177308-0d34-0410-b5e6-96231b3b80d8