Recommit "[GlobalISel] Introduce a generic floating point floor opcode, G_FFLOOR""
After r353586, we won't fail on the AMDGPU floor pattern that was killing the
importer before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353589 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/Support/TargetOpcodes.def b/include/llvm/Support/TargetOpcodes.def
index f44f0f1..70a2128 100644
--- a/include/llvm/Support/TargetOpcodes.def
+++ b/include/llvm/Support/TargetOpcodes.def
@@ -530,6 +530,9 @@
/// Floating point square root.
HANDLE_TARGET_OPCODE(G_FSQRT)
+/// Floating point floor.
+HANDLE_TARGET_OPCODE(G_FFLOOR)
+
/// Generic AddressSpaceCast.
HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST)
diff --git a/include/llvm/Target/GenericOpcodes.td b/include/llvm/Target/GenericOpcodes.td
index b61ed92..41d1ed9 100644
--- a/include/llvm/Target/GenericOpcodes.td
+++ b/include/llvm/Target/GenericOpcodes.td
@@ -579,6 +579,13 @@
let hasSideEffects = 0;
}
+// Floating point floor of a value.
+def G_FFLOOR : GenericInstruction {
+ let OutOperandList = (outs type0:$dst);
+ let InOperandList = (ins type0:$src1);
+ let hasSideEffects = 0;
+}
+
//------------------------------------------------------------------------------
// Opcodes for LLVM Intrinsics
//------------------------------------------------------------------------------
diff --git a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
index cbda4ab..6b0434a 100644
--- a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
+++ b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
@@ -93,6 +93,7 @@
def : GINodeEquiv<G_FSIN, fsin>;
def : GINodeEquiv<G_FABS, fabs>;
def : GINodeEquiv<G_FSQRT, fsqrt>;
+def : GINodeEquiv<G_FFLOOR, ffloor>;
// Broadly speaking G_LOAD is equivalent to ISD::LOAD but there are some
// complications that tablegen must take care of. For example, Predicates such
diff --git a/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index 09574f0..ab144ee 100644
--- a/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -340,7 +340,10 @@
# DEBUG: .. the first uncovered type index: 1, OK
#
# DEBUG-NEXT: G_FSQRT (opcode {{[0-9]+}}): 1 type index
-# DEBUG: .. the first uncovered type index: 1, OK
+# DEBUG: .. type index coverage check SKIPPED: user-defined predicate detected
+#
+# DEBUG-NEXT: G_FFLOOR (opcode {{[0-9]+}}): 1 type index
+# DEBUG: .. type index coverage check SKIPPED: no rules defined
# CHECK-NOT: ill-defined
