blob: a81a1a64f617ed1a4e7edf278806695556c4ffeb [file] [log] [blame]
; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
@glob = common local_unnamed_addr global i32 0, align 4
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtui(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_igtui:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK-NEXT: rldicl r3, [[REG]], 1, 63
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i32 %a, %b
%conv = zext i1 %cmp to i32
ret i32 %conv
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtui_sext(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_igtui_sext:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK-NEXT: sradi r3, [[REG]], 63
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i32 %a, %b
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtui_z(i32 zeroext %a) {
; CHECK-LABEL: test_igtui_z:
; CHECK: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%conv = zext i1 %cmp to i32
ret i32 %conv
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtui_sext_z(i32 zeroext %a) {
; CHECK-LABEL: test_igtui_sext_z:
; CHECK: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind
define void @test_igtui_store(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_igtui_store:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63
entry:
%cmp = icmp ugt i32 %a, %b
%conv = zext i1 %cmp to i32
store i32 %conv, i32* @glob, align 4
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtui_sext_store(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_igtui_sext_store:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK: sradi {{r[0-9]+}}, [[REG]], 63
entry:
%cmp = icmp ugt i32 %a, %b
%sub = sext i1 %cmp to i32
store i32 %sub, i32* @glob, align 4
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtui_z_store(i32 zeroext %a) {
; CHECK-LABEL: test_igtui_z_store:
; CHECK: cntlzw r3, r3
; CHECK: srwi r3, r3, 5
; CHECK: xori r3, r3, 1
; CHECK: stw r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%conv = zext i1 %cmp to i32
store i32 %conv, i32* @glob, align 4
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtui_sext_z_store(i32 zeroext %a) {
; CHECK-LABEL: test_igtui_sext_z_store:
; CHECK: cntlzw r3, r3
; CHECK: srwi r3, r3, 5
; CHECK: xori r3, r3, 1
; CHECK: neg r3, r3
; CHECK: stw r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%sub = sext i1 %cmp to i32
store i32 %sub, i32* @glob, align 4
ret void
}