test/CodeGen/AMDGPU/GlobalISel/legalize-load.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s

---
name: test_load_global_i32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_i32
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; SI: $vgpr0 = COPY [[LOAD]](s32)
    ; VI-LABEL: name: test_load_global_i32
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; VI: $vgpr0 = COPY [[LOAD]](s32)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_LOAD %0 :: (load 4, addrspace 1)
    $vgpr0 = COPY %1
...

---
name: test_load_global_i64
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_i64
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; SI: $vgpr0 = COPY [[LOAD]](s32)
    ; VI-LABEL: name: test_load_global_i64
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; VI: $vgpr0 = COPY [[LOAD]](s32)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_LOAD %0 :: (load 4, addrspace 1)
    $vgpr0 = COPY %1
...

---
name: test_load_global_p1
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_p1
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
    ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
    ; VI-LABEL: name: test_load_global_p1
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
    ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](p1)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(p1) = G_LOAD %0 :: (load 8, addrspace 1)
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_load_global_p4
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_p4
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
    ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p4)
    ; VI-LABEL: name: test_load_global_p4
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
    ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](p4)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(p4) = G_LOAD %0 :: (load 8, addrspace 1)
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_load_global_p3
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_p3
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; SI: $vgpr0 = COPY [[LOAD]](p3)
    ; VI-LABEL: name: test_load_global_p3
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; VI: $vgpr0 = COPY [[LOAD]](p3)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(p3) = G_LOAD %0 :: (load 4, addrspace 1)
    $vgpr0 = COPY %1
...

---
name: test_load_global_v2s32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_v2s32
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
    ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
    ; VI-LABEL: name: test_load_global_v2s32
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1)
    ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, addrspace 1)
    $vgpr0_vgpr1 = COPY %1
...

---

name: test_load_global_v2s16
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_v2s16
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; SI: $vgpr0 = COPY [[LOAD]](<2 x s16>)
    ; VI-LABEL: name: test_load_global_v2s16
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; VI: $vgpr0 = COPY [[LOAD]](<2 x s16>)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, addrspace 1)
    $vgpr0 = COPY %1
...

---
name: test_load_global_v3i32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_v3i32
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p1) :: (load 4, addrspace 1)
    ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
    ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0
    ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64
    ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>)
    ; VI-LABEL: name: test_load_global_v3i32
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1)
    ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(<3 x s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 1)
    $vgpr0_vgpr1_vgpr2 = COPY %1
...

---
name: test_ext_load_global_s64_from_1_align1
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_ext_load_global_s64_from_1_align1
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, align 4, addrspace 1)
    ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
    ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
    ; VI-LABEL: name: test_ext_load_global_s64_from_1_align1
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, align 4, addrspace 1)
    ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
    ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s64) = G_LOAD %0 :: (load 1, addrspace 1, align 4)
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_ext_load_global_s64_from_2_align2
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_ext_load_global_s64_from_2_align2
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 2, align 4, addrspace 1)
    ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
    ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
    ; VI-LABEL: name: test_ext_load_global_s64_from_2_align2
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 2, align 4, addrspace 1)
    ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
    ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s64) = G_LOAD %0 :: (load 2, addrspace 1, align 4)
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_ext_load_global_s64_from_4_align4
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_ext_load_global_s64_from_4_align4
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
    ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
    ; VI-LABEL: name: test_ext_load_global_s64_from_4_align4
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
    ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s64) = G_LOAD %0 :: (load 4, addrspace 1, align 4)
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_ext_load_global_s128_from_4_align4
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_ext_load_global_s128_from_4_align4
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; SI: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[LOAD]](s32)
    ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ANYEXT]](s128)
    ; VI-LABEL: name: test_ext_load_global_s128_from_4_align4
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1)
    ; VI: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[LOAD]](s32)
    ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ANYEXT]](s128)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s128) = G_LOAD %0 :: (load 4, addrspace 1, align 4)
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1

...

---
name: test_load_global_s96_align4
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_s96_align4
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p1) :: (load 4, addrspace 1)
    ; SI: [[DEF:%[0-9]+]]:_(s96) = G_IMPLICIT_DEF
    ; SI: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[DEF]], [[LOAD]](s64), 0
    ; SI: [[INSERT1:%[0-9]+]]:_(s96) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64
    ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](s96)
    ; VI-LABEL: name: test_load_global_s96_align4
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1)
    ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s96) = G_LOAD %0 :: (load 12, addrspace 1, align 4)
    $vgpr0_vgpr1_vgpr2 = COPY %1

...

---
name: test_load_global_s160_align4
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_s160_align4
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; SI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
    ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p1) :: (load 4, addrspace 1)
    ; SI: [[DEF:%[0-9]+]]:_(s160) = G_IMPLICIT_DEF
    ; SI: [[INSERT:%[0-9]+]]:_(s160) = G_INSERT [[DEF]], [[LOAD]](s64), 0
    ; SI: [[INSERT1:%[0-9]+]]:_(s160) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
    ; SI: [[INSERT2:%[0-9]+]]:_(s160) = G_INSERT [[INSERT1]], [[LOAD2]](s32), 128
    ; SI: S_NOP 0, implicit [[INSERT2]](s160)
    ; VI-LABEL: name: test_load_global_s160_align4
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
    ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; VI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
    ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; VI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
    ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p1) :: (load 4, addrspace 1)
    ; VI: [[DEF:%[0-9]+]]:_(s160) = G_IMPLICIT_DEF
    ; VI: [[INSERT:%[0-9]+]]:_(s160) = G_INSERT [[DEF]], [[LOAD]](s64), 0
    ; VI: [[INSERT1:%[0-9]+]]:_(s160) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
    ; VI: [[INSERT2:%[0-9]+]]:_(s160) = G_INSERT [[INSERT1]], [[LOAD2]](s32), 128
    ; VI: S_NOP 0, implicit [[INSERT2]](s160)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s160) = G_LOAD %0 :: (load 20, addrspace 1, align 4)
    S_NOP 0, implicit %1
...

---
name: test_load_global_s224_align4
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_s224_align4
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; SI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
    ; SI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[GEP1]](p1) :: (load 8, align 4, addrspace 1)
    ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
    ; SI: [[GEP2:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C2]](s64)
    ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[GEP2]](p1) :: (load 4, addrspace 1)
    ; SI: [[DEF:%[0-9]+]]:_(s224) = G_IMPLICIT_DEF
    ; SI: [[INSERT:%[0-9]+]]:_(s224) = G_INSERT [[DEF]], [[LOAD]](s64), 0
    ; SI: [[INSERT1:%[0-9]+]]:_(s224) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
    ; SI: [[INSERT2:%[0-9]+]]:_(s224) = G_INSERT [[INSERT1]], [[LOAD2]](s64), 128
    ; SI: [[INSERT3:%[0-9]+]]:_(s224) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 192
    ; SI: [[DEF1:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
    ; SI: [[INSERT4:%[0-9]+]]:_(s256) = G_INSERT [[DEF1]], [[INSERT3]](s224), 0
    ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT4]](s256)
    ; VI-LABEL: name: test_load_global_s224_align4
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 4, addrspace 1)
    ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; VI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p1) :: (load 8, align 4, addrspace 1)
    ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; VI: [[GEP1:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C1]](s64)
    ; VI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[GEP1]](p1) :: (load 8, align 4, addrspace 1)
    ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
    ; VI: [[GEP2:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C2]](s64)
    ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[GEP2]](p1) :: (load 4, addrspace 1)
    ; VI: [[DEF:%[0-9]+]]:_(s224) = G_IMPLICIT_DEF
    ; VI: [[INSERT:%[0-9]+]]:_(s224) = G_INSERT [[DEF]], [[LOAD]](s64), 0
    ; VI: [[INSERT1:%[0-9]+]]:_(s224) = G_INSERT [[INSERT]], [[LOAD1]](s64), 64
    ; VI: [[INSERT2:%[0-9]+]]:_(s224) = G_INSERT [[INSERT1]], [[LOAD2]](s64), 128
    ; VI: [[INSERT3:%[0-9]+]]:_(s224) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 192
    ; VI: [[DEF1:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF
    ; VI: [[INSERT4:%[0-9]+]]:_(s256) = G_INSERT [[DEF1]], [[INSERT3]](s224), 0
    ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT4]](s256)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s224) = G_LOAD %0 :: (load 28, addrspace 1, align 4)

     %2:_(s256) = G_IMPLICIT_DEF
     %3:_(s256) = G_INSERT %2, %1, 0
     $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %3

...

---
name: test_load_global_v3s32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; SI-LABEL: name: test_load_global_v3s32
    ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p1) :: (load 8, align 16, addrspace 1)
    ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; SI: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[C]](s64)
    ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p1) :: (load 4, align 8, addrspace 1)
    ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
    ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0
    ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64
    ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>)
    ; VI-LABEL: name: test_load_global_v3s32
    ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1)
    ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(<3 x s32>) = G_LOAD %0 :: (load 12, addrspace 1, align 16)
    $vgpr0_vgpr1_vgpr2 = COPY %1
...