)]}' { "log": [ { "commit": "de9a1c1629836a0c2e3d2a443b92d304472ee002", "tree": "7c273b495d2351feb2d50b4c6d91c238514b3b48", "parents": [ "62cabc26cc0e9689820855d02bebd04d21b62c4a" ], "author": { "name": "Tom Tromey", "email": "tromey@adacore.com", "time": "Fri Apr 03 12:40:37 2026 -0600" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 11:45:30 2026 -0700" }, "message": "Introduce and use Verifier::visitDIType (#189067)\n\nThis adds a new method Verifier::visitDIType, and then changes method\nfor subclasses of DIType to call it. The new method just dispatches to\nDIScope and adds a file/line check inspired by\nVerifier::visitDISubprogram.\nGitOrigin-RevId: 8d345457927330fbfdf7bdfa0ad7ee5b4ee27935\n" }, { "commit": "62cabc26cc0e9689820855d02bebd04d21b62c4a", "tree": "2ec29a8e6390c693f23ffa6779310acadac4ec76", "parents": [ "79afca7a71372837e057bca71a0abe65c3f868cf" ], "author": { "name": "Md Abdullah Shahneous Bari", "email": "md.abdullah.shahneous.bari@intel.com", "time": "Fri Apr 03 12:45:40 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 10:50:25 2026 -0700" }, "message": "[mlir][gpu] Extend `mgpumoduleLoadJIT` API to add assemblySize parameter (#189429)\n\nWhen JITing SPIR-V using LevelZero API, it expects the length of the\nstring since passed input data is a `void *`. Problem is, getting the\nlength of the string is not possible using something like\n`strlen(reinterpret_cast\u003cchar *\u003e(data))` in `mgpuModuleLoadJIT`\nimplementation. Becasuse the SPIR-V binary contains null bytes (i.e.,\nthe data is binary SPIR-V, not null-terminated text).\n\nAs a result we need to pass the `assmeblySize` via the\n`mgpuModuleLoadJIT(void* data, int optLevel, size_t assmeblySize)`.\n\nGitOrigin-RevId: ffd29734cc41f6dc8aa340de047f221e30d312c9\n" }, { "commit": "79afca7a71372837e057bca71a0abe65c3f868cf", "tree": "9f881a4d296f0f8c4b846bb321124c9d734c4531", "parents": [ "6e84b5707aa126a4ef61a7c830ca2599a350b8f6" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Apr 03 16:05:08 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 07:11:13 2026 -0700" }, "message": "[MLIR][Arith] Fix index_cast/index_castui chain folding to check intermediate width (#189042)\n\nThe patterns `IndexCastOfIndexCast` and `IndexCastUIOfIndexCastUI` in\nArithCanonicalization.td incorrectly eliminated a pair of index casts\nwhenever the outer result type equalled the original source type,\nwithout verifying that the intermediate cast was lossless.\n\nFor example, the following was wrong folded to `%arg0`:\n %0 \u003d index_castui %arg0 : i64 to index\n %1 \u003d index_castui %0 : index to i8 ← truncates to 8 bits\n %2 \u003d index_castui %1 : i8 to index ← incorrectly removed\n\nThe pattern matched `%1`/`%2` because `i8.to(index)` has the same result\ntype as `i64.to(index)`, even though the i8 intermediate silently drops\n56 bits. The same bug existed for the signed `index_cast` variant.\n\nFix: move the optimization into the `fold` methods of `IndexCastOp` and\n`IndexCastUIOp` with an explicit check that the intermediate type is at\nleast as wide as the source type (using\n`IndexType::kInternalStorageBitWidth` as the representative width for\n`index`). Only then is the round-trip guaranteed lossless and the chain\ncan be collapsed.\n\nFixes #90238\nFixes #90296\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 8c81064169c5c864f5a3e4b9474164e025b274b7\n" }, { "commit": "6e84b5707aa126a4ef61a7c830ca2599a350b8f6", "tree": "4104d8ba1d9a2dcf23e1c749abd17a130a207588", "parents": [ "bdd980eb747d35dda64c871ef881bd281710f270" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Apr 03 13:09:26 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 04:10:30 2026 -0700" }, "message": "[mlir][linalg] Fix crash in tile_reduction when output map has constant exprs (#189166)\n\n`generateInitialTensorForPartialReduction` and the `getInitSliceInfo*`\nhelpers unconditionally cast every result expression of the partial\nresult AffineMap to `AffineDimExpr`. When the original output indexing\nmap contains a constant (e.g. `affine_map\u003c(d0,d1,d2)-\u003e(d0,0,d2)\u003e`), the\nconstant expression propagates into the partial map and the cast\ntriggers an assertion.\n\nFixes #173025\n\nAssisted-by: Claude Code\nGitOrigin-RevId: c2ec012098df051e698d57b3ec9b58c625761bf6\n" }, { "commit": "bdd980eb747d35dda64c871ef881bd281710f270", "tree": "c0f34711926b49c7704f2356792e206ac2d76656", "parents": [ "ba2a53bfd6c721b7aa6497386af21cbefb40674a" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Apr 03 13:07:26 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 04:10:21 2026 -0700" }, "message": "[mlir][Affine] Fix LICM incorrectly hoisting stores from zero-trip-count loops (#189165)\n\nThe affine-loop-invariant-code-motion pass was hoisting side-effectful\noperations (e.g. affine.store) out of loops whose trip count is\nstatically known to be zero. This caused stores to execute\nunconditionally even though the loop body should never run, producing\nincorrect results.\n\nThe fix skips hoisting of non-memory-effect-free ops when\ngetConstantTripCount returns 0. Pure/side-effect-free ops are still\neligible for hoisting because they cannot change observable program\nstate.\n\nFixes #128273\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 73bcfb6824a9bfdeee215590c541cce745e556ef\n" }, { "commit": "ba2a53bfd6c721b7aa6497386af21cbefb40674a", "tree": "6245ae8b31b9dc6afed006005eb0fc2a5ddbf4a3", "parents": [ "e4631fe9db3229c63b24bdede81d980f78cbd902" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Apr 03 11:21:00 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 02:25:49 2026 -0700" }, "message": "[MLIR][MemRef] Fix AllocOp/AllocaOp flattening domination violation (#188980)\n\nThe generic MemRefRewritePattern handles AllocOp/AllocaOp by calling\ngetFlattenMemrefAndOffset with the op\u0027s own result as the source memref.\nThis inserts ExtractStridedMetadataOp and ReinterpretCastOp that consume\nop.result before the alloc op itself in the block. After\nreplaceOpWithNewOp, op.result is RAUW\u0027d to the new ReinterpretCastOp\nresult, leaving those earlier ops with forward references — a domination\nviolation caught by MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.\n\nReplace the AllocOp/AllocaOp cases in MemRefRewritePattern with a\ndedicated AllocLikeFlattenPattern that never touches op.result until the\nfinal replaceOpWithNewOp:\n- sizes come from op.getMixedSizes() (operands, not the result)\n- strides come from getStridesAndOffset on the MemRefType\n- the flat allocation size is computed via\ngetLinearizedMemRefOffsetAndSize plus the static base offset so the\nbuffer covers [0, offset+extent)\n- castAllocResult is simplified to take the pre-computed sizes and\nstrides rather than inserting an ExtractStridedMetadataOp on the\noriginal op\n- non-zero static base offsets are now correctly preserved in the\nreinterpret_cast (the old code hardcoded offset\u003d0, which was a verifier\nerror for layouts with offset \\!\u003d 0)\n- dynamic offsets or strides bail out via notifyMatchFailure\n\nAlso remove the now-dead AllocOp/AllocaOp branches from replaceOp() and\nthe constexpr specialisation in getIndices().\n\nAssisted-by: Claude Code\nGitOrigin-RevId: ff86be21de109403175caf6d906be856210df494\n" }, { "commit": "e4631fe9db3229c63b24bdede81d980f78cbd902", "tree": "dfa28665846b7d7a8c4a858fc7c722fdfede1166", "parents": [ "36efdf65d49e5b16012ea18802a6e1e6f03df6ca" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Apr 03 10:17:50 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 01:20:17 2026 -0700" }, "message": "[MLIR][Affine] Fix null operands in simplifyConstrainedMinMaxOp (#189246)\n\n`mlir::affine::simplifyConstrainedMinMaxOp` called\n`canonicalizeMapAndOperands` with `newOperands` that could contain null\n`Value()`s. These nulls came from\n`unpackOptionalValues(constraints.getMaybeValues(), newOperands)` where\ninternal constraint variables added by `appendDimVar` (for `dimOp`,\n`dimOpBound`, and `resultDimStart*`) have no associated SSA values.\n\nPassing null Values to `canonicalizeMapAndOperands` risks undefined\nbehavior:\n- `seenDims.find(null_value)` in the DenseMap causes all null operands\nto collide at the same key, producing incorrect dim remapping.\n- Any null operand that remains referenced in the result map would\npropagate as a null Value into `AffineValueMap`, crashing callers that\ntry to use those operands to create ops.\n\nFix: Before calling `canonicalizeMapAndOperands`, filter null operands\nfrom `newOperands` by replacing their dim/symbol positions in `newMap`\nwith constant 0 (safe because internal constraint dims should not appear\nin the bound map expression) and compacting `newOperands` to contain\nonly non-null Values.\n\nFixes #127436\n\nAssisted-by: Claude Code\nGitOrigin-RevId: d725513e7d92a2f815eb19c3aee06b599b42e834\n" }, { "commit": "36efdf65d49e5b16012ea18802a6e1e6f03df6ca", "tree": "5e7de4fe6734022937c9613621648e271214cbb2", "parents": [ "6972d1a8658a02139962e92d16a315a150222ccc" ], "author": { "name": "Zhewen Yu", "email": "zhewenyu@amd.com", "time": "Fri Apr 03 09:15:52 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Apr 03 01:20:09 2026 -0700" }, "message": "[mlir][IntRangeAnalysis] Fix assertion in inferAffineExpr for mod with range crossing modulus boundary (#188842)\n\nThe \"small range with constant divisor\" optimization in\n`inferAffineExpr` for `AffineExprKind::Mod` assumed that if the dividend\nrange span (`lhsMax - lhsMin`) is less than the divisor, then the mod\nresults form a contiguous range. This is not always true, as the range\ncan straddle a modulus boundary.\n\nFor example, `[14, 17] mod 8`:\n- Span is 3 \u003c 8, so the old condition passed\n- But `14%8\u003d6` and `17%8\u003d1` (wraps at 16)\n- `umin\u003d6, umax\u003d1` → assertion `umin.ule(umax)` fails\n\nThe fix adds a same-quotient check (`lhsMin/rhs \u003d\u003d lhsMax/rhs`) to\nensure both endpoints fall within the same modular period. When they\ndon\u0027t, we fall back to the conservative `[0, divisor-1]` range.\n\nAssisted-by: Cursor (Claude)\n\nSigned-off-by: Yu-Zhewen \u003czhewenyu@amd.com\u003e\nGitOrigin-RevId: a7bf24919f879fed809b16bff33623d821b11226\n" }, { "commit": "6972d1a8658a02139962e92d16a315a150222ccc", "tree": "42023af4e1115d90f264636e60a3d3e214ef3388", "parents": [ "354f669239eea37f355233dd82de2e76a8ef0c6e" ], "author": { "name": "lonely eagle", "email": "2020382038@qq.com", "time": "Fri Apr 03 14:49:01 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 23:50:48 2026 -0700" }, "message": "[mlir][reducer] Remove the restriction that OptReductionPass must be a ModuleOp (#189038)\n\nThis PR aims to make the pass more generic by removing the ModuleOp\nrestriction. This PR reimplements the logic using a standalone\nPassManager. Additionally, the isInteresting method has been updated to\naccept Operation* for better flexibility. Finally, a dedicated test\ndirectory has been added to improve the organization of OptReductionPass\ntests.\n\nGitOrigin-RevId: 8db1f6492a9139ae5f521a508a9496ea36627bf3\n" }, { "commit": "354f669239eea37f355233dd82de2e76a8ef0c6e", "tree": "5c879d908f180d1b6aff703825a2bc9f9fdb90fa", "parents": [ "b388fa60605af1dc45de83f13700e3d8d588fa90" ], "author": { "name": "xys-syx", "email": "xuyuansui@outlook.com", "time": "Thu Apr 02 14:41:50 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 12:46:31 2026 -0700" }, "message": "[MLIR][NVVM] Derive NVVM_SyncWarpOp from NVVM_IntrOp for import support (#188415)\n\nChange `NVVM_SyncWarpOp` base class from `NVVM_Op` to\n`NVVM_IntrOp\u003c\"bar.warp.sync\"\u003e`, which auto-generates `llvmEnumName \u003d\nnvvm_bar_warp_sync` and registers it with\n`-gen-intr-from-llvmir-conversions` and\n`-gen-convertible-llvmir-intrinsics`. This enables LLVM IR to MLIR\nimport. The hand-written `llvmBuilder` is removed as the default\n`LLVM_IntrOpBase` builder is equivalent.\n\nGitOrigin-RevId: 1474e3e4f46550f66ed7ab4c5b2810ffadb630f1\n" }, { "commit": "b388fa60605af1dc45de83f13700e3d8d588fa90", "tree": "f720686234005b8515529cbfd40d93821c7ed6e8", "parents": [ "252d48771a816f2b2f40a9ee6b60db11ed0b77ec" ], "author": { "name": "Bangtian Liu", "email": "liubangtian@gmail.com", "time": "Thu Apr 02 15:02:12 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 12:05:12 2026 -0700" }, "message": "[mlir][GPU] Add constant address space to GPU dialect (#190211)\n\nThis PR adds a `constant` address space to the` GPU dialect and\nlowerings to all GPU backends.\n\nSigned-off-by: Bangtian Liu \u003cliubangtian@gmail.com\u003e\nGitOrigin-RevId: 86b5f11eccaf89c73a63a56ba5e5305600798c3c\n" }, { "commit": "252d48771a816f2b2f40a9ee6b60db11ed0b77ec", "tree": "4e22bfcd9487eb183e122552db8b9c0a4e92c3bc", "parents": [ "0c6cc217d4ba26b7750b07c01b17d50ba92cbfd2" ], "author": { "name": "Leandro Lupori", "email": "leandro.lupori@linaro.org", "time": "Thu Apr 02 11:09:30 2026 -0300" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 07:10:51 2026 -0700" }, "message": "Revert \"Reland \"[flang][OpenMP] Fix lowering of LINEAR iteration variables (#183794)\"\" (#190180)\n\nReverts llvm/llvm-project#188851\n\nGitOrigin-RevId: d59356aac5aee1d827d405b5611bb51cdcf72001\n" }, { "commit": "0c6cc217d4ba26b7750b07c01b17d50ba92cbfd2", "tree": "444608b7075770de7d35a773a68a59553d8d7af8", "parents": [ "35af7ca8e3191875e68d598bce8af1d53e61b514" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Apr 02 15:57:53 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 07:00:22 2026 -0700" }, "message": "[mlir][linalg] Add test for ReduceOp empty-input verifier; remove dead empty-output check (#189614)\n\nAdd a FileCheck test covering the \u0027expected at least one input\u0027 error in\nReduceOp::verify(). The companion \u0027expected at least one output\u0027 check\nwas dead code: SameVariadicOperandSize fires first whenever\ninputs.size() \\!\u003d inits.size(), and when both are empty the input check\nfires first; remove the unreachable branch.\n\nAssisted-by: Claude Code\nGitOrigin-RevId: a36f821e7749618e6910b39778911c907dcd2c6f\n" }, { "commit": "35af7ca8e3191875e68d598bce8af1d53e61b514", "tree": "e9c1f67b9fc075ded2f3e69a9ab1251843e291ec", "parents": [ "21067ef24ab0ea8b2f1ff78a26539a7d40e2ae5a" ], "author": { "name": "Dhruv Chauhan", "email": "dhruv.chauhan@arm.com", "time": "Thu Apr 02 14:48:44 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 06:50:19 2026 -0700" }, "message": "Revert \"[mlir][tensor] Forward concat insert_slice destination into DPS provider\" (#190143)\n\nThis reverts commit 1418f80.\n\nThe change can cause an infinite rewrite loop when\nForwardConcatInsertSliceDest interacts with\nFoldEmptyTensorWithExtractSliceOp.\n\nGitOrigin-RevId: b87be02cc74db3a929b4b72a26f2577dc8b7fa11\n" }, { "commit": "21067ef24ab0ea8b2f1ff78a26539a7d40e2ae5a", "tree": "f4870687f7d9f19a8b1af4188e48b190b35c7cd7", "parents": [ "3b6c7d2ce50ed949a06d3fbd15223986b0ab9ef0" ], "author": { "name": "Julian Oppermann", "email": "julian.oppermann@intel.com", "time": "Thu Apr 02 10:50:21 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Apr 02 01:52:51 2026 -0700" }, "message": "[MLIR][Linalg] Generic to category specialization for unary elementwise ops (#187217)\n\nHandle specialization of `linalg.generic` ops representing a unary\nelementwise computation to the `linalg.elementwise` category op. This\nimplements a previously absent path in the linalg morphism.\n\nGitOrigin-RevId: 018e048daf9dcc5e21f1372b85e9f0a6e4597c64\n" }, { "commit": "3b6c7d2ce50ed949a06d3fbd15223986b0ab9ef0", "tree": "db45df9a1854ce8f002fc384b1d48bf2072f2105", "parents": [ "152903968d2d5819c0abcdf19b5491c90088217f" ], "author": { "name": "yebinchon", "email": "86588366+yebinchon@users.noreply.github.com", "time": "Wed Apr 01 23:10:56 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 20:15:15 2026 -0700" }, "message": "[mlir] added a check in the walk to prevent catching a cos in a nested region (#190064)\n\nThe walk in SincosFusion may detect a cos within a nested region of the\nsin block. This triggers an assertion in `isBeforeInBlock` later on.\nAdded a check within the walk so it filters operations in nested\nregions, which are not in the same block and should not be fused anyway.\n\n---------\n\nCo-authored-by: Yebin Chon \u003cychon@nvidia.com\u003e\nGitOrigin-RevId: 495e1a42579c8f540303ab72e6449a448b89e537\n" }, { "commit": "152903968d2d5819c0abcdf19b5491c90088217f", "tree": "3531b93d52b22fd871a0ad64b510b9e807fa35fe", "parents": [ "8d3ea148953162a420423ea75a1169f0bfed83f9" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Wed Apr 01 14:59:08 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 15:01:47 2026 -0700" }, "message": "[MLIR][Vector] Enhance vector.multi_reduction unrolling to handle scalar result (#188633)\n\nPreviously, UnrollMultiReductionPattern bailed out when all the\ndimensions were reduced to a scalar. This PR adds support for this case\nby tiling the source vector and chaining partial reductions through the\naccumulator operand.\n\nGitOrigin-RevId: b3ca423a78ec436936834170cd8b96a25d3f8b7e\n" }, { "commit": "8d3ea148953162a420423ea75a1169f0bfed83f9", "tree": "3fb0e77621bb2eac84b36371f11e5d90f674c162", "parents": [ "213745f8ac5259df71f72c4443f6773b999bce0c" ], "author": { "name": "Jianhui Li", "email": "jian.hui.li@intel.com", "time": "Wed Apr 01 14:58:01 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 15:01:33 2026 -0700" }, "message": "[MLIR][XeGPU] Support round-robin layout for constant and broadcast in wg-to-sg distribution (#189798)\n\nAs title.\n\nGitOrigin-RevId: 1a1fbf967addf3a1d7837a8f75fb3414daa34e73\n" }, { "commit": "213745f8ac5259df71f72c4443f6773b999bce0c", "tree": "aa90f1aff786833ff4762012e0b8101cbb82191e", "parents": [ "c0e6e3dd0067016c7e32f69fbe2c67f259ff3320" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Wed Apr 01 13:55:11 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 14:00:25 2026 -0700" }, "message": "[MLIR][XeGPU] Enhance the peephole optimization to remove the convert_layout after multi-reduction rewrite (#188849)\n\nGitOrigin-RevId: 9f500046511e6e85345d9229bb2d4d2e627bb9d4\n" }, { "commit": "c0e6e3dd0067016c7e32f69fbe2c67f259ff3320", "tree": "b71a6ee2de8ef5317c9091db71778879cbcf82b1", "parents": [ "9dcaaeca4182d88ac1b22a6fb54e170987c655b4" ], "author": { "name": "Jianhui Li", "email": "jian.hui.li@intel.com", "time": "Wed Apr 01 13:01:34 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 13:05:03 2026 -0700" }, "message": "[MLIR][XeGPU] Add Layout Propagation support for multi-reduction/reduction op with scalar result (#189133)\n\nThis PR add Layout Propagation support for multi-reduction/reduction op\nwith scalar result:\n1) Enhance setupMultiReductionResultLayout() and\nLayoutInfoPropagation::visitVectorMultiReductionOp() to support scalar\nresult\n2) Add propagation support for vector.reduction op at the lane level,\nsince the op is only introduced at the lane level.\nGitOrigin-RevId: 401ba6df84f66885fdf68d4d1fb52b422c338b89\n" }, { "commit": "9dcaaeca4182d88ac1b22a6fb54e170987c655b4", "tree": "1def2fed1419cf36dc40483b4d35466fa2db2dfd", "parents": [ "9f8a4895161d8b015561b84a7d143f63c3184858" ], "author": { "name": "Jeff Sandoval", "email": "jeffreysandoval@users.noreply.github.com", "time": "Wed Apr 01 14:59:16 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 13:00:28 2026 -0700" }, "message": "[OpenMP][MLIR] Fix GPU teams reduction buffer size for by-ref reductions (#185460)\n\nThe `ReductionDataSize` field in `KernelEnvironmentTy` and the\n`MaxDataSize` used to compute the `reduce_data_size` argument to\n`__kmpc_nvptx_teams_reduce_nowait_v2` were both computed using pointer\ntypes for by-ref reductions instead of the actual element types. This\ncaused the global teams reduction buffer to be undersized relative to\nthe offsets used by the copy/reduce callbacks, resulting in\nout-of-bounds accesses faults at runtime.\n\nFor example, a by-ref reduction over `[4 x i32]` (16 bytes) would\nallocate buffer slots based on `sizeof(ptr)` \u003d 8 bytes, but the\ngenerated callbacks would access 16 bytes per slot.\n\nFix both computation sites:\n\n1. In MLIR\u0027s `getReductionDataSize()`, use\n`DeclareReductionOp::getByrefElementType()` instead of `getType()` when\nthe reduction is by-ref, so the reduction buffer struct layout (and more\nimportantly its size) matches that emitted by the `OMPIRBuilder`.\n\n2. In `OMPIRBuilder::createReductionsGPU()`, use\n`ReductionInfo::ByRefElementType` instead of `ElementType` for by-ref\nreductions when computing `MaxDataSize`. It seems that `MaxDataSize`\nisn\u0027t actually used in the deviceRTL, but it\u0027s better to fix it to avoid\nfuture propagation of this bug.\n\nFinally, add CHECK lines to the existing array-descriptor reduction test\nto verify both the kernel environment `ReductionDataSize` and the\n`reduce_data_size` call argument reflect the actual element type size.\n\nAssisted-by: Claude Opus 4.6\n\n---------\n\nCo-authored-by: Jeffrey Sandoval \u003cjeffrey.sandoval@hpe.com\u003e\nGitOrigin-RevId: 95a76886c1b5da2af87bb28541d34def63a98d82\n" }, { "commit": "9f8a4895161d8b015561b84a7d143f63c3184858", "tree": "fea34af6a23e3205520edde5ca96198b2eb57789", "parents": [ "fab55331fe654d65c5cdbca60227e74747537392" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Wed Apr 01 12:05:32 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 12:09:06 2026 -0700" }, "message": "[MLIR][XeGPU] Add support for convert layout with scalar in Sg to WI distribution (#189721)\n\nGitOrigin-RevId: 150aa6f2d385d9c1ffa378e16595d7a738f921fc\n" }, { "commit": "fab55331fe654d65c5cdbca60227e74747537392", "tree": "678103bdce6061bcf91a85f1fd9baf947e535bc6", "parents": [ "3114857f5f0c33cfb5a51802063f98e89f89905f" ], "author": { "name": "Zhen Wang", "email": "zhenw@nvidia.com", "time": "Wed Apr 01 11:18:20 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 11:20:52 2026 -0700" }, "message": "[mlir][NVVM] Add managed attribute for global variables (#189751)\n\nAdd support for the `nvvm.managed` attribute on `llvm.mlir.global` ops.\nWhen present, the LLVM IR translation emits `!nvvm.annotations` metadata\nwith `!\"managed\"` for the global variable, which the NVPTX backend uses\nto generate `.attribute(.managed)` in PTX output.\n\nThis enables CUDA managed memory support for frontends that lower\nthrough MLIR.\n\nGitOrigin-RevId: 3b3b556a12a79109785394233779d89982068705\n" }, { "commit": "3114857f5f0c33cfb5a51802063f98e89f89905f", "tree": "cb7c2dc398a81c98df16efd80f9070be2168c5f0", "parents": [ "90724f126f788ae29a86e7fca8ac235cd762bb1e" ], "author": { "name": "Vito Secona", "email": "77039267+secona@users.noreply.github.com", "time": "Thu Apr 02 00:42:26 2026 +0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 10:46:04 2026 -0700" }, "message": "[mlir][sparse] add GPU num threads to sparsifier options (#189078)\n\nThis change adds a `gpu-num-threads` option to the sparsifier. This\nallows users to specify the number of threads used for GPU codegen,\nsimilar to the `num-threads` option in the `-sparse-gpu-codegen` pass.\n\nGitOrigin-RevId: fbf484009c782a3ecb8bae6526d4c10d006365fc\n" }, { "commit": "90724f126f788ae29a86e7fca8ac235cd762bb1e", "tree": "0ad4e80cad1ef1e79dcc008c1a24bfade937270f", "parents": [ "635100ec2694ca96bdbcca4c3a996bc3f3785817" ], "author": { "name": "Jan Leyonberg", "email": "jan_sjodin@yahoo.com", "time": "Wed Apr 01 12:50:09 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 09:55:38 2026 -0700" }, "message": "[CIR][MLIR][OpenMP] Enable the MarkDeclareTarget pass for ClangIR (#189420)\n\nThis patch enables the MarkDeclareTarget for CIR by adding the pass to\nthe lowerings and attaching the declare target interface to the\ncir::FuncOp. The MarkDeclareTarget is also generalized to work on the\nFunctionOpInterface instead of func::Op since it needs to be able to\nhandle cir::FuncOp as well.\n\nCo-authored-by: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 91adaeceb162357a33e2ea6155cb13a4198a981a\n" }, { "commit": "635100ec2694ca96bdbcca4c3a996bc3f3785817", "tree": "73edb37e6e09887b712a78d4e37aefee99ee7e49", "parents": [ "444180cb2cdb30c9bbaa2a5db9d8ee11e4c02ea8" ], "author": { "name": "Razvan Lupusoru", "email": "razvan.lupusoru@gmail.com", "time": "Wed Apr 01 09:03:47 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 09:06:07 2026 -0700" }, "message": "[flang][acc] Add AA implementation for acc operations (#189772)\n\nThis PR extends flang\u0027s alias analysis so it can reason about values\nthat originate from OpenACC data and privatization operations, including\nvalues passed through block arguments.\n\nGitOrigin-RevId: 9506f20b4dccc6334cc36e04c93033d575cfee52\n" }, { "commit": "444180cb2cdb30c9bbaa2a5db9d8ee11e4c02ea8", "tree": "3605d6974c1b820d9701dfc70153a9f7b20131dd", "parents": [ "6745112916ece5dfe2b1858f5987bcb82cdedbbc" ], "author": { "name": "Ming Yan", "email": "ming.yan@terapines.com", "time": "Wed Apr 01 21:30:12 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 06:35:13 2026 -0700" }, "message": "[mlir][memref] Fold memref.reinterpret_cast operations with valid offset or size constants. (#189533)\n\nWhen encountering an invalid offset or size, we only skip the current\ninvalid value and continue attempting to fold other valid offsets or\nsizes.\n\nGitOrigin-RevId: 158f10fe24a39208e45d6039dfc6d605967ade2a\n" }, { "commit": "6745112916ece5dfe2b1858f5987bcb82cdedbbc", "tree": "c6f8a9849cd29ecdae65c1d21e7cbb1a9c96b8fb", "parents": [ "820516456e18c6d65b13cd8656cd73e6fd3273c0" ], "author": { "name": "AidinT", "email": "at.aidin@gmail.com", "time": "Wed Apr 01 15:20:54 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 06:26:00 2026 -0700" }, "message": "[mlir][ods] resolve the wrong indent issue (#189277)\n\nThe `emitSummaryAndDescComments` is used to generate summary and\ndescription for tablegen generated classes and structs such as Dialects\nand Interfaces. The generated summary and description is indented\nincorrectly in the output generated file. For example\n`NVGPUDialect.h.inc ` looks like the following:\n\n```cpp\nnamespace mlir::nvgpu {\n\n/// The `NVGPU` dialect provides a bridge between higher-level target-agnostic\n/// dialects (GPU and Vector) and the lower-level target-specific dialect\n/// (LLVM IR based NVVM dialect) for NVIDIA GPUs. This allow representing PTX\n/// specific operations while using MLIR high level dialects such as Memref\n/// and Vector for memory and target-specific register operands, respectively.\nclass NVGPUDialect : public ::mlir::Dialect {\n ...\n };\n\n} // namespace mlir::nvgpu\n```\n\nThis is because the `emitSummaryAndDescComments` trims the summary and\ndescription from both sides, rendering the re-indentation useless. This\nPR resolves this bug.\n\nGitOrigin-RevId: 461a1c51bf0998edc1fd3b9b7197437136c2fb18\n" }, { "commit": "820516456e18c6d65b13cd8656cd73e6fd3273c0", "tree": "2d70924881659088215d7ed70e542902d8e091dc", "parents": [ "8742571a9ba99a44aee33226606a1ab0ef9166d5" ], "author": { "name": "Erick Ochoa Lopez", "email": "erick.ochoalopez@amd.com", "time": "Wed Apr 01 09:05:25 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 06:10:15 2026 -0700" }, "message": "[mlir][vector] Drop trailing 1-dims from constant_mask (#187383)\n\nGeneralize TransferReadDropUnitDimsPattern to also drop unit dimensions\nwhen `vector::ConstantMaskOp` is used.\n\nPreviously TransferReadDropUnitDimsPattern would only drop unit\ndimensions when `vector::CreateMaskOp` with a statically known operand\nwas used.\n\nAssisted-by: Cursor\nGitOrigin-RevId: 5072c020aae1636f687af797d4082a26a761c721\n" }, { "commit": "8742571a9ba99a44aee33226606a1ab0ef9166d5", "tree": "9706ce8b037a0f26873335c3bb21154e7eb79b99", "parents": [ "205735483f4c26b323699b2c2142b3117e4abd4d" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Apr 01 12:40:53 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 03:45:18 2026 -0700" }, "message": "[MLIR][Affine] Fix dead store elimination for vector stores with different types (#189248)\n\naffine-scalrep\u0027s findUnusedStore incorrectly classified an\naffine.vector_store as dead when a subsequent store wrote to the same\nbase index but with a smaller vector type. A vector\u003c1xi64\u003e store at\n[0,0] does not fully overwrite a vector\u003c5xi64\u003e store at [0,0], so the\nfirst store must be preserved.\n\nThe loadCSE function in the same file already had the correct\ntype-equality check for loads; this patch adds the analogous check for\nstores in findUnusedStore.\n\nFixes #113687\n\nAssisted-by: Claude Code\nGitOrigin-RevId: f6ffdbcbaec23f54a9254c7e19df002f1a0a9425\n" }, { "commit": "205735483f4c26b323699b2c2142b3117e4abd4d", "tree": "331dd20a23c93e487b6f3d3f603e79e10da74ad5", "parents": [ "d31e56cdbcf1d3c199d48f022bc624163b2c1e45" ], "author": { "name": "lonely eagle", "email": "2020382038@qq.com", "time": "Wed Apr 01 17:10:20 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 02:16:16 2026 -0700" }, "message": "[mlir][CSE] Fix double-counting of numCSE statistic (#189802)\n\nThis PR fixes a regression where the numCSE statistic was being\nincremented twice for a single operation elimination. The numCSE counter\nis already internally incremented within the replaceUsesAndDelete\nfunction. Manually incrementing it again after the function call leads\nto an inaccurate total count. This is part of the\nhttps://github.com/llvm/llvm-project/pull/180556.\n\nGitOrigin-RevId: 6b2b0da40de1495ace2b100799a35711f7ad7b21\n" }, { "commit": "d31e56cdbcf1d3c199d48f022bc624163b2c1e45", "tree": "6058df9d115da38d645133961dde00dad11f938c", "parents": [ "55d0a5a53dd44cab5ea7a1341c684baf9c6aa7f9" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Apr 01 11:03:14 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 02:06:09 2026 -0700" }, "message": "[MLIR][ArithToLLVM] Fix index_cast on memref types generating invalid LLVM IR (#189227)\n\n`arith.index_cast` and `arith.index_castui` accept memref operands (via\n`IndexCastTypeConstraint`), but `IndexCastOpLowering::matchAndRewrite`\ndid not handle this case. When the operand was a memref, the conversion\nframework substituted the converted LLVM struct type, and the lowering\nincorrectly attempted to emit `llvm.sext`/`llvm.zext`/`llvm.trunc` on a\nstruct value, producing invalid LLVM IR.\n\nSince LLVM uses opaque pointers, all memrefs with integer or index\nelement types lower to the same `\\!llvm.struct\u003c(ptr, ptr, i64, ...)\u003e`\ntype, making `arith.index_cast` on memrefs a no-op at the LLVM level.\nAdd a check that treats the memref case as an identity conversion (same\nas the same-bit-width path).\n\nFixes #92377\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 249e871fa4ef9acc38f8aa02f124322f85635756\n" }, { "commit": "55d0a5a53dd44cab5ea7a1341c684baf9c6aa7f9", "tree": "d877b7b72adf1c37e1ad25c882044ade801a6992", "parents": [ "e035a8d3a0f682fda33c8c4dd28caa9aeae61cf5" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Apr 01 10:47:36 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 01:50:51 2026 -0700" }, "message": "[MLIR] Validate APInt bitwidth in IntegerAttr::get(Type, APInt) (#188725)\n\nIntegerAttr::get(Type, APInt) did not validate that the APInt\u0027s bit\nwidth matched the expected bit width for the given type. For integer\ntypes, the APInt width must equal the integer type\u0027s width. For index\ntypes, the APInt width must equal IndexType::kInternalStorageBitWidth\n(64 bits).\n\nPassing an APInt with the wrong bit width could cause a\nnon-deterministic crash in StorageUniquer when comparing two IntegerAttr\ninstances for the same type but with different APInt widths.\n\nThis commit adds assertions in the get(Type, APInt) builder to catch\nsuch misuse early in debug builds, providing a clear error message at\nthe call site rather than a cryptic crash in the storage uniquer.\n\nFixes #56401\n\nAssisted-by: Claude Code\nGitOrigin-RevId: b1f8c285597925428d1f110ad7c1accff70eb885\n" }, { "commit": "e035a8d3a0f682fda33c8c4dd28caa9aeae61cf5", "tree": "75b860424fd4642ac0510c819a0326f357f1528e", "parents": [ "01ecdf81baee434d77c991b9ad3f623835f611cd" ], "author": { "name": "Lukas Sommer", "email": "lukas.sommer@amd.com", "time": "Wed Apr 01 10:25:58 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Apr 01 01:31:28 2026 -0700" }, "message": "[mlir][NFC] Remove conditionally unused type alias (#189894)\n\nThe `RawType` type alias is unused (`-Wunused-local-typedef`) in build\nwith asserts deactivated. In combination with `-Werror`, this causes\nbuilds to fail.\n\nSigned-off-by: Lukas Sommer \u003clukas.sommer@amd.com\u003e\nGitOrigin-RevId: 6a31be68e38e4656354edddfcb137b0c8234a01c\n" }, { "commit": "01ecdf81baee434d77c991b9ad3f623835f611cd", "tree": "63e04e8170e41298f1496038933f5f2912673386", "parents": [ "e20866f0720594bafb1dd312493e99078d1ba403" ], "author": { "name": "AidinT", "email": "at.aidin@gmail.com", "time": "Wed Apr 01 05:41:07 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 20:46:14 2026 -0700" }, "message": "[MLIR] Convert BytecodeDialectInterface to ods (#188852)\n\nThis PR converts `BytecodeDialectInterface` to ODS.\n\nGitOrigin-RevId: 585e2a015b29c1a53c4acddeda1b64b3fb3aac39\n" }, { "commit": "e20866f0720594bafb1dd312493e99078d1ba403", "tree": "8d8ffdc6320a7d5f686806a306f4a75ab9b90158", "parents": [ "675ae6c37e492f4f4622e7e5f1edd14e4c97e7ec" ], "author": { "name": "AidinT", "email": "at.aidin@gmail.com", "time": "Wed Apr 01 05:30:12 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 20:35:59 2026 -0700" }, "message": "[MLIR] convert ConvertToEmitCPatternInterface to ODS (#188621)\n\nThis PR converts `ConvertToEmitCPatternInterface` dialect interface to ODS. Also makes changes to derived classes.\n\nGitOrigin-RevId: d52a5e8a5ac47fea1b1d82669eb7d1bf5283d147\n" }, { "commit": "675ae6c37e492f4f4622e7e5f1edd14e4c97e7ec", "tree": "1e9d404e2bafbc542bb99af114e647e9b8938da6", "parents": [ "2450c298158f0f466e06b047969f87f9677b6176" ], "author": { "name": "Krzysztof Drewniak", "email": "krzysdrewniak@gmail.com", "time": "Tue Mar 31 19:49:40 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 19:55:44 2026 -0700" }, "message": "[mlir] Refactor opaque properties to make them type-safe (#185157)\n\nAt its core, this commit changes `OpaqueProperties` (aka a void*) to\n`PropertyRef`, which is a {TypeID, void*}, where the TypeID is the ID of\nthe storage type of the given property (which can, as is often the case\nfor operations, be a struct of other properties).\n\nLong-term, this change will allow for\n1) Some sort of getFooPropertyRef() on property structs, allowing\nindividual members to be extracted generically\n2) By having a property kind that is an OwningProprtyRef, generic\nparsing (in combination with a bunch of other changes) 3) Probably a\nsafer C/Python API because we\u0027ll be able to indicate what\u0027s supposed to\nbe under a given void*\n\n---------\n\nCo-authored-by: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 7fce7631a0983b09abc968d24038e01ec1d02962\n" }, { "commit": "2450c298158f0f466e06b047969f87f9677b6176", "tree": "15eba0e0d5b0354b7b789321e9e213b6fb8ffcb7", "parents": [ "1311ec05774ace6ccd35dde7b0a776fb46df3503" ], "author": { "name": "Krzysztof Drewniak", "email": "Krzysztof.Drewniak@amd.com", "time": "Tue Mar 31 14:44:27 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 14:45:52 2026 -0700" }, "message": "[mlir][MemRef] Migrate memref dialect alias op folding to interface (#187168)\n\nThis PR adds code to FoldMemRefAliasOps / --fold-memref-alias-ops to use\nthe new IndexedMemoryAccessOpInterface and\nIndexedMemCopyOpInterface and implement those operations for relevant\noperations in the memref dialect.\n\nThis is a reordering of the changes planned in #177014 and #177016 to\nmake them more testable.\n\nThere are no behavior changes expected for how memref.load and\nmemref.store behave within the alias ops folding pass, though support\nfor new operations, like memref.prefetch, has been added.\n\nSome error messages have been updated because certain laws of\nmemref.load/memref.store have been moved to IndexedAccessOpInterface.\n\nAssisted-by: Claude 4.6 (helped deal with some of the boilerplate in the\nrewrite patterns and with extracting the patch)\nGitOrigin-RevId: b813b0b4e485b0323b51071aca7a415b30c3aa6f\n" }, { "commit": "1311ec05774ace6ccd35dde7b0a776fb46df3503", "tree": "3d318923eb6fb6125f65c262371d64d144a50f94", "parents": [ "c9deeb9d836ab923be355bbb63cb0e89ea454ec4" ], "author": { "name": "Zhen Wang", "email": "zhenw@nvidia.com", "time": "Tue Mar 31 13:53:50 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 13:56:06 2026 -0700" }, "message": "Revert \"[flang][cuda] Support non-allocatable module-level managed variables\" (#189745)\n\nReverts llvm/llvm-project#188526\n\nGitOrigin-RevId: 3ed48bf648cb6d94d8385c336bc72aadcd59f4f2\n" }, { "commit": "c9deeb9d836ab923be355bbb63cb0e89ea454ec4", "tree": "1ffec290cb6bd600a77e01eaca87c9dca4ee86a1", "parents": [ "f85ab8d42d861c3b33df1628d17f3481f1c23021" ], "author": { "name": "Artem Gindinson", "email": "gindinson@roofline.ai", "time": "Tue Mar 31 22:45:18 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 13:46:33 2026 -0700" }, "message": "[mlir][Arith] Avoid sign overflow when narrowing signed operations (#189676)\n\nWhether an arith operation can be truncated to a given bitwidth should\nalso depend on the sign semantics of the operation itself. Consider:\n```\n%input \u003d /* upper bound \u003e INT32_MAX, \u003c\u003d UINT32_MAX */ : index\n%c0 \u003d arith.constant 0 : index\n%cmp \u003d arith.cmpi sle, %input, %c0 : index\n```\n\nPreviously, `checkTruncatability()` would correctly judge that only an\nunsigned truncation could be legal, however the narrowing would still\nproceed despite the fact that the `sle` predicate treated the MSB as the\nsign.\n\nEnsure that the sign is checked for signed comparison predicates and for\nsigned elementwise operations by enforcing a `CastKind::Signed`\nrestriction, whereby the narrowing patterns bail out on incompatible\ninput range/operation signedness.\n\n**AI tooling usage disclaimer**\nLIT tests were expanded from manual reproducer examples with LLM\nassistance. Those additional test cases were verified to\nregression-test, proofread and edited manually in accordance with the\n\"Human in the loop\" policy. LLMs/generative tooling were not used for\nimplementation/documentation purposes.\n\n---------\n\nSigned-off-by: Artem Gindinson \u003cgindinson@roofline.ai\u003e\nCo-authored-by: GPT 5.4 \u003ccodex@openai.com\u003e\nGitOrigin-RevId: 0454de8b54f92b80a4993c1d59c485daa0c176f9\n" }, { "commit": "f85ab8d42d861c3b33df1628d17f3481f1c23021", "tree": "f99c5bd5eb7cfe0cd41147479c1a8bc5a0fad28b", "parents": [ "eaf73c82ac89ed3985435955b844b7c97821114d" ], "author": { "name": "Zhen Wang", "email": "37195552+wangzpgi@users.noreply.github.com", "time": "Tue Mar 31 09:27:08 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 09:30:58 2026 -0700" }, "message": "[flang][cuda] Support non-allocatable module-level managed variables (#188526)\n\nAdd support for non-allocatable module-level CUDA managed variables\nusing pointer indirection through a companion global in\n__nv_managed_data__. The CUDA runtime populates this pointer with the\nunified memory address via __cudaRegisterManagedVar and\n__cudaInitModule.\n\n1. Create a .managed.ptr companion global in the __nv_managed_data__\nsection and register it with _FortranACUFRegisterManagedVariable\n(CUFAddConstructor.cpp)\n2. Call __cudaInitModule after registration to populate the managed\npointer (registration.cpp)\n3. Annotate managed globals in gpu.module with nvvm.managed for PTX\n.attribute(.managed) generation (cuda-code-gen.mlir)\n4. Suppress cuf.data_transfer for assignments to/from non-allocatable\nmodule managed variables, since cudaMemcpy would target the shadow\naddress rather than the actual unified memory (tools.h)\n5. Preserve cuf.data_transfer for device_var \u003d managed_var assignments\nwhere explicit transfer is still required\n\nGitOrigin-RevId: c4e6cf0abff628f9c018428e0d4beed8788efdf9\n" }, { "commit": "eaf73c82ac89ed3985435955b844b7c97821114d", "tree": "b6bcc56e8330825d7a51f9a411c6ba854c6a9f4f", "parents": [ "8ffc0799c9454a637c234715c8c5c2aa5a5fc71b" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Tue Mar 31 09:20:11 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 09:25:25 2026 -0700" }, "message": "[MLIR][XeGPU] Switch to the new sg to wi pass (#188627)\n\nThis PR has changes required to switch the pipeline to use the new sg to\nwi pass.\n\nGitOrigin-RevId: 65720adc15da80a65817a2bed3a506cf099d2aa7\n" }, { "commit": "8ffc0799c9454a637c234715c8c5c2aa5a5fc71b", "tree": "cfcf3634f9bf17b02d0f252d423218d95131880b", "parents": [ "c6a6dfe04145154c7408c0b26576938f92967dc7" ], "author": { "name": "Chi-Chun, Chen", "email": "chichun.chen@hpe.com", "time": "Tue Mar 31 11:12:00 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 09:15:36 2026 -0700" }, "message": "[mlir][OpenMP][NFC] Refactor fillAffinityIteratorLoop (#189418)\n\nExtract affinity-specific logic from fillAffinityIteratorLoop into a\ncallback so that the iterator loop codegen logic can be shared with\nother clauses such as depend clause and target clause.\n\nGitOrigin-RevId: 9e77a4593526a04cd2308a724039e94d8fbe9445\n" }, { "commit": "c6a6dfe04145154c7408c0b26576938f92967dc7", "tree": "2c0c3669784892bd6a89a1ca66f98c29b922a0cd", "parents": [ "3cdebe8b57eba6ae84b819cdc55610c508a7c881" ], "author": { "name": "Chi-Chun, Chen", "email": "chichun.chen@hpe.com", "time": "Tue Mar 31 11:11:08 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 09:15:27 2026 -0700" }, "message": "[mlir][OpenMP] Add iterator support to depend clause (#189090)\n\nExtend the depend clause to support `!omp.iterated\u003cTy\u003e` handles\nalongside plain depend vars, so the IR can represent both forms.\n\nAssisted with copilot\n\nThis is part of feature work for\nhttps://github.com/llvm/llvm-project/issues/188061\n\nGitOrigin-RevId: 7ff0dc4b9fdee840de0901e969ea11880a28d433\n" }, { "commit": "3cdebe8b57eba6ae84b819cdc55610c508a7c881", "tree": "dab7452ff1adc620765eb65bee4a0a7257220307", "parents": [ "698e76da557e57493352af8ea197b6eae19065f5" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Mar 31 17:56:51 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 09:00:06 2026 -0700" }, "message": "[mlir][ArithToSPIRV] Fix invalid SPIRV and crashes when lowering integer ops on i1 (#189239)\n\nSeveral arith integer operations on i1 / vector\u003cNi1\u003e types were either\ncrashing or producing invalid SPIRV. The i1 type maps to spirv.bool in\nSPIRV, not to a SPIRV integer — so standard integer SPIRV ops\n(spirv.IAdd, spirv.UDiv, spirv.GLSMax, etc.) are illegal on it.\nAdd dedicated boolean patterns for all affected arith integer ops, each\nwith benefit\u003d2 to take priority over the generic elementwise patterns.\nThe semantics for i1 follow from treating true \u003d 1 / false \u003d 0 with\ntwo\u0027s complement wrapping:\n\n- addi, subi → spirv.LogicalNotEqual (XOR on bits)\n- muli, divui, divsi → spirv.LogicalAnd\n- remui, remsi, shli, shrui → spirv.LogicalAnd(a, spirv.LogicalNot(b))\n(a \u0026 ~b)\n- shrsi → identity (arithmetic right shift of a 1-bit signed value is\nalways the input)\n- maxui, minsi → spirv.LogicalOr (unsigned max / signed min treats true\nas larger)\n- maxsi, minui → spirv.LogicalAnd (signed max / unsigned min treats\nfalse as larger)\nFixes #61162\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 6477f3aa166b0af1677cd36300097f088bdff510\n" }, { "commit": "698e76da557e57493352af8ea197b6eae19065f5", "tree": "cbe94871c95be9d716213b843f2b600ab11acd10", "parents": [ "66a9ada9e77eb8a8b0863cbf12c7360885da6215" ], "author": { "name": "AidinT", "email": "at.aidin@gmail.com", "time": "Tue Mar 31 17:23:13 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 08:25:30 2026 -0700" }, "message": "[mlir][docs] dialect interfaces and mlir reduce documentation fix (#189258)\n\nTwo modifications:\n\n1. Reflect newly added dialect interface methods in the documentation\n2. Remove the bug in the `MLIR Reduce` documentation\n\nGitOrigin-RevId: 67c34294a6b3e161a84ed4697c326d04d651d7ff\n" }, { "commit": "66a9ada9e77eb8a8b0863cbf12c7360885da6215", "tree": "9d9f99f7c418514fb8092cc3360790fded1ef465", "parents": [ "de793379bc1718ed42dc6ec495e72dc4cbe8bc1e" ], "author": { "name": "Arseniy Obolenskiy", "email": "arseniy.obolenskiy@amd.com", "time": "Tue Mar 31 16:49:37 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 07:50:40 2026 -0700" }, "message": "[mlir][SPIR-V] Support spirv.loop_control attribute on scf.for and scf.while (#189392)\n\nPropagate the `spirv.loop_control` attribute from `scf.for` and\n`scf.while` operations to the generated `spirv.mlir.loop` during\nSCFToSPIRV conversion\n\nGitOrigin-RevId: 09c54a8f7afcd30c83862ab2792eacdb53c77a8f\n" }, { "commit": "de793379bc1718ed42dc6ec495e72dc4cbe8bc1e", "tree": "d0665f508530f32a9f4f6cfda39111e1ab02d223", "parents": [ "5fb1cb9c2033af3e6c5fc1c7790bfeee88e1c46a" ], "author": { "name": "Leandro Lupori", "email": "leandro.lupori@linaro.org", "time": "Tue Mar 31 09:36:08 2026 -0300" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 05:40:54 2026 -0700" }, "message": "Reland \"[flang][OpenMP] Fix lowering of LINEAR iteration variables (#183794)\" (#188851)\n\nLinear iteration variables were being treated as private. This fixes\none of the issues reported in #170784.\n\nThe regression reported in #188536 occurred because\nLinearClauseProcessor was rewriting all basic blocks whose names\ncontained a given substring, including those that were not part of the\ntranslated SIMD region.\nThis didn\u0027t cause problems before because linear variables were always\nprivatized, which doesn\u0027t happen with this change.\nThe issue is fixed by rewriting only the basic blocks that correspond to\nthe omp.simd operation.\n\nGitOrigin-RevId: a30a8e9474f75000d9746b5d02800d2e47903f44\n" }, { "commit": "5fb1cb9c2033af3e6c5fc1c7790bfeee88e1c46a", "tree": "f98524ada19f96f445e03f704b8bf01ebd1d52fd", "parents": [ "e6d72dadab2baf5557faa187bdf3662317bf46e3" ], "author": { "name": "Davide Grohmann", "email": "davide.grohmann@arm.com", "time": "Tue Mar 31 14:31:04 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 05:35:54 2026 -0700" }, "message": "[mlir][spirv] Add Cast/Rescale ops in TOSA Ext Inst Set (#189028)\n\nThis patch introduces the following operators:\n\nspirv.Tosa.Cast\nspirv.Tosa.Rescale\n\nAlso dialect and serialization round-trip tests have been added.\n\nSigned-off-by: Davide Grohmann \u003cdavide.grohmann@arm.com\u003e\nGitOrigin-RevId: d5f7acdbc15fd15244bf6f3e4d4e3ea5a7bd2781\n" }, { "commit": "e6d72dadab2baf5557faa187bdf3662317bf46e3", "tree": "6884ffd21a61f5a6ccd3960911318a4790df6c7f", "parents": [ "391b77aa9589acb09b73f7c626e30406a43c169a" ], "author": { "name": "Guray Ozen", "email": "guray.ozen@gmail.com", "time": "Tue Mar 31 13:36:58 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 04:40:37 2026 -0700" }, "message": "[MLIR][NVVM] Fix predicate operand index in BasicPtxBuilderInterface (#189552)\n\nPredicate index computation was incorrect, it was not counting\nwrite/readwrite symbols.\n\nWrong case\n```\n // CHECK: %{{.*}} \u003d llvm.inline_asm has_side_effects asm_dialect \u003d att \"@$1 ex2.approx.ftz.f32 $0, $1;\", \"\u003df,f,b\" %{{.*}}, %{{.*}} : (f32, i1) -\u003e f32\n %1 \u003d nvvm.inline_ptx \"ex2.approx.ftz.f32 {$w0}, {$r0};\" ro (%input : f32), predicate \u003d %pred -\u003e f32\n```\n\nPR fixes, predicate index became `@$2`\n```\n// CHECK: %{{.*}} \u003d llvm.inline_asm has_side_effects asm_dialect \u003d att \"@$2 ex2.approx.ftz.f32 $0, $1;\", \"\u003df,f,b\" %{{.*}}, %{{.*}} : (f32, i1) -\u003e f32\n %1 \u003d nvvm.inline_ptx \"ex2.approx.ftz.f32 {$w0}, {$r0};\" ro (%input : f32), predicate \u003d %pred -\u003e f32\n ```\n\nGitOrigin-RevId: 97b78d6ff3fa1d87fc0ba6a235f1d331990918a3\n" }, { "commit": "391b77aa9589acb09b73f7c626e30406a43c169a", "tree": "3dd542f50b3ed0e169475a5e4d483b696d8dc84b", "parents": [ "be59c62d1c80af1d1abae56a5ed5c9505af9357b" ], "author": { "name": "Sergei Lebedev", "email": "185856+superbobry@users.noreply.github.com", "time": "Tue Mar 31 11:00:40 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 03:05:17 2026 -0700" }, "message": "[MLIR] [Python] Added a way to extend MLIR-\u003ePython type mappings (#189368)\n\nThe idea is to use TableGen records for both custom type constraints and\nattributes:\n\n* `PythonTypeName` is for type constraints, while\n* `PythonAttrType` is for attributes.\n\nThe key types differ between these two records. `PythonTypeName` is\nkeyed by C++ type because multiple type constraints map to the same C++\ntype (e.g. `I32` and `I64` both map to `::mlir::IntegerType`), so a\nsingle entry covers all of them. `PythonAttrType` is keyed by TableGen\ndef name because different attributes can share the same C++ storage\ntype but need distinct Python types (e.g. `I32ArrayAttr` and\n`StrArrayAttr` are both `::mlir::ArrayAttr`).\n\nWe could in theory reimplement `getPythonAttrName` using the same\napproach, but I decided to leave it for future PRs.\n\nGitOrigin-RevId: b544ad57039588d0fe24a1f512202cc5c0bd3a67\n" }, { "commit": "be59c62d1c80af1d1abae56a5ed5c9505af9357b", "tree": "5c8ad4b5617cae4e9bd50ddcdfcb3d35cbe40327", "parents": [ "d0afddf64415d62d1e028b8c694aadc3611dec76" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Mar 31 11:39:03 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Mar 31 02:40:05 2026 -0700" }, "message": "[MLIR][MemRef] Fix LoadOpOfExpandShapeOpFolder returning failure after IR change (#188964)\n\nLoadOpOfExpandShapeOpFolder\u003cvector::TransferReadOp\u003e::matchAndRewrite\ncalled resolveSourceIndicesExpandShape (which creates\nAffineLinearizeIndexOp ops via the rewriter) before checking whether the\nvector::TransferReadOp preconditions hold. When those checks failed\n(sourceRank \u003c vectorRank or permutation map mismatch), the pattern\nreturned failure() after already modifying the IR, triggering \"pattern\nreturned failure but IR did change\" under\nMLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.\n\nFix by hoisting the vector::TransferReadOp precondition checks to before\nthe resolveSourceIndicesExpandShape call. The source rank is derived\nfrom expandShapeOp.getViewSource()\u0027s type (no IR creation needed), and\nthe permutation map check only uses op attributes. Only if all checks\npass do we proceed to create the linearized-index ops.\n\nAssisted-by: Claude Code\nFix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS\u003dON.\nGitOrigin-RevId: 7ad564e54b42a921a70cd0d0f712dd86f61a697c\n" }, { "commit": "d0afddf64415d62d1e028b8c694aadc3611dec76", "tree": "11ac1446c1039f3d9ab2a12c389b0e6f27d9e7fd", "parents": [ "3dbd2a68ec089dfac42ea653b2261b46d8f0ce4e" ], "author": { "name": "Slava Zakharin", "email": "szakharin@nvidia.com", "time": "Mon Mar 30 17:52:45 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 17:55:51 2026 -0700" }, "message": "[mlir] Made DefaultResource the root of memory resource hierarchy. (#187423)\n\nDefaultResource is made the root of the memory resource hierarchy,\nso now it overlaps with all resources.\n\nRFC:\nhttps://discourse.llvm.org/t/rfc-mlir-memory-region-hierarchy-for-mlir-side-effects/89811/32\nGitOrigin-RevId: 35f89458fa2871b7590c115c9afea764dfc11c02\n" }, { "commit": "3dbd2a68ec089dfac42ea653b2261b46d8f0ce4e", "tree": "e6d78d92078d10391487dae94bdff668d04b3a87", "parents": [ "3a3f4e57be3129a06cce85939d0681b36c023c61" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Mar 31 00:46:28 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 15:50:17 2026 -0700" }, "message": "[MLIR][SCF] Fix scf.index_switch lowering to preserve large case values (#189230)\n\n`IndexSwitchLowering` stored case values as `SmallVector\u003cint32_t\u003e`,\nwhich silently truncated any `int64_t` case value larger than INT32_MAX\n(e.g. `4294967296` became `0`). The `cf.switch` flag was also created\nvia `arith.index_cast index -\u003e i32`, losing the upper 32 bits on 64-bit\nplatforms.\n\nFix: store case values as `SmallVector\u003cAPInt\u003e` with 64-bit width, cast\nthe index argument to `i64`, and use the `ArrayRef\u003cAPInt\u003e` overload of\n`cf::SwitchOp::create` so the resulting switch correctly uses `i64` case\nvalues and flag type.\n\nFixes #111589\n\nAssisted-by: Claude Code\nGitOrigin-RevId: acbf3f318694a4f3c382caf040cf586e1ff02c5f\n" }, { "commit": "3a3f4e57be3129a06cce85939d0681b36c023c61", "tree": "ddc163919b1bdbbb8e79a4bac391764e0658a6e5", "parents": [ "85436ad59a2ae899a80fb9c1498207f3ae7285c2" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Mar 31 00:35:13 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 15:39:56 2026 -0700" }, "message": "[mlir][scf] Fix FoldTensorCastOfOutputIntoForallOp write order bug (#189162)\n\n`FoldTensorCastOfOutputIntoForallOp` incorrectly updated the\ndestinations of `tensor.parallel_insert_slice` ops in the `in_parallel`\nblock by zipping `getYieldingOps()` with `getRegionIterArgs()`\npositionally. This assumed that the i-th yielding op writes to the i-th\nshared output, which is not required by the IR semantics. When slices\nare written to shared outputs in non-positional order, the\ncanonicalization would silently reverse the write targets, producing\nincorrect output.\n\nFix by replacing the positional zip with a per-destination check: for\neach yielding op\u0027s destination operand, if it is a `tensor.cast` result\nwhose source is one of the new `scf.forall` region iter args (i.e., a\ncast we introduced to bridge the type change), replace the destination\nwith the cast\u0027s source directly. This correctly handles all orderings.\n\nAdd a regression test that exercises the multi-result case where\n`parallel_insert_slice` ops write to shared outputs in non-sequential\norder.\n\nFixes #172981\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 5da2546594f8555d5d283e3ee3cda14bc5a80eec\n" }, { "commit": "85436ad59a2ae899a80fb9c1498207f3ae7285c2", "tree": "fa4c5717bcb7994259db62cb4b0ee779bd65dee3", "parents": [ "d6cfa25640eb9855e01376bf1fecb6b1a5742cba" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Mar 31 00:33:47 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 15:36:00 2026 -0700" }, "message": "[MLIR][SparseTensor] Fix fingerprint changes in SparseFuncAssembler (#188958)\n\nSparseFuncAssembler::matchAndRewrite was calling funcOp.setName(),\nfuncOp.setPrivate(), and funcOp-\u003eremoveAttr() directly without notifying\nthe rewriter, causing \"operation fingerprint changed\" errors under\nMLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.\n\nWrap all in-place funcOp mutations with rewriter.modifyOpInPlace.\n\nAssisted-by: Claude Code\n\nFix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS\u003dON.\n\nCo-authored-by: Claude Sonnet 4.6 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: e097875417bc5458e22d594276dd645a137ea91d\n" }, { "commit": "d6cfa25640eb9855e01376bf1fecb6b1a5742cba", "tree": "43ac0b9884c942ac59d9a972a0889b04b14f8a85", "parents": [ "869face50445ef43545de35e0a188c83cb7c3030" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Mar 31 00:33:28 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 15:35:45 2026 -0700" }, "message": "[MLIR][SparseTensor] Fix domination violation in co-iteration for dense iterators (#188959)\n\nIn exitWhileLoop, random-accessible (dense) iterators were being located\nusing whileOp.getResults().back() while the insertion point was still\ninside the while loop\u0027s after block. This caused a domination violation:\nthe ADDI created by locate() was inside the after block, but it was\nlater used (via derefImpl\u0027s SUBI) after the while loop exits.\n\nMove the locate() calls for random-accessible iterators to after\nbuilder.setInsertionPointAfter(whileOp), where the while results are\nproperly in scope.\n\nFixes 10 failing tests under MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.\n\nAssisted-by: Claude Code\n\nCo-authored-by: Claude Sonnet 4.6 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 27b9ea5ea090aa1c64baf7b3f619c72e3e15713f\n" }, { "commit": "869face50445ef43545de35e0a188c83cb7c3030", "tree": "9edc00f7407eec3689a76c1df88b485d2d2003b4", "parents": [ "9edd83f01804162beba092fb19667df5fbc94434" ], "author": { "name": "Keshav Vinayak Jha", "email": "31160700+keshavvinayak01@users.noreply.github.com", "time": "Mon Mar 30 14:26:39 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 14:30:22 2026 -0700" }, "message": "[MLIR][Affine] Add vector support to affine.linearize_index and affine.delinearize_index (#188369)\n\nAllow `affine.delinearize_index` and `affine.linearize_index` to operate\non `vector\u003c...x index\u003e` types in addition to scalar indices.\n\n---------\n\nSigned-off-by: Keshav Vinayak Jha \u003ckeshavvinayakjha@gmail.com\u003e\nCo-authored-by: Claude Opus 4.6 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 54b723097b39b536eb7d1d6947b65d53a096ed47\n" }, { "commit": "9edd83f01804162beba092fb19667df5fbc94434", "tree": "c334508274c52f0bcbfc832974f6644b74177d17", "parents": [ "9a07f36d4b0d2c4f66af62268d896c4feb88f0b2" ], "author": { "name": "Eric Feng", "email": "55723758+efric@users.noreply.github.com", "time": "Mon Mar 30 14:20:59 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 14:26:26 2026 -0700" }, "message": "[mlir][amdgpu] implement amdgpu.global_load_async_to_lds for gfx1250 (#189279)\n\nThis patch introduces an amdgpu wrapper for\n`rocdl.global.load.async.to.lds.bN` intrinsics, which were introduced in\ngfx1250.\n\nAssisted-by: Claude\n\n---------\n\nSigned-off-by: Eric Feng \u003cEric.Feng@amd.com\u003e\nGitOrigin-RevId: ae835dea747da6824b386b4861c330d59af7af6d\n" }, { "commit": "9a07f36d4b0d2c4f66af62268d896c4feb88f0b2", "tree": "b90f5d636b662804f6690fc2eaebfab3901fa584", "parents": [ "a873d2198269ea0c514b8f98f400cfbf5dec4713" ], "author": { "name": "Stanislav Mekhanoshin", "email": "Stanislav.Mekhanoshin@amd.com", "time": "Mon Mar 30 14:14:22 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 14:16:06 2026 -0700" }, "message": "[AMDGPU] Drop A and B neg modifier from amdgcn_wmma_bf16_16x16x32_bf16 (#189468)\n\nFixes: LCOMPILER-1673\nGitOrigin-RevId: 5f99854d0151a43d0f20452f58211c9fdde8f154\n" }, { "commit": "a873d2198269ea0c514b8f98f400cfbf5dec4713", "tree": "ef452a6f5e1f85cbba45e486e3b231feb9b009a6", "parents": [ "efe8ed6dc59096f548ea48326ccd49ceeadd18ad" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Mon Mar 30 14:06:03 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 14:10:45 2026 -0700" }, "message": "[MLIR] [XeGPU] Add distribution patterns for vector transpose, bitcast \u0026 mask ops in sg to wi pass (#187392)\n\nThis PR adds patterns for following vector ops in the new sg-to-wi pass\n\n1. Transpose\n2. BitCast\n3. CreateMask\n4. ConstantMask\n\nGitOrigin-RevId: e50f08b5488346d86f741f20d8d2dd2a7c0f9ec8\n" }, { "commit": "efe8ed6dc59096f548ea48326ccd49ceeadd18ad", "tree": "c5737fac1bd28e6b4fff660610551b89ae9b9343", "parents": [ "a886a2a6e517cdc3730c2564796e4b8429d59270" ], "author": { "name": "Berke Ates", "email": "berke@ates.ch", "time": "Mon Mar 30 22:20:39 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 13:25:22 2026 -0700" }, "message": "[MLIR][Mem2Reg] Extract shared utilities for PromotableRegionOpInterface (#188514)\n\nThe `PromotableRegionOpInterface` implementations use two helpers that\nare likely useful for other dialects implementing this interface as\nwell:\n- `updateTerminator`: Appends the reaching definition as an operand to a\nblock\u0027s terminator, falling back to a default when the block has no\nentry (e.g. dead code).\n- `replaceWithNewResults`: Clones an operation with additional result\ntypes while preserving its regions, then replaces the original.\n\nThis PR extracts them into a common utility header so that downstream\ndialects can reuse them directly.\nI\u0027m open to discussion about the location of these utilities.\n\nGitOrigin-RevId: b6e4d27c485af711214b3dafc96fa287e2fe33f6\n" }, { "commit": "a886a2a6e517cdc3730c2564796e4b8429d59270", "tree": "474f5016dd04c0f60c2cc882e3f4eefce7e9f8fc", "parents": [ "2573e9ce8f248ff94fd6f8ec9554256c0d341ea7" ], "author": { "name": "Maksim Levental", "email": "maksim.levental@gmail.com", "time": "Mon Mar 30 12:27:48 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 12:30:16 2026 -0700" }, "message": "[MLIR][SparseTensor] Add #undef FAILURE_IF_FAILED and ERROR_IF (#188685)\n\nBoth DimLvlMapParser.cpp and LvlTypeParser.cpp define FAILURE_IF_FAILED\nand ERROR_IF macros that are never undefined, which can leak into\nsubsequent translation units in unity builds. Add #undef at the end of\neach file. See\nhttps://discourse.llvm.org/t/rfc-enabling-unity-build/90306 for more\ninfo.\n\n\"clauded\" not coded\n\nGitOrigin-RevId: f10dccd458fac0685f5b870128bcb2da5ba82169\n" }, { "commit": "2573e9ce8f248ff94fd6f8ec9554256c0d341ea7", "tree": "01fa30c970a664be652c6868d236356276206780", "parents": [ "3722f9e51c88f4a95e7adbee16c80144c1a0eead" ], "author": { "name": "Maksim Levental", "email": "maksim.levental@gmail.com", "time": "Mon Mar 30 12:27:31 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 12:30:07 2026 -0700" }, "message": "[MLIR][SparseTensor] Add missing #undef REMUI and DIVUI (#188686)\n\nLoopEmitter.cpp and SparseTensorIterator.cpp define REMUI and DIVUI\nmacros but the existing #undef block at the end of each file omits them.\nThis can leak the macros into subsequent translation units in unity\nbuilds. See https://discourse.llvm.org/t/rfc-enabling-unity-build/90306\nfor more info.\n\n\"clauded\" not coded\n\nGitOrigin-RevId: 03869c74b626599b7d14d9454092261e85a46187\n" }, { "commit": "3722f9e51c88f4a95e7adbee16c80144c1a0eead", "tree": "1921871f2fae47bd99ec57ca46a6ce273081dc8e", "parents": [ "02b102add272ca791d5cc15e25ee9841baf62e1f" ], "author": { "name": "Jackson Stogel", "email": "jtstogel@gmail.com", "time": "Mon Mar 30 11:21:35 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 11:25:42 2026 -0700" }, "message": "[mlir][python] Disable pytype not-yet-supported error on Buffer import (#189440)\n\nFor pyhon versions \u003c3.12, pytype complains that:\n\n```\nerror: in \u003cmodule\u003e: collections.abc.Buffer not supported yet [not-supported-yet]\n from collections.abc import Buffer as _Buffer\n```\n\nSince it seems like this code intends to support \u003c3.12, disabling the\ntype error on this line.\n\nGitOrigin-RevId: 7ccd92e5e6e5c622b2b571d396fff9016241a8f1\n" }, { "commit": "02b102add272ca791d5cc15e25ee9841baf62e1f", "tree": "95c5b8a81894dd0ed24db2cc29ff8e1908eb0e41", "parents": [ "5115f708272a5f2944c42a8ae658ec2102e6035c" ], "author": { "name": "Alexis Engelke", "email": "engelke@in.tum.de", "time": "Mon Mar 30 18:57:37 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 10:00:26 2026 -0700" }, "message": "[IR] Require well-formed IR for BasicBlock::getTerminator (#189416)\n\nBasicBlock::getTerminator() is frequently called on valid IR, yet the\nfunction has to check that the last instruction is in fact a terminator,\neven in release builds. This check can only be optimized away when the\ninstruction is dereferenced.\n\nTherefore, introduce the functions hasTerminator() and\ngetTerminatorOrNull() as replacement and require (assert) that\ngetTerminator() always returns a valid terminator. As a side effect,\nthis forces explicit expression of intent at call sites when unfinished\nbasic blocks should be supported.\n\nGitOrigin-RevId: 75814307221558d6f3dc4555e75e57c94c6ec85a\n" }, { "commit": "5115f708272a5f2944c42a8ae658ec2102e6035c", "tree": "0322c7f3363225b2ba8abdac2f8f737c206b76ed", "parents": [ "e832a99ed7b623beaa511697b295c6610a4b8c54" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Mon Mar 30 09:29:20 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 09:30:14 2026 -0700" }, "message": "[MLIR][XeGPU] Support leading unit dims in vector.multi_reduction in sg to wi pass (#188767)\n\nThis PR adds support for transforming vector.multi_reduction with\nvectors \u003e rank 2d with leading unit dims\n\nGitOrigin-RevId: ad4d4c0f63258bfeec2064d4fe6bec1ad9575aba\n" }, { "commit": "e832a99ed7b623beaa511697b295c6610a4b8c54", "tree": "f8e55e0f84c5a47d051dccc5f3514c20ca27a338", "parents": [ "bee71462f778e1f7d158d3510dac186c6b0c5079" ], "author": { "name": "jeanPerier", "email": "jperier@nvidia.com", "time": "Mon Mar 30 16:03:14 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 07:05:27 2026 -0700" }, "message": "[mlir][acc] add VariableInfo attribute to thread language specific information about privatized variables (#186368)\n\nAdd a new acc::VariableInfoAttr attribute that can be extended and implemented by\nlanguage dialects to carry language specific information about variables that is\nnot reflected into the MLIR type system and is needed in the implementation\nof the init/copy/destroy APIs.\nA new genPrivateVariableInfo API is added to the MappableTypeInterface to generate\nsuch attribute from an mlir::Value for the host variable.\nThe use case and motivation is the Fortran OPTIONAL attribute. This patch adds\na new fir::OpenACCFortranVariableInfoAtt that implements the acc::VariableInfoAttr\nto carry the OPTIONAL information around.\n\nGitOrigin-RevId: 9a8c018081383f71e9f2f013dfea2fd26620aade\n" }, { "commit": "bee71462f778e1f7d158d3510dac186c6b0c5079", "tree": "476d249561277aebea9bf40dcf08acddbd3138ce", "parents": [ "d6b87ab940990704666582dbf04c231c08f29413" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Mon Mar 30 14:45:55 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 05:51:13 2026 -0700" }, "message": "[mlir][memref] Fix invalid folds in ReinterpretCastOpConstantFolder for negative constants (#189237)\n\n`ReinterpretCastOpConstantFolder` could fold `memref.reinterpret_cast`\nops whose offset or sizes contain negative constants (e.g. `-1 :\nindex`).\n\n- A negative constant size passed into `ReinterpretCastOp::create`\nreaches\n `MemRefType::get`, which asserts that all static dimension sizes are\n non-negative, causing a crash.\n\n- A negative constant offset produces an op with a static negative\noffset,\nwhich the `ViewLikeInterface` verifier then rejects (\"expected offsets\nto\n be non-negative\").\n\nFix by skipping the fold when any constant size or the offset is\nnegative.\nNegative strides are intentionally left foldable: they are valid in\nstrided MemRef layouts (e.g. for reverse iteration) and neither\n`MemRefType::get` nor `ViewLikeInterface` places a non-negativity\nconstraint on strides.\n\nFixes https://github.com/llvm/llvm-project/issues/188407\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 79a7b57a443021ed05d19abeb1496be7059ac971\n" }, { "commit": "d6b87ab940990704666582dbf04c231c08f29413", "tree": "923838cec7bb225cdf48a42f842423fe92a67d07", "parents": [ "cac2fcbb0a3b70d9a0482fefa5da02887d985ff1" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Aug 21 11:16:37 2025 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 04:56:36 2026 -0700" }, "message": "[MLIR] Apply clang-tidy fixes for modernize-loop-convert in Deserializer.cpp (NFC)\n\nGitOrigin-RevId: 25fee9568419e0a72d6807623eae72c2689329ff\n" }, { "commit": "cac2fcbb0a3b70d9a0482fefa5da02887d985ff1", "tree": "3a630f1ff9be05813e1c1efb71b2728df973c60c", "parents": [ "6b8185ec7f872d2787b4433a11c98142e97c3ec8" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Aug 21 06:24:32 2025 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 04:51:32 2026 -0700" }, "message": "[MLIR] Apply clang-tidy fixes for performance-unnecessary-copy-initialization in ShardingInterfaceImpl.cpp (NFC)\n\nGitOrigin-RevId: 1ac60ce8a0ca890b3c69489e5ffab64344e05972\n" }, { "commit": "6b8185ec7f872d2787b4433a11c98142e97c3ec8", "tree": "c3e5d9a72dae7b4aba719d038a5b3b6a45b3de5d", "parents": [ "69213c5a63689977982fcf1d9249e3c9bc3c8902" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Aug 21 09:00:52 2025 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 04:51:22 2026 -0700" }, "message": "[MLIR] Apply clang-tidy fixes for bugprone-argument-comment in SparseTensorRewriting.cpp (NFC)\n\nGitOrigin-RevId: dfc866ca0298c45ffc4b7f08d761183dea2512f2\n" }, { "commit": "69213c5a63689977982fcf1d9249e3c9bc3c8902", "tree": "88b10dd9ebb4feeded58d029f562f4127319b5cc", "parents": [ "e4ce8dd7a839e3ed1720d4fe9492cd8565188a3b" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Aug 21 05:37:03 2025 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 04:51:12 2026 -0700" }, "message": "[MLIR] Apply clang-tidy fixes for llvm-else-after-return in TypeConverter.cpp (NFC)\n\nGitOrigin-RevId: b50d5ad5074c6149ea3e45fa5cde862f8e84557e\n" }, { "commit": "e4ce8dd7a839e3ed1720d4fe9492cd8565188a3b", "tree": "26a8c497c0e8afd96a59d2d2e012523858143700", "parents": [ "57d01d1f0131601af3adfb16ec89e4a528636b77" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Aug 21 12:17:16 2025 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 04:50:53 2026 -0700" }, "message": "[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in TestReshardingPartition.cpp (NFC)\n\nGitOrigin-RevId: 4991abe0791dfec380cf73ce37c83e81453038ac\n" }, { "commit": "57d01d1f0131601af3adfb16ec89e4a528636b77", "tree": "587f68181a5ba53d7633b3770c463d24f269fb1b", "parents": [ "badbb43194e44d8a3e6d6772c2548f869e7284e9" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Mon Mar 30 12:28:07 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 03:31:06 2026 -0700" }, "message": "[MLIR][Vector] Fix direct operand.set() bypassing rewriter in WarpOpScfIfOp/ForOp (#188948)\n\nIn WarpOpScfIfOp and WarpOpScfForOp, the walk that updates users of\nescaping values (after moving them to the inner WarpOp) was calling\noperand.set() directly, bypassing the rewriter API. This causes the\nMLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS fingerprint check to fail.\n\nFix by wrapping the operand updates with rewriter.modifyOpInPlace().\n\nAssisted-by: Claude Code\nFix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS\u003dON.\nGitOrigin-RevId: 6c8782b347b56f8499d4d914052e7f819f8e9fab\n" }, { "commit": "badbb43194e44d8a3e6d6772c2548f869e7284e9", "tree": "869bb94bcd2847700f14f9ea7e1914fb85da7b3b", "parents": [ "044912dcb66777cd0d08c45aa2f8f473d2bae7d6" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Mon Mar 30 12:27:41 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 03:30:58 2026 -0700" }, "message": "[MLIR][MPI] Fix direct getRefMutable().assign() bypassing rewriter in FoldCast (#188943)\n\nThe FoldCast canonicalization pattern was calling\nop.getRefMutable().assign(src) directly, bypassing the rewriter. This\nviolates the pattern API contract and causes fingerprint change failures\nwhen\nMLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS is enabled. Wrap the\nmodification with b.modifyOpInPlace() to properly notify the rewriter of\nthe changes.\n\nAssisted-by: Claude Code\nFix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS\u003dON.\nGitOrigin-RevId: 0bb0c7db2bd158a7515ba9726bc27fe9acc368b6\n" }, { "commit": "044912dcb66777cd0d08c45aa2f8f473d2bae7d6", "tree": "4400f90aefc804d3bc8d36de5e71e5c1bd8b53cf", "parents": [ "25190abec27616e73783963e223c18f4aa1136f0" ], "author": { "name": "Michael Marjieh", "email": "99331190+mmarjieh@users.noreply.github.com", "time": "Mon Mar 30 13:27:11 2026 +0300" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 03:30:52 2026 -0700" }, "message": "[Value] Mark getOperandNumber as Const (#189267)\n\nGitOrigin-RevId: ccb64cb53e9fcee942a176c1f5a0b0b18e342c82\n" }, { "commit": "25190abec27616e73783963e223c18f4aa1136f0", "tree": "f3067d420e7056b035324e199869991f0d85926c", "parents": [ "404c240bc10086ae038604e0c4b860d716a446e8" ], "author": { "name": "Zhewen Yu", "email": "zhewenyu@amd.com", "time": "Mon Mar 30 10:25:04 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 03:30:43 2026 -0700" }, "message": "[mlir][affine] Add ValueBounds-based simplification for delinearize(linearize) pairs (#187245)\n\n`affine.linearize_index` pairs\n(`CancelDelinearizeOfLinearizeDisjointExactTail`) only match when basis\nelements are exactly equal as `OpFoldResult` values. This means they\ncannot simplify cases where dynamic basis products are semantically\nequal but represented by different SSA values or affine expressions.\n\nThis patch adds a new pass `affine-simplify-with-bounds` with two\nrewrite patterns that use `ValueBoundsConstraintSet` to prove equality\nof basis products:\n\n- **`SimplifyDelinearizeOfLinearizeDisjointManyToOneTail`**: matches\nwhen multiple consecutive linearize dimensions have a product equal to a\nsingle delinearize dimension (many-to-one).\n- **`SimplifyDelinearizeOfLinearizeDisjointOneToManyTail`**: matches\nwhen a single linearize dimension equals the product of multiple\nconsecutive delinearize dimensions (one-to-many).\n\nBoth patterns scan from the tail (innermost dimensions) and support\npartial matching. Unmatched prefix dimensions are left as residual\nlinearize/delinearize operations.\n\nAssisted-by: Cursor (Claude)\n\n---------\n\nSigned-off-by: Yu-Zhewen \u003czhewenyu@amd.com\u003e\nGitOrigin-RevId: 00698678e404699f6c776679272a7e3392c46306\n" }, { "commit": "404c240bc10086ae038604e0c4b860d716a446e8", "tree": "1ac0131007a5bafbfed589db4e69ffbd976acfbb", "parents": [ "a43994ff944a7c7c0ff309e402198fc9342bd940" ], "author": { "name": "Hocky Yudhiono", "email": "hocky.yudhiono@gmail.com", "time": "Mon Mar 30 17:23:01 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Mar 30 02:25:45 2026 -0700" }, "message": "[mlir][tosa] Harden folds/canonicalizations for unranked and dynamic shapes (#188188)\n\nThis MR fixes #188187 and #187974. Tighten TOSA constant folding and\nidentity-style folds so they do not produce invalid or type-incorrect\nresults when the op’s result type is unranked, rank-dynamic, or\notherwise not a static `RankedTensorType`. Several paths previously\nassumed ranked/static shapes or folded through to the operand without\nchecking that the result type matched the value being returned.\n\n`DenseElementsAttr::get`, `SplatElementsAttr::get` and similar builders\nneed a static shape; folding with `tensor\u003c*xT\u003e` or dynamic dims must not\nfabricate dense attributes with the wrong shape.\n\nReturning the operand from a “no-op” fold is only valid when\n`operand.getType() \u003d\u003d op.getType()`; otherwise the folder would change\nthe IR’s type semantics (e.g. ranked → unranked). Which in the bigger\npipeline supposed to be handled by `-tosa-infer-shapes`\n\nAssisted-by: CLion code completion, GPT 5.3 - Codex\n\n---------\n\nCo-authored-by: Sayan Saha \u003csayans@mathworks.com\u003e\nGitOrigin-RevId: a7bc628e44e69b43fbaf135a569691bf09fc083f\n" }, { "commit": "a43994ff944a7c7c0ff309e402198fc9342bd940", "tree": "e65e59aa0cf83086742443839eac110bf9360b6d", "parents": [ "e0efd8e31918783a9807a761c56d7c57a0dc4a84" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Sun Mar 29 13:40:58 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sun Mar 29 04:45:30 2026 -0700" }, "message": "[MLIR][LLVMIR] Allow llvm.call and llvm.invoke to use llvm.mlir.alias as callee (#189154)\n\nPreviously, the verifier for `llvm.call` and `llvm.invoke` would reject\ncalls where the callee was an `llvm.mlir.alias`, reporting that the\nsymbol does not reference a valid LLVM function or IFunc. Similarly, the\nMLIR-to-LLVM-IR translation had no handling for aliases as callees.\n\nThis patch extends both the verifier and the translation to accept\n`llvm.mlir.alias` as a valid callee for `llvm.call` and `llvm.invoke`,\nmirroring the existing support for `llvm.mlir.ifunc`. The function type\nfor alias calls is derived from the call operands and result types, and\nthe translation emits a call through the alias global value.\n\nFixes #147057\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 4151f5d36f26492079dca23f2a5ac13480098fb1\n" }, { "commit": "e0efd8e31918783a9807a761c56d7c57a0dc4a84", "tree": "d9b07a9a305a2c1c1a6bbd4309387efb2e4b5c4a", "parents": [ "2560fee3ff74339da616248252cffa86212c8a79" ], "author": { "name": "Sergei Lebedev", "email": "185856+superbobry@users.noreply.github.com", "time": "Sun Mar 29 12:39:48 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sun Mar 29 04:41:43 2026 -0700" }, "message": "[MLIR] [Python] The generated op definitions now use typed parameters (#188635)\n\nAs with operand/result types this only handles standard dialects, but I think it is still useful as is.\n\nWe could consider extensibility if/when necessary.\n\nGitOrigin-RevId: dd9bc6603cda141b22ae69af52a93fcf88e3baa8\n" }, { "commit": "2560fee3ff74339da616248252cffa86212c8a79", "tree": "1716cd07460766a9d53e9ab523356c9e588511a6", "parents": [ "874ed5d5ce401a8a74d2d258d74acd92a48534d5" ], "author": { "name": "dwrank", "email": "dwrank@gmail.com", "time": "Sun Mar 29 04:03:37 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sun Mar 29 04:05:48 2026 -0700" }, "message": "[MLIR][build] Fix undefined references in debug shared libs (#189207)\n\nFixes undefined references in debug shared libs when building MLIR:\n-DLLVM_ENABLE_PROJECTS\u003d\"mlir\"\n-DCMAKE_BUILD_TYPE\u003dDebug\n-DBUILD_SHARED_LIBS\u003d1\n\nDebug build (-O0) disables dead code elimination, resulting in undefined\nreferences in the following shared libs:\n\nMLIROpenMPDialect (needs to link with TargetParser)\nMLIRXeVMDialect (needs to link with TargetParser and MLIROpenMPDialect)\nMLIRNVVMDialect (needs to link with TargetParser and MLIROpenMPDialect)\n\nFixes #189206\n\nAssisted-by: Claude Code\n\nFrom:\n\nhttps://github.com/llvm/llvm-project/commit/d7e60d525026f24a3514be34d8e6e56622436823\nUtils were added to OpenMP, particularly [[maybe_unused]]\nsetOffloadModuleInterfaceAttributes() which calls\nllvm::Triple::normalize() creating a new dependency on TargetParser.\nGitOrigin-RevId: fc01c81d03c74b9da6aa4e3ea22487b2e5b2517a\n" }, { "commit": "874ed5d5ce401a8a74d2d258d74acd92a48534d5", "tree": "eb28e33a7c13cb21b854f1439a7a4383946d8c55", "parents": [ "900efdaaecd1962e5b50908528e66d313370a694" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Sat Mar 28 10:00:04 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 10:05:31 2026 -0700" }, "message": "[MLIR][XeGPU] Add distribution patterns for vector step, shape_cast \u0026 broadcast from sg-to-wi (#185960)\n\nThis PR adds distribution patterns for vector.step, vector.shape_cast \u0026\nvector.broadcast in the new sg-to-wi pass\n\nGitOrigin-RevId: 9f3a9ea6ae689fa0fbd0137999834915cc908e5c\n" }, { "commit": "900efdaaecd1962e5b50908528e66d313370a694", "tree": "1dcc0d34a54771230895f743a753471d880388a1", "parents": [ "9214c15e08dfa7ce62f9b1aef173a93c80a4c7f6" ], "author": { "name": "Twice", "email": "twice@apache.org", "time": "Sat Mar 28 21:46:21 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 06:50:43 2026 -0700" }, "message": "[MLIR][Python] Add more field specifiers to Python-defined operations (#188064)\n\nThis PR adds two new field specifiers (`operand` and `attribute`) and\nextends the existing one (`result`):\n- `default_factory` parameter is added for `result` and `attribute` to\nspecify default value via a lambda/function\n- `kw_only` parameter is added for all these three specifiers, to make a\nfield a keyword-only parameter (without giving a default value).\n\n```python\ndef result(\n *,\n infer_type: bool \u003d False,\n default_factory: Optional[Callable[[], Any]] \u003d None,\n kw_only: bool \u003d False,\n) -\u003e Any: ...\n\ndef operand(\n *,\n kw_only: bool \u003d False,\n) -\u003e Any: ...\n\ndef attribute(\n *,\n default_factory: Optional[Callable[[], Any]] \u003d None,\n kw_only: bool \u003d False,\n) -\u003e Any: ...\n```\n\nExamples about how to use them:\n```python\nclass OperandSpecifierOp(TestFieldSpecifiers.Operation, name\u003d\"operand_specifier\"):\n a: Operand[IntegerType[32]] \u003d operand()\n b: Optional[Operand[IntegerType[32]]] \u003d None\n c: Operand[IntegerType[32]] \u003d operand(kw_only\u003dTrue)\n\nclass ResultSpecifierOp(TestFieldSpecifiers.Operation, name\u003d\"result_specifier\"):\n a: Result[IntegerType[32]] \u003d result()\n b: Result[IntegerType[16]] \u003d result(infer_type\u003dTrue)\n c: Result[IntegerType] \u003d result(\n default_factory\u003dlambda: IntegerType.get_signless(8)\n )\n d: Sequence[Result[IntegerType]] \u003d result(default_factory\u003dlist)\n e: Result[IntegerType[32]] \u003d result(kw_only\u003dTrue)\n\nclass AttributeSpecifierOp(\n TestFieldSpecifiers.Operation, name\u003d\"attribute_specifier\"\n):\n a: IntegerAttr \u003d attribute()\n b: IntegerAttr \u003d attribute(\n default_factory\u003dlambda: IntegerAttr.get(IntegerType.get_signless(32), 42)\n )\n c: StringAttr[\"a\"] | StringAttr[\"b\"] \u003d attribute(\n default_factory\u003dlambda: StringAttr.get(\"a\")\n )\n d: IntegerAttr \u003d attribute(kw_only\u003dTrue)\n```\n\n---------\n\nCo-authored-by: Rolf Morel \u003crolfmorel@gmail.com\u003e\nGitOrigin-RevId: e568136e9480231030966acd4d79e1c05638aab7\n" }, { "commit": "9214c15e08dfa7ce62f9b1aef173a93c80a4c7f6", "tree": "25f31ebf44556d074fbc32d21c468b8b0077fc7d", "parents": [ "16958e8f49af9446e573581ea58e621c9dd4edf6" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Sat Mar 28 13:54:43 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 06:00:24 2026 -0700" }, "message": "[MLIR] Fix crash in test-bytecode-roundtrip when test dialect is absent (#189163)\n\nWhen invoking `-test-bytecode-roundtrip\u003dtest-dialect-version\u003dX.Y` on a\nmodule that contains no test dialect operations, the reader type\ncallback in `runTest0` called\n`reader.getDialectVersion\u003ctest::TestDialect\u003e()` and then immediately\nasserted that it succeeded. However, if the test dialect was never\nreferenced in the bytecode (because no test dialect types appear in the\nmodule), the dialect\u0027s version information is not stored in the\nbytecode, so `getDialectVersion` legitimately returns failure.\n\nWhen the test dialect version is unavailable in the bytecode being read,\nthe module contains no test dialect types, so no \"funky\"-group overrides\nare needed and the callback can safely skip by returning `success()`.\n\nA regression test is added with a module that has no test dialect ops,\nexercising the `test-dialect-version\u003d2.0` path that previously crashed.\n\nFixes #128321\nFixes #128325\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 3b76b85b15a3e7aa004814944f6237f131b95961\n" }, { "commit": "16958e8f49af9446e573581ea58e621c9dd4edf6", "tree": "1d1289e9708889d2647a3d6fbe5e0c23d1f05c7a", "parents": [ "e67e1eb085ab2b42f000a9fa361cbe4e40bd1b4d" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Sat Mar 28 11:08:23 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 03:10:40 2026 -0700" }, "message": "[MLIR][Vector] Fix crash in foldDenseElementsAttrDestInsertOp on poison index (#188508)\n\nWhen a dynamic index of -1 (the kPoisonIndex sentinel) was folded into\nthe static position of a vector.insert op,\nfoldDenseElementsAttrDestInsertOp would proceed to call\ncalculateInsertPosition, which returned -1. The subsequent iterator\narithmetic (allValues.begin() + (-1)) was undefined behaviour, causing\nan assertion in DenseElementsAttr::get.\n\nFix by bailing out early in foldDenseElementsAttrDestInsertOp when any\nstatic position equals kPoisonIndex, consistent with how\nInsertChainFullyInitialized already guards this case.\n\nFixes #188404\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 00c6b4dabd66d51ac672db710d16674ab4fa0c89\n" }, { "commit": "e67e1eb085ab2b42f000a9fa361cbe4e40bd1b4d", "tree": "648aadfad476020dd3edb8fef0bc92279eb58463", "parents": [ "6111827b464cea1f78e6d8607c8f363c262b3773" ], "author": { "name": "lonely eagle", "email": "2020382038@qq.com", "time": "Sat Mar 28 16:51:01 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 01:55:24 2026 -0700" }, "message": "Revert \"[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface\" (#189150)\n\nReverts llvm/llvm-project#187864, because it is causing same build bot\nfailures. See https://lab.llvm.org/buildbot/#/builders/138/builds/27662\nand\nhttps://lab.llvm.org/buildbot/#/builders/169/builds/21376/steps/11/logs/stdio\nfor memory leak issues.\n\nGitOrigin-RevId: 1efef761c5f338eb046a09fae640b5c978f55cc5\n" }, { "commit": "6111827b464cea1f78e6d8607c8f363c262b3773", "tree": "46f9558312338135c77c62f72e1a93677ae14021", "parents": [ "6d61a46e61136b86672f4f432b70891ee4da058c" ], "author": { "name": "Jorn Tuyls", "email": "jorn.tuyls@gmail.com", "time": "Sat Mar 28 09:06:19 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 01:10:39 2026 -0700" }, "message": "[mlir][vector] Reject alignment attribute on tensor-level gather/scatter (#188924)\n\nGitOrigin-RevId: 5ae2fe75c3898cbf78f170d3cd686e02182f36fc\n" }, { "commit": "6d61a46e61136b86672f4f432b70891ee4da058c", "tree": "f37d291dc5d9eabf058679a7d1dea35a28c6f3b0", "parents": [ "6dc244f0ae3c2df0c332a66403712253d237ca87" ], "author": { "name": "lonely eagle", "email": "2020382038@qq.com", "time": "Sat Mar 28 15:22:46 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Mar 28 00:26:37 2026 -0700" }, "message": "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface (#187864)\n\nTo simplify the output of the reduction-tree pass, this PR introduces\nthe eraseRedundantBlocksInRegion. For regions containing multiple\nexecution paths, this functionality selects the shortest \u0027interesting\u0027\npath. Additionally, this PR adds the getSuccessorForwardOperands API to\nBranchOpInterface. This allows us to extract the ForwardOperands for a\nspecific path chosen from multiple alternatives, enabling the creation\nof a cf.br operation for the redirected jump.\n\nGitOrigin-RevId: eb53972051f175224569ebc28e8dafbf73930b4d\n" }, { "commit": "6dc244f0ae3c2df0c332a66403712253d237ca87", "tree": "cf18ebcc76ac5160f0751d2193d2329ebadbee45", "parents": [ "8543c3dc3e57a98295d816e9e8636b36684a2b50" ], "author": { "name": "Md Abdullah Shahneous Bari", "email": "md.abdullah.shahneous.bari@intel.com", "time": "Fri Mar 27 21:18:18 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 19:20:47 2026 -0700" }, "message": "[XeVM] Fix the cache-control metadata string generation. (#187591)\n\nPreviously, it generated extra `single` quote marks around the outer\nbraces (i.e., `\u0027{\u0027` `6442:\\220,1\\22` `\u0027}\u0027`). SPIR-V backend does not\nexpect that. It expects `{6442:\\220,1\\22}`.\n\nGitOrigin-RevId: 8e59c3a816d3281e00582ee553f8fdfdfa52ea39\n" }, { "commit": "8543c3dc3e57a98295d816e9e8636b36684a2b50", "tree": "693bbb06dc7b22afe72fec7fc0f895056166d326", "parents": [ "daec59b18c2a57d6840c2e7e232379581bdab4f9" ], "author": { "name": "Stanislav Mekhanoshin", "email": "Stanislav.Mekhanoshin@amd.com", "time": "Fri Mar 27 15:20:14 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 15:25:43 2026 -0700" }, "message": "[AMDGPU] Remove neg support from 4 more gfx1250 WMMA (#189115)\n\nThese are previously covered by AMDGPUWmmaIntrinsicModsAllReuse.\n\nGitOrigin-RevId: a2d84b5d8d9c3ae3a07c4f47cd1b6b8f64be1b41\n" }, { "commit": "daec59b18c2a57d6840c2e7e232379581bdab4f9", "tree": "38071d58b29d3c871d06ee75db2a0236612fb442", "parents": [ "32fc5c06b841632aa4d3e18b1514c163c631d8a3" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Mar 27 19:41:46 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 11:45:29 2026 -0700" }, "message": "[MLIR][TableGen] Fix ArrayRefParameter in struct format roundtrip (#189065)\n\nWhen an ArrayRefParameter (or OptionalArrayRefParameter) appears in a\nnon-last position within a struct() assembly format directive, the\nprinted\noutput is ambiguous: the comma-separated array elements are\nindistinguishable from the struct-level commas separating key-value\npairs.\n\nFix this by wrapping such parameters in square brackets in both the\ngenerated printer and parser. The printer emits \u0027[\u0027 before and \u0027]\u0027 after\nthe array value; the parser calls parseLSquare()/parseRSquare() around\nthe\nFieldParser call. Parameters with a custom printer or parser are\nunaffected\n(the user controls the format in that case).\n\nFixes #156623\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 509f181f40f86926a0c264b41fab7777be4ff91e\n" }, { "commit": "32fc5c06b841632aa4d3e18b1514c163c631d8a3", "tree": "7413f46bbcc06f4b6da77efd7f9be222fe9d58fe", "parents": [ "83ab53af8be7824043ea1e5426339aed5189a5cb" ], "author": { "name": "Md Abdullah Shahneous Bari", "email": "md.abdullah.shahneous.bari@intel.com", "time": "Fri Mar 27 13:29:33 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 11:36:25 2026 -0700" }, "message": "[XeVM] Use `ocloc` for binary generation. (#188331)\n\nXeVM currently doesn\u0027t support native binary generation. This PR enables\nAhead of Time (AOT) compilation of gpu module to native binary using\n`ocloc`.\n\nCurrently, only works with LevelZeroRuntimeWrappers.\n\nGitOrigin-RevId: 88bc265295f609e5ab6f36a0456a08ddb8cae872\n" }, { "commit": "83ab53af8be7824043ea1e5426339aed5189a5cb", "tree": "407cd1dd1537580aef17c879cdb9f98bdafd4995", "parents": [ "b1ebb7b92e6598d149d5c5f6228cf91983df7f2c" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Mar 27 18:36:51 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 11:36:11 2026 -0700" }, "message": "[MLIR][SCF] Fix loopUnrollByFactor for unsigned loops with narrow integer types (#189001)\n\n`loopUnrollByFactor` used `getConstantIntValue()` to read loop bounds,\nwhich sign-extends the constant to `int64_t`. For unsigned `scf.for`\nloops with narrow integer types (e.g. i1, i2, i3), this produces wrong\nresults: a bound such as `1 : i1` has `getSExtValue() \u003d\u003d -1` but should\nbe treated as `1` (unsigned).\n\nTwo bugs were introduced by this:\n\n1. **Wrong epilogue detection**: the comparison `upperBoundUnrolledCst \u003c\nubCst` used signed int64, so e.g. `0 \u003c -1` (where ubCst is the\nsign-extended i1 value 1) evaluated to false, suppressing the epilogue\nthat should execute the remaining iterations.\n\n2. **Zero step after overflow**: when `tripCountEvenMultiple \u003d\u003d 0` (all\niterations go to the epilogue), `stepUnrolledCst \u003d stepCst *\nunrollFactor` can overflow the bound type\u0027s bitwidth and wrap to 0. A\nzero step causes `constantTripCount` to return `nullopt`, preventing the\nzero-trip main loop from being elided.\n\nFix:\n- Use zero-extension (`getZExtValue`) instead of sign-extension when\nreading bounds for unsigned loops.\n- When `tripCountEvenMultiple \u003d\u003d 0`, keep the original step for the main\nloop to avoid the zero-step issue (the step value is irrelevant for a\nzero-trip loop anyway).\n\nFixes #163743\n\nAssisted-by: Claude Code\nGitOrigin-RevId: cb58fe9df51193b827d181e2716bbe3b71ba7b83\n" }, { "commit": "b1ebb7b92e6598d149d5c5f6228cf91983df7f2c", "tree": "a2794c6d953cc5ee142cb26754d4756b21db64c6", "parents": [ "f75f854cb1db7db89e575c57b571f876d3a0f75c" ], "author": { "name": "Jianhui Li", "email": "jian.hui.li@intel.com", "time": "Fri Mar 27 10:36:35 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 10:37:54 2026 -0700" }, "message": "[MLIR][XeGPU] Extend convert_layout op to support scalar type (#188874)\n\nThis PR adds scalar type to convert_layout op\u0027s result and operand. It\nalso enhance convert_layout pattern in wg-to-sg, unrolling, and\nsg-to-lane distribution.\n\nIt is to support reduction to scalar, whether currently the layout\npropagation doesn\u0027t support scalar to carry any layout. The design\nchoice to insert convert_layout op after reduction-to-scalar op to\nrecord the layout information permanently across the passes.\n\nGitOrigin-RevId: 28e2fa324727571a2dd6b0000e602acce37f8887\n" }, { "commit": "f75f854cb1db7db89e575c57b571f876d3a0f75c", "tree": "ed4fdc7f33d6cfafb2a7bd14b5e57532400da772", "parents": [ "16951313d013d3887e9a9f6ad8e3b4408d3f3760" ], "author": { "name": "Han-Chung Wang", "email": "hanhan0912@gmail.com", "time": "Fri Mar 27 10:21:20 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 10:26:18 2026 -0700" }, "message": "[mlir][vector] Add support for dropping inner unit dims for transfer_read/write with masks. (#188841)\n\nThe revision clears a long-due TODO, which supports the lowering when\ntransfer_read/write ops have mask via inserting a vector.shape_cast op\nfor the masked value.\n\n---------\n\nSigned-off-by: hanhanW \u003chanhan0912@gmail.com\u003e\nGitOrigin-RevId: 9e44babdafc74df960e4668c805574634ed23e36\n" }, { "commit": "16951313d013d3887e9a9f6ad8e3b4408d3f3760", "tree": "649a10520545e8f7a5dd65e7d0a2213baaef137c", "parents": [ "6b0b99bb4a5e0a36345b3b4a6a25493b925e4646" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Mar 27 17:32:13 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 09:36:10 2026 -0700" }, "message": "[mlir][IR] Add test for complex\u003ci1\u003e dense element roundtrip (#189047)\n\nFixes #140302\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 40d5b19690e4dd2371479486ab8fa60a2b05fbe1\n" }, { "commit": "6b0b99bb4a5e0a36345b3b4a6a25493b925e4646", "tree": "01b51873b003d4e08426585c0b0534e8a68d1e79", "parents": [ "207a33e9a63ceca33ee6aad8dd567c1b906350bb" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Mar 27 17:31:09 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 09:33:15 2026 -0700" }, "message": "[mlir][ods] Document and test DefaultValuedProp elision in prop-dict format (#189045)\n\nIssue #152743 reports that DefaultValuedProp is printed even when the\nproperty value equals the default, unlike DefaultValuedAttr which is not\nprinted in that case.\n\nThe fix for this was already present in the codebase since commit\n8955e285e1ac (\"[mlir] Add property combinators, initial ODS support\"),\nwhich added elision of default-valued properties in the\ngenPropDictPrinter\nfunction in OpFormatGen.cpp.\n\nThis commit adds:\n- Documentation in Operations.md clarifying that DefaultValuedProp is\n also elided from prop-dict output when the value equals the default,\n consistent with the existing documentation for DefaultValuedAttr.\n- An explicit test in properties.mlir verifying that DefaultValuedProp\n with value equal to default is elided from prop-dict output, and that\n DefaultValuedProp with a non-default value is still printed.\n\nFixes #152743\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 79fdef22d628c926995082b1c052298f47aea283\n" }, { "commit": "207a33e9a63ceca33ee6aad8dd567c1b906350bb", "tree": "f3fd93e8d10d509a6dec5980a0d7708a73bbbac9", "parents": [ "4fb537415065dcbf03eff584b48633c797b9378b" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Mar 27 17:27:08 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 09:30:32 2026 -0700" }, "message": "[MLIR][Transforms] Fix two bugs in loop-invariant-subset-hoisting (#188761)\n\nFix two issues in `MatchingSubsets::populateSubsetOpsAtIterArg`:\n\n1. The `collectHoistableOps` parameter was declared but never used when\ninserting subset ops via `insert(subsetOp)`. As a result, when recursing\ninto nested loops with `collectHoistableOps\u003dfalse`, the nested loop\u0027s\nsubset ops were incorrectly added to the hoistable extraction/insertion\npairs of the parent loop. This caused spurious failures in the\n`allDisjoint` check, preventing valid hoisting when nested loop ops\noverlapped with outer loop ops. Fix by passing the parameter:\n`insert(subsetOp, collectHoistableOps)`.\n\n2. In the nested loop handling branch, there was no guard to detect when\na value has multiple nested loop uses (i.e., is used as an init arg in\nmore than one nested loop). Without the guard, `nextValue` would be\nsilently overwritten, leading to an incorrect use-def chain traversal.\nAdd `if (nextValue) return failure()` before setting `nextValue` for the\nnested loop case, mirroring the existing guard for insertion ops.\n\nFixes #147096\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 5d293008c26d366cfa1eee9b6287de3313f0dcc6\n" }, { "commit": "4fb537415065dcbf03eff584b48633c797b9378b", "tree": "ebd1d66642ecade5d1482955fd445734208b915d", "parents": [ "79b628aca45b3b70c1e8f6f3b8f1b975790b611d" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Mar 27 17:26:45 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Mar 27 09:30:26 2026 -0700" }, "message": "[MLIR][EmitC] Fix crash in SwitchOp::getEntrySuccessorRegions on unsigned integer type (#188546)\n\nSwitchOp::getEntrySuccessorRegions and getRegionInvocationBounds called\nIntegerAttr::getInt() to retrieve the constant switch argument, but\ngetInt() asserts that the attribute type must be a signless integer or\nindex. For unsigned integer types (e.g. ui32), this assertion fired and\ncrashed the process.\n\nFix by selecting the appropriate accessor based on the attribute type:\ngetInt() for signless/index, getSInt() for signed, and getUInt() (cast\nto int64_t) for unsigned integer types. Unknown types fall back to the\nconservative \"all regions possible\" path.\n\nThe same fix is applied to getRegionInvocationBounds, which had an\nidentical call to getInt().\n\nFixes #187973\n\nAssisted-by: Claude Code\nGitOrigin-RevId: e9669fd6fb8c3f155cd6acafa669567ad4051f35\n" } ], "next": "79b628aca45b3b70c1e8f6f3b8f1b975790b611d" }