)]}' { "log": [ { "commit": "cc1e3d27246ed272fff548a904e10b4b32ab5a22", "tree": "06a75981bc02fdc8b3f59d9ae4e064cd07d61cc6", "parents": [ "32fc80eadd58ded1c60c472424363f69bc53c9c9" ], "author": { "name": "Arseniy Obolenskiy", "email": "arseniy.obolenskiy@amd.com", "time": "Sat Oct 24 13:09:31 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sat Oct 24 04:11:20 2026 -0700" }, "message": "[mlir][SPIR-V] Support MaxByteOffset decoration in binary round trips (#235084)\n\nGitOrigin-RevId: ccda5d7abf91e00b91c743ed1e6a1cd200b42997\n" }, { "commit": "32fc80eadd58ded1c60c472424363f69bc53c9c9", "tree": "c8c4b6413d504e27b50842fed076b29bfb259ae5", "parents": [ "21c3b3a8651c5bbdd8ff8ddfe88bdf85f4b55f91" ], "author": { "name": "Nishant Patel", "email": "nishant.b.patel@intel.com", "time": "Fri Oct 23 20:46:01 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 20:54:08 2026 -0700" }, "message": "[MLIR][XeGPU] Rematerialize layout conversion sources after conflict resolution (#230669)\n\nThis PR separates layout conflict resolution from rematerialization. The\nresolver now inserts xegpu.convert_layout for conflicts ....a following\nstep clones eligible, cheap vector producer chains in the target layout\nand replaces those conversions. This avoids SLM round trips.\n\nGitOrigin-RevId: 33bb8249a9edddb8fcbf5002d9a012ffd772dd03\n" }, { "commit": "21c3b3a8651c5bbdd8ff8ddfe88bdf85f4b55f91", "tree": "f325670d3563c2bd460f4dac7bcdd04ca855e385", "parents": [ "51cea5a3f050142c7141e05132479bac9c9da114" ], "author": { "name": "Prashanth", "email": "ping@starone01.me", "time": "Sat Oct 24 06:21:18 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 17:57:47 2026 -0700" }, "message": "[mlir][scf] add support for unsigned loop for back peeling (#234435)\n\n- add support for unsigned loop for back peeling\n- fix sub overflow bug in the signed path\n- remove unsigned operation check in dispatcher\n- return early if unsigned in `peelForLoopAndSimplifyBounds` since\naffine.min/max does not hold for unsigned loops\n- add tests for edge cases in unsigned, sub overflow and no bound\nsimplification for unsigned\n\nfrom https://github.com/llvm/llvm-project/pull/231100\n\nclaude helped me with the tests and correctness.\n\nGitOrigin-RevId: e9d8621d5c44cd4d829a0fbac5d27b9aefc405ab\n" }, { "commit": "51cea5a3f050142c7141e05132479bac9c9da114", "tree": "a4e0e5e641078d2c046868662f6544fae7debe99", "parents": [ "ca202d366ee131017fcf38140731d8326840c8c7" ], "author": { "name": "Jared Hoberock", "email": "jaredhoberock@gmail.com", "time": "Fri Oct 23 18:02:35 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 16:07:26 2026 -0700" }, "message": "[mlir][scf] Add scf.execute_region to the structural type conversions (#234405)\n\nThis change adds support for `scf.execute_region` to\n`populateSCFStructuralTypeConversions`. `scf.execute_region` seems to be\nan omission, so this change simply fills a hole.\n\nAdd `ConvertExecuteRegionOpTypes` (patterned after `ConvertIfOpTypes`)\nto convert the types of `scf.execute_region` and add that to the list of\npatterns in `populateSCFStructuralTypeConversions` and legality in\n`populateSCFStructuralTypeConversionTarget`.\n\nAlso adds a unit test to check for type conversion in\n`scf.execute_region`.\n\nAssisted-by: Claude\nGitOrigin-RevId: 1f54b8458a00666e04831071b718befca263e559\n" }, { "commit": "ca202d366ee131017fcf38140731d8326840c8c7", "tree": "09e04abf589074c2ffe6a1f50f8782af64838d4b", "parents": [ "398508cdda164cdc9d5acf29b04eff8250b2b315" ], "author": { "name": "Erich Keane", "email": "ekeane@nvidia.com", "time": "Fri Oct 23 15:58:02 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 16:04:49 2026 -0700" }, "message": "[CIR] Add \u0027loop-id\u0027 to loop and branch types. (#235052)\n\nWhile working through the loop-hints lowering, I discovered that we need\na way to make each loop get a \u0027distinct\u0027 loop-annotation in LLVM-IR.\n\nThis relationship is lost during FlattenCFG when it splits to multiple\nbranches. #233890 adds this to the LLVM-IR dialect.\n\nI considered/had a patch to do this to FlattenCFG as well, however when\nworking on further loop hints (parallel in particular), we need to be\nable to spread this value inside of the loop itself, so it makes more\nsense to generate the ID from the start.\n\nI suspect this ID will come in handy outside of the loop-hints, so it is\nleft as a separate attribute.\n\nGitOrigin-RevId: 3d021445d21578878b79332029190e517498494b\n" }, { "commit": "398508cdda164cdc9d5acf29b04eff8250b2b315", "tree": "243f0abdefe9c7a8393c9b1a021a5d1cf4ab7eb0", "parents": [ "398fa42f57695de51f2d4294e97402cc474f89a8" ], "author": { "name": "Slava Zakharin", "email": "szakharin@nvidia.com", "time": "Fri Oct 23 12:19:48 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 12:27:43 2026 -0700" }, "message": "[SmallVector] Fixed usage in mlir/lib/TableGen/Operator.cpp. (#235067)\n\nIt failed to build after #234861 (see notes there).\n\nGitOrigin-RevId: abe54402379a1212afc3f9ee040ff73a104c3c7a\n" }, { "commit": "398fa42f57695de51f2d4294e97402cc474f89a8", "tree": "3637612edb7318c8595a5781dc56ff244de82be6", "parents": [ "c3a6a8250f4cc5e7e0ce3d72eed947bb1a1ad9f2" ], "author": { "name": "Henrich Lauko", "email": "xlauko@mail.muni.cz", "time": "Fri Oct 23 20:36:32 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 11:42:25 2026 -0700" }, "message": "Reland \"[mlir] Fix false positive loops in RegionBranchOpInterface::hasLoop\" (#234591)\n\nRelands #233784, reverted in #234573 because it broke two CIR unit\ntests.\n\nThose tests expected hasLoop() to be true for cir.await and\ncir.coroutine, although neither has a cycle: resume is reachable from\nready both directly and through suspend, and the coroutine reaches exit\nand destroy along several paths. That was the false positive this change\nfixes. The relanded change updates both expectations to false.\n\nOriginal description:\n\n`RegionBranchOpInterface::hasLoop` reported a loop whenever its\ntraversal popped a region it had already visited. The worklist gets one\nentry per successor of each terminator, so a region reachable along two\npaths was popped twice even without a cycle, for example when two\nterminators of a region branch to the same successor region.\n\n`hasLoop` now runs one iterative depth-first search from the entry\nregions and reports a loop only when it reaches a region that is still\non the DFS stack. Each region is queried at most once, through\n`RegionBranchOpInterface::getSuccessorRegions(Region \u0026)` instead of\nasking each terminator with null operand attributes. The stop condition\nof the remaining traversal loses its `visited` argument.\n\nAssisted-by: Claude Code (Claude Opus 5.5)\nGitOrigin-RevId: 48a2034d36af707bd2ee5fc713d8c4d72643c5bd\n" }, { "commit": "c3a6a8250f4cc5e7e0ce3d72eed947bb1a1ad9f2", "tree": "f614a7930db21f3793ac6265e6c9e8263811751a", "parents": [ "633fbdd5275f50cf8d968cf422d554e042f3226e" ], "author": { "name": "SunilKuravinakop", "email": "98882378+SunilKuravinakop@users.noreply.github.com", "time": "Fri Oct 23 23:28:34 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 11:01:37 2026 -0700" }, "message": "[flang][OpenMP] Support for \"omp assumes no_openmp\". (#233252)\n\nSupport for \"omp assumes no_openmp\".\n\n------\nSunil Kuravinakop (koops@hpe.com)\n\nGitOrigin-RevId: 5f4b94d324ce95d2f1ba1c570fa55d6c2d5657fe\n" }, { "commit": "633fbdd5275f50cf8d968cf422d554e042f3226e", "tree": "24995c84e1eb637b39d3ca47f13ca6ef39416668", "parents": [ "c88bd8efbee2fe6c76bbc93ae78dd3db841c0310" ], "author": { "name": "Zhen Wang", "email": "zhenw@nvidia.com", "time": "Fri Oct 23 09:23:02 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 09:27:20 2026 -0700" }, "message": "[mlir][acc] Flag the data region of a structured declare for the runtime (#234822)\n\nA structured `acc.declare_enter` / `acc.declare_exit` pair lowers to the\nsame `__tgt_acc_data_begin` / `__tgt_acc_data_end` entry points as\n`acc.data`, with the region flags set to `None`. The runtime cannot tell\nthe two apart, yet a declare of a device pointer in a local scope has to\nkeep a registration that a plain `deviceptr` mapping does not need.\n\nAdd `ACCDataRegionFlags::Declare` and set it on the begin and end calls\nof a structured declare. Unstructured declares still go through\n`__tgt_acc_declare`, and the declare-action recipes through\n`__tgt_acc_mirror_alloc` / `__tgt_acc_mirror_dealloc`, so they are\nunchanged. A post-dealloc recipe\u0027s `data_end` holds no token and keeps\n`None`.\n\nGitOrigin-RevId: 665af317dee943d508d35c0435e6bbcd22f40149\n" }, { "commit": "c88bd8efbee2fe6c76bbc93ae78dd3db841c0310", "tree": "746c8dc19ee58d15dd164fe8569524943df7433d", "parents": [ "704e90ba8014391d201084457d6f15fb3ed62900" ], "author": { "name": "Christopher Bate", "email": "30323187+christopherbate@users.noreply.github.com", "time": "Fri Oct 23 10:09:18 2026 -0600" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 09:11:36 2026 -0700" }, "message": "[MLIR][CMake] Fix LLVM_DEFINITIONS handling in standalone example (#234653)\n\nSplit LLVM_DEFINITIONS into a CMake list before passing it to\nadd_definitions(), and apply it before HandleLLVMOptions overwrites the\nvariable.\n\nAdd comments explaining the compile and linker flag setup and how to\nscope HandleLLVMOptions around third-party dependencies.\n\nGitOrigin-RevId: 0bf6904b51142dda149f651216cfb326bf66a3ca\n" }, { "commit": "704e90ba8014391d201084457d6f15fb3ed62900", "tree": "cd43c3ee0835ecddd7bd7c0fe2474ab457355ca4", "parents": [ "3f5c66df737ee31bd1fbd3c839ca680d902f60dc" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Fri Oct 23 17:51:07 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 08:57:03 2026 -0700" }, "message": "[mlir] Avoid rewriting unreachable blocks in the greedy driver (#225814)\n\nA rewrite can disconnect a block after the iteration\u0027s initial CFG sweep.\nOperations queued in that block can then develop self-referential SSA uses,\nwhich are permitted in unreachable code but can cause folds or patterns to\ncrash or repeatedly re-enqueue operations. Worklist processing may never\nreturn, preventing the next unreachable-block sweep from running. The\nconstant-branch-folding reproducer in #221152 demonstrates this failure.\nTrack reachability through rewriter notifications and skip worklist\noperations in unreachable blocks until the next iteration removes them.\n\nThis extends #153957, which fixed the unreachable `arith.addi`\ncanonicalization hang in #153732 by erasing unreachable blocks before\napplying patterns and deferred handling blocks that become unreachable\nduring rewriting. #154038 similarly protects the walk-based rewrite driver\nby skipping unreachable blocks instead of erasing them. The reachable\ngraph-region self-cycle crash in #194824 and #205064 is a separate\nproblem; #207185 proposes a fold-specific fix for it.\n\nA forwarding `ReachabilityListener` sits between the rewriter and the\nworklist driver. Notifications only record what changed: terminator\nchanges and blocks that leave a region are recorded per block. Queries happen\nbetween rewrites, once per popped operation, and bring the cache up to\ndate. A region is traversed from its entry block when it has no cached\nstate or when its entry block changed. For recorded terminator changes,\nthe cached successors of each block are compared with its current\nsuccessors.\nAdded edges extend the reachable set. A lost edge whose target is gone\nor has no predecessors left, and whose target\u0027s cached successors are all\nstill successors of the changed block, only drops the target; this is the\nshape left by folding a constant conditional branch and by merging a block\ninto its predecessor. Any other lost edge marks the blocks behind its target\nuncertain, and only a query for one of them traverses the region.\nIn-place folds are reported to the listener by the driver. Nested regions check\ntheir containing blocks up to the scope. Caches are cleared at worklist-pass\nboundaries. With `MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`,\nevery query is checked against a fresh traversal.\n\nTests cover inserted and redirected blocks, blocks connected before\nrewrite completion, nested regions, block moves and merges, entry-block\ninsertion and erasure, edges lost by two blocks in one rewrite, a lost edge into a\nloop, a block reconnected after being disconnected, in-place folds that\nretarget a branch, and explicit op lists. Observer diagnostics check\nwhether affected operations are processed within a single greedy iteration.\nSkipped operations are not automatically retried if a later rewrite makes their\nblock reachable; this is documented and tested in each strictness mode.\n\nCompile-time impact of `mlir-opt -canonicalize` on synthetic inputs,\nsame Release build with assertions, min / median wall time in seconds over 3\nruns. Outputs are identical with and without this patch. The inputs\nbehind a loop header cannot merge into the entry block, so every query goes\nthrough the cache; invalidating the cache on block insertion and\nerasure, or traversing after every lost edge, made them quadratic (up to 50x\nslower).\n\n| Input | Baseline | This patch |\n|---|---|---|\n| 1 block, 80k foldable arith ops | 0.135 / 0.139 | 0.144 / 0.145 |\n| 20k foldable ops in 30-deep nested `scf.if` | 0.079 / 0.080 | 0.078 /\n0.079 |\n| 20k-block chain of foldable ops behind a loop header, no CFG change |\n0.410 / 0.414 | 0.416 / 0.420 |\n| 20k functions, each a 4-block CFG with one branch | 0.565 / 0.575 |\n0.623 / 0.633 |\n| 20k-block chain of constant `cf.cond_br` | 0.151 / 0.158 | 0.158 /\n0.159 |\n| 20k-block chain of diamonds whose pass-through blocks fold | 0.145 /\n0.151 | 0.164 / 0.165 |\n| Same diamonds behind a loop header | 0.145 / 0.146 | 0.172 / 0.177 |\n| 20k blocks behind a loop header, identical-successor `cf.cond_br` fold\nand merge | 0.232 / 0.237 | 0.253 / 0.256 |\n| 20k constant `cf.cond_br` into a shared dead block, behind a loop\nheader | 1.571 / 1.578 | 1.622 / 1.626 |\n\nAssisted-by: Codex\nAssisted-by: Claude Code\nGitOrigin-RevId: 2c6c3a3c3a5969b86d4afeb446ab8e16baa13bac\n" }, { "commit": "3f5c66df737ee31bd1fbd3c839ca680d902f60dc", "tree": "032279b0438c0e1fe7d08e3740a7be8d2bce0341", "parents": [ "f59ed1ab2ed9e41f38fb02f84735086ffced6fba" ], "author": { "name": "Markus Böck", "email": "markus.boeck02@gmail.com", "time": "Fri Oct 23 16:22:18 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 07:32:05 2026 -0700" }, "message": "[mlir][gpu] Split target-specific passes out of MLIRGPUTransforms (#234903)\n\nMLIRGPUTransforms linked every GPU target: the AMDGPU, LLVM, ROCDL and\nXeVM dialects, plus MLIRNVVMTarget, MLIRROCDLTarget, MLIRSPIRVTarget and\nMLIRExecutionEngineUtils. So any user of any target-specific or\ntarget-independent GPU pass also pulled in every target\u0027s dialect and\nserialization library.\n\nMove the target-specific passes and patterns into one library per\ntarget. Each has its own Passes.td and Passes.h and links only its own\ntarget dialect.\nMLIRGPUTransforms no longer has any target dependencies at all.\n\n---------\n\nCo-authored-by: Claude \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 55bc2b607674fb1431fb79eb8b6740076dc16fe7\n" }, { "commit": "f59ed1ab2ed9e41f38fb02f84735086ffced6fba", "tree": "327040a7b470a62a54f5638c7184ef8d5b03d325", "parents": [ "ba0716592f87a656b9d74b17633b1edff4629583" ], "author": { "name": "Federico Bruzzone", "email": "federico.bruzzone.i@gmail.com", "time": "Fri Oct 23 10:30:01 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 07:31:36 2026 -0700" }, "message": "[mlir][tensor] Verify that `tensor.pad` padding is non-negative (#231389)\n\n`tensor.pad` did not reject negative static `low` or `high` padding, so\nan op like `tensor.pad %t low[-2] high[0]` was verified as long as the\nresult type was consistent with it.\n\nWith this PR we reject negative constant padding in `PadOp::verify`, and\ndocument in the op description that the padding amounts must be\nnon-negative. A negative dynamic value is UB, since the verifier only\nlooks at the op itself.\n\nAlso make `FoldStaticPadding` keep negative constants as SSA operands,\nso that canonicalization does not fold them into the attribute and\ncreate an op the verifier rejects.\n\n---------\n\nSigned-off-by: Federico Bruzzone \u003cfederico.bruzzone.i@gmail.com\u003e\nCo-authored-by: Mehdi Amini \u003cjoker.eph@gmail.com\u003e\nGitOrigin-RevId: 97d6feca9de0c1fdbbb346aaa8d0ff5cdc4d6b06\n" }, { "commit": "ba0716592f87a656b9d74b17633b1edff4629583", "tree": "097da9b2fa4fd42785affc785a5ab12169a1e734", "parents": [ "2942f1fff255bd514201df0ca9d27ba305fbf5f3" ], "author": { "name": "Federico Bruzzone", "email": "federico.bruzzone.i@gmail.com", "time": "Fri Oct 23 10:25:59 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 01:32:18 2026 -0700" }, "message": "[mlir][Vector] Fold chains of `vector.extract` with dynamic positions (#228686)\n\n`foldExtractOpFromExtractChain` bailed out when any extract in the chain\nhad a dynamic position.\n\nWith this PR, we now _simply_ merge the positions as `OpFoldResult`s\ninstead, then split them back into the `static_position` attribute and\nthe dynamic operands with `decomposeMixedValues` to correctly set them.\n\nAI-assisted.\n\n---------\n\nSigned-off-by: Federico Bruzzone \u003cfederico.bruzzone.i@gmail.com\u003e\nGitOrigin-RevId: 35273ddfdd56b36ce2e73ca0b04e50f1afaaf54b\n" }, { "commit": "2942f1fff255bd514201df0ca9d27ba305fbf5f3", "tree": "9ff5e77bf5e1a20bc7e32ef35cc84ec4619e70b1", "parents": [ "e9a2653e2c2058af1455a391568274e09dc3af7a" ], "author": { "name": "Akun", "email": "cubehan3@gmail.com", "time": "Fri Oct 23 15:58:16 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 01:01:03 2026 -0700" }, "message": "[mlir][tosa] Move MUL shift value check out of verifier (#234063)\n\nKeep `MulOp::verify()` local to the operation by removing its constant\n`shift` value check. The existing strict `tosa-validate` check covers\ninvalid shift values.\n\nMove the floating-point shift regression test to `error_if_check.mlir`.\n\nAssisted-by: Codex\nGitOrigin-RevId: d48b7304aeb9237b830607cb4e01ce4ea0a2f9bf\n" }, { "commit": "e9a2653e2c2058af1455a391568274e09dc3af7a", "tree": "7355ad5fd66adfc1808f54bfd3db7a7f8d330c9d", "parents": [ "251a9fcddd07325077e15871b50920bf816d8ed9" ], "author": { "name": "Tobias Wölfel", "email": "towoe@users.noreply.github.com", "time": "Fri Oct 23 09:23:08 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Fri Oct 23 00:27:55 2026 -0700" }, "message": "[mlir][cmake] NFC: fix typo (#234862)\n\nGitOrigin-RevId: 951f63304368d78920b6dc63639e0637515d1821\n" }, { "commit": "251a9fcddd07325077e15871b50920bf816d8ed9", "tree": "0f5d5337635dcc0069f52b6496d512685216906f", "parents": [ "59054e7d05c993091c71ab58be6a36a680a04298" ], "author": { "name": "Kirill Vedernikov", "email": "kvedernikov@nvidia.com", "time": "Fri Oct 23 07:53:42 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 22:57:22 2026 -0700" }, "message": "[MLIR][NVVM] Support sparse.{de}compress MLIR Ops (#232731)\n\nThis change adds support for `sparse.compress` and `sparse.decompress` MLIR Ops.\n\nGitOrigin-RevId: 06d86d74ae257c460211fc33e3f055a07d2d3e22\n" }, { "commit": "59054e7d05c993091c71ab58be6a36a680a04298", "tree": "320985b3fdc07c1a09e6eec4e9e0105b59bc4dc0", "parents": [ "bb451517bb59950e705f9315f8229203599dc2e9" ], "author": { "name": "Federico Bruzzone", "email": "federico.bruzzone.i@gmail.com", "time": "Fri Oct 23 07:46:42 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 22:52:37 2026 -0700" }, "message": "[mlir][tosa] Emit a runtime assertion when lowering `tosa.pad` with negative padding (#232221)\n\nGitOrigin-RevId: f4e0f0251540a2c90f7112004f7cdb1618ca0226\n" }, { "commit": "bb451517bb59950e705f9315f8229203599dc2e9", "tree": "20c2591dddebf87e2a5ccecf4264ea0f871826e0", "parents": [ "55020423d36882ed68fe3ca415ed82a98897c726" ], "author": { "name": "Pecco", "email": "gaoyanfeng.gyf@alibaba-inc.com", "time": "Fri Oct 23 10:26:01 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 19:33:48 2026 -0700" }, "message": "[mlir][linalg] Fix incorrect hoisting of transfers with mismatched masks (#232246)\n\n`hoist_redundant_vector_transfers` can change the result of a loop when\nthe read and write have different mask operands.\n\nFor example, `%buffer` initially contains `[0, 0]`, `%mask` is `[true,\nfalse]`, `%zero` is `0`, and `%ones` is `[1, 1]`:\n\n```mlir\nscf.for %i \u003d %c0 to %c2 step %c1 {\n %v \u003d vector.transfer_read %buffer[%c0], %zero, %mask\n {in_bounds \u003d [true]} : memref\u003c2xi32\u003e, vector\u003c2xi32\u003e\n %next \u003d arith.addi %v, %ones : vector\u003c2xi32\u003e\n vector.transfer_write %next, %buffer[%c0]\n {in_bounds \u003d [true]} : vector\u003c2xi32\u003e, memref\u003c2xi32\u003e\n}\n```\n\nThe masked read returns zero for the second element on every iteration.\nThe two iterations write `[1, 1]` and `[2, 1]`, respectively.\n\nThe transformation hoists the read and write out of the loop:\n\n```mlir\n%init \u003d vector.transfer_read %buffer[%c0], %zero, %mask\n {in_bounds \u003d [true]} : memref\u003c2xi32\u003e, vector\u003c2xi32\u003e\n%result \u003d scf.for %i \u003d %c0 to %c2 step %c1\n iter_args(%v \u003d %init) -\u003e (vector\u003c2xi32\u003e) {\n %next \u003d arith.addi %v, %ones : vector\u003c2xi32\u003e\n scf.yield %next : vector\u003c2xi32\u003e\n}\nvector.transfer_write %result, %buffer[%c0]\n {in_bounds \u003d [true]} : vector\u003c2xi32\u003e, memref\u003c2xi32\u003e\n```\n\nHere, the mask is applied only before the loop. Both elements are\nincremented on every iteration, so the final write stores `[2, 2]`\ninstead of `[2, 1]`.\n\nTo fix this, hoisting is disallowed when the transfers\u0027 mask operands\ndiffer, including when only one transfer has a mask. Pairs with\nidentical mask operands or no masks remain eligible for hoisting.\n\nAssisted-by: Codex (OpenAI)\nGitOrigin-RevId: 3005402f99f3a7d4c828dd33cb4fdef35d4b2a54\n" }, { "commit": "55020423d36882ed68fe3ca415ed82a98897c726", "tree": "dc746d2aeb25662092eb678c60fcc7a05358ce4d", "parents": [ "7756da5f25b5a76ad50427a936d6f0b48df64835" ], "author": { "name": "Jared Hoberock", "email": "jaredhoberock@gmail.com", "time": "Thu Oct 22 18:29:30 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 16:32:45 2026 -0700" }, "message": "[mlir][gpu] Fix address space casts in gpu.alloc/gpu.dealloc lowering (#234394)\n\nGitOrigin-RevId: 1ebe9b98ff23cedcb63ecdef849a3292b9a05332\n" }, { "commit": "7756da5f25b5a76ad50427a936d6f0b48df64835", "tree": "2fe323d2cbe08e2e7b7608cfd1523560f7e4ea7a", "parents": [ "de72c2f90252434af7ac65138e51cd0ef87b6534" ], "author": { "name": "Michael Klemm", "email": "michael.klemm@amd.com", "time": "Thu Oct 22 18:15:59 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 09:33:16 2026 -0700" }, "message": "[Flang][OpenMP] Fix OpenMP data-mapping stride calculation (#225653)\n\nThe calculation of strides when mapping individual sub-arrays from\nmulti-dimensional array, the calcuation of the stride was missing such\nthat when mapping all of the multi-dim array only a fraction was\nactually mapped.\n\n---------\n\nSigned-off-by: Dominik Adamski \u003cdominik.adamski@amd.com\u003e\nCo-authored-by: Dominik Adamski \u003cdominik.adamski@amd.com\u003e\nCo-authored-by: Claude Opus 4 (1M context) \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 281a0db4c42f502ceec270211adc7177dff5e709\n" }, { "commit": "de72c2f90252434af7ac65138e51cd0ef87b6534", "tree": "c28927d19696c86e392820362eb196a641200483", "parents": [ "00cae8e094fb8917f3d8359199d7767e8cbf40e8" ], "author": { "name": "Reid Kleckner", "email": "rkleckner@nvidia.com", "time": "Thu Oct 22 08:30:15 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 08:43:03 2026 -0700" }, "message": "[LLVM][docs] Rename AMDGPU reST docs to Markdown (#233644)\n\nTracking issue: #201242\nSee the [migration guide] for more information.\n\n[migration guide]:\nhttps://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines\n\nThis is the initial straight rename commit. It will probably break the\ndocs build, but it has to be a separate PR for blame preservation\npurposes.\n\nGitOrigin-RevId: 41e7010f93a60f36725387d01120c4ad270bd2fd\n" }, { "commit": "00cae8e094fb8917f3d8359199d7767e8cbf40e8", "tree": "bf57a676bd0f133091bdde366980a7cc661edd69", "parents": [ "aa8e19b8a29209a37859e6765a8864828ef87c5d" ], "author": { "name": "Erich Keane", "email": "ekeane@nvidia.com", "time": "Thu Oct 22 06:34:55 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 06:42:25 2026 -0700" }, "message": "[MLIR][LLVMIR] Add \u0027align\u0027 to loop-annotations (#234263)\n\nThis is necessary for the llvm.loop.align flag, which clang needs to\ngenerate. Its a touch weird in that LLVM\u0027s verifier (not the MLIR\n dialect!) enforces this as a 32 bit value, so we did have to do a\nlittle work to make sure we enforce that too/sooner in the dialect.\n\nGitOrigin-RevId: a406552dffb2ac17000a5cbe16f8ce28f8e21019\n" }, { "commit": "aa8e19b8a29209a37859e6765a8864828ef87c5d", "tree": "b8907bd734a79714388b9cbf11e20794417faff8", "parents": [ "a089f6ee9eb75f093343f3db51c44d7cb4959790" ], "author": { "name": "Maher Ahmed Maher Shola", "email": "maher.shola.officer@gmail.com", "time": "Thu Oct 22 15:07:11 2026 +0300" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 05:14:07 2026 -0700" }, "message": "[mlir][tosa] Don\u0027t broadcast non-constant mul shift and negate zero points (#233121)\n\nWhen the `tosa.mul` shift or the `tosa.negate` zero points are not\nconstants,\nthe TosaToLinalg lowering passed them to the elementwise broadcasting\nhelpers,\nwhich assume every operand has the rank of the input. These operands are\nalways\n`tensor\u003c1xT\u003e`, so the lowering asserted for rank-0 inputs, for dynamic\nshapes,\nand for inputs with a size-1 dimension after the first (e.g. `3x1`).\nSeparately, when only one negate zero point was non-constant, the body\nread both\nzero points as block arguments although neither was passed to the\n`linalg.generic`.\nThis patch keeps these single-element operands out of broadcasting and\npasses\nthem to the `linalg.generic` with an indexing map that always reads\nelement 0.\nNegate passes both zero points whenever either is non-constant, matching\nwhat\nthe body expects. Constant shifts and zero points are handled as before.\nThe new lit tests cover rank-0, size-1 dimension, dynamic and mixed\nconstant/non-constant zero points, based on the reproducers from the\nissues.\n\nAI disclosure: I found this bug with a testing harness built with Claude\n(Claude Code). The fix, the tests are built and tested by me\n\nFixes #231418\nFixes #231834\nFixes #231835\n\nGitOrigin-RevId: 885e40a960ebeb99949d060e8ac42c2f5f44f35e\n" }, { "commit": "a089f6ee9eb75f093343f3db51c44d7cb4959790", "tree": "6d1523070894831af4b8958ad22fbe7dde6b2fe3", "parents": [ "5bbe2e23774b75cc9319c42396a02e689ace9938" ], "author": { "name": "Mattéo Rizza Murgier", "email": "matteo.rizza-murgier@sipearl.com", "time": "Thu Oct 22 13:38:40 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 04:42:29 2026 -0700" }, "message": "[mlir][affine] Fix SuperVectorizer crash on uniforms from multi-result ops (#234531)\n\n`registerValueVectorReplacement` registered the defining op of a uniform\nas replaced by its broadcast, which led to an assert when said op had\nseveral results. Since the defining op is outside the vectorized loop\nand not replaced, only register the value replacement.\n\nFixes an assert on e.g.:\n```mlir\n// mlir-opt -affine-super-vectorize\u003d\"virtual-vector-size\u003d128\"\nfunc.func @uniform_multi_result(%in: memref\u003c512xi32\u003e, %a: i32, %b: i32) {\n %sum, %overflow \u003d arith.addui_extended %a, %b : i32, i1\n affine.for %i \u003d 0 to 512 {\n %ld \u003d affine.load %in[%i] : memref\u003c512xi32\u003e\n %add \u003d arith.addi %ld, %sum : i32\n }\n return\n}\n```\n\nGitOrigin-RevId: 7d3f111cf6d2d3a67c1d18c36142cf8d31094347\n" }, { "commit": "5bbe2e23774b75cc9319c42396a02e689ace9938", "tree": "4cb237af851b65f73db58de759e64df293946b0c", "parents": [ "39a59f13c9d4950f5639cc125af1c4843ce36970" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Oct 22 13:28:04 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 04:40:15 2026 -0700" }, "message": "[IRBuilder] Remove insertion block (#234245)\n\nThe insertion point already stores the block it belongs to, so we should\nnot be storing a separate insertion block.\n\nRemoving this requires some fixes, because there are a few places where\nthe insertion point gets invalidated, and the insertion block is still\naccessed afterwards. In cases like this, we should save the insertion\nblock before iterator invalidation occurs.\n\nCompletes the work started in\nhttps://github.com/llvm/llvm-project/pull/228117.\n\nGitOrigin-RevId: 322b1a26dfd7ad688e19fdfcacdd408037b386ac\n" }, { "commit": "39a59f13c9d4950f5639cc125af1c4843ce36970", "tree": "6652c3d611e14890dbe20fd44dfaecff195f40f6", "parents": [ "b83695e2d9f70757fc2aa0a2bc59213ad705366f" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Oct 22 12:39:07 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 03:43:46 2026 -0700" }, "message": "Revert \"[mlir] Fix false positive loops in RegionBranchOpInterface::hasLoop\" (#234573)\n\nReverts llvm/llvm-project#233784\n\nBroke CIR tests affecting premerge:\n\nClang-Unit :: CIR/./CIRUnitTests/CIRControlFlowTest/AwaitOp\nClang-Unit :: CIR/./CIRUnitTests/CIRControlFlowTest/CoroutineOp\nGitOrigin-RevId: f608a51e8eac16aac642fda63ed3ca8b5f38726b\n" }, { "commit": "b83695e2d9f70757fc2aa0a2bc59213ad705366f", "tree": "3b9bb9c60bda03dcfbc506c6bd0640a2ae7b0f23", "parents": [ "50a37c9031e9805dc9c1ba02a439fdce3f7291ac" ], "author": { "name": "Chaitanya", "email": "Krishna.Sankisa@amd.com", "time": "Thu Oct 22 15:45:33 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 03:23:55 2026 -0700" }, "message": "[mlir][ABI] Add indirect address space to ArgClassification (#229991)\n\nSummary:\n\n- Added an `indirectAddrSpace` field to `ArgClassification` for the\naddressspace of the pointer passed in place of an Indirect value.\n- Forwarded `getIndirectAddrSpace()` from the LLVM ABI library in CIR\n`CallConvLowering` and accept a matching `indirect_addr_space` key in\nthe `test_classify` attribute.\n- Added a unit test to check for default value, equality and rejection\nof negative values.\n\nRelated to issue: https://github.com/llvm/llvm-project/issues/220471\n\nfollow-up PR: #230415\n\nAssisted by : claude opus 5.5\n\nGitOrigin-RevId: db6ee1eeb2c295b4a9dc48b43dd04e0a40465683\n" }, { "commit": "50a37c9031e9805dc9c1ba02a439fdce3f7291ac", "tree": "ccb86ad2774128a99d44b0345c369104de8b3a51", "parents": [ "3ed9df7f562db50f7b3f1e1931db049a6f09055d" ], "author": { "name": "Henrich Lauko", "email": "xlauko@mail.muni.cz", "time": "Thu Oct 22 12:07:28 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 03:18:30 2026 -0700" }, "message": "[mlir] Fix false positive loops in RegionBranchOpInterface::hasLoop (#233784)\n\n`RegionBranchOpInterface::hasLoop` reported a loop whenever its\ntraversal popped a region it had already visited. The worklist gets one\nentry per successor of each terminator, so a region reachable along two\npaths was popped twice even without a cycle, for example when two\nterminators of a region branch to the same successor region.\n\n`hasLoop` now runs one iterative depth-first search from the entry\nregions and reports a loop only when it reaches a region that is still\non the DFS stack. Each region is queried at most once, through\n`RegionBranchOpInterface::getSuccessorRegions(Region \u0026)` instead of\nasking each terminator with null operand attributes. The stop condition\nof the remaining traversal loses its `visited` argument.\n\nAssisted-by: Claude Code (Claude Opus 5.5).\nGitOrigin-RevId: ccd6bf94945635d83580995d73f5970fa2d20490\n" }, { "commit": "3ed9df7f562db50f7b3f1e1931db049a6f09055d", "tree": "2d4f5a60dd26d3384a91a7ea2256c17bb9f2f4e0", "parents": [ "89323bd3aad406222cf6e2693e7e7a94c843db57" ], "author": { "name": "Luke Hutton", "email": "luke.hutton@arm.com", "time": "Thu Oct 22 10:33:54 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 02:39:26 2026 -0700" }, "message": "[mlir][tosa] Add `tosa.avg_pool2d_adaptive` purity note (#233473)\n\nSimilar to `tosa.avg_pool2d`, add a note about purity.\n\nGitOrigin-RevId: d68505e11d6753cb323a5e9176e71f9ff9cec1a4\n" }, { "commit": "89323bd3aad406222cf6e2693e7e7a94c843db57", "tree": "3e04881fe083ca14d6335b9b6d2ff49ade6c8ac5", "parents": [ "c4682397aef73dc1e2cec5f0717c5ccc1687d5da" ], "author": { "name": "Abid Qadeer", "email": "haqadeer@amd.com", "time": "Thu Oct 22 09:34:36 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 01:37:20 2026 -0700" }, "message": "[OpenMP][flang] Fix location of reducing worksharing constructs. (#233934)\n\nThis fixes issue https://github.com/llvm/llvm-project/issues/222305. The\nproblem was in 3 places.\n\n1. OpenMPIRBuilder did not set the location on Unreachable and the empty\nlocation later got picked by the builder when the insertion point was\nmoved onto one of the branches split from it.\n2. inlineConvertOmpRegions did not restore the location after calling\nconvertBlock.\n3. initReductionVars did not restore the construct location after the\ndetour to alloca block.\n\nCo-authored-by: Cursor \u003ccursoragent@cursor.com\u003e\nGitOrigin-RevId: 23316504ebf6f561b65f4faf5bd4d9696a263af7\n" }, { "commit": "c4682397aef73dc1e2cec5f0717c5ccc1687d5da", "tree": "0753bf59cd0e6724c5af5bd8fb4898a26ad4143a", "parents": [ "d05a33ec050a0a65530b6bb7b3b804cca7d8359f" ], "author": { "name": "Peng Sun", "email": "peng.sun@arm.com", "time": "Thu Oct 22 09:31:18 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Thu Oct 22 01:36:45 2026 -0700" }, "message": "[mlir][tosa] Clarify signless integer type semantics (#234173)\n\nUpdate the comment. Explain that signless integers match the TOSA\nspecification and use signed interpretation unless an operation\nspecifies otherwise. Clarify that unsigned types and additional bit\nwidths are dialect extensions, and point to strict validation for\nstandard conformance.\n\nGitOrigin-RevId: 50e861b609960424d76a8185bbf58c5327d4c0c9\n" }, { "commit": "d05a33ec050a0a65530b6bb7b3b804cca7d8359f", "tree": "b39127a244c2fb73789eb50685cc0e5c81e2bfd2", "parents": [ "50b6ec076c26a3ef234e9fb7db5dbd3980d14c4a" ], "author": { "name": "Chang Yong Lik", "email": "51813538+ahlag@users.noreply.github.com", "time": "Thu Oct 22 15:45:19 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 23:51:59 2026 -0700" }, "message": "[mlir][complex] Fix exp special values for infinite real part (#232791)\n\nGitOrigin-RevId: 28bb0cf8d076a4135ca5bd368fb0ca8937f03912\n" }, { "commit": "50b6ec076c26a3ef234e9fb7db5dbd3980d14c4a", "tree": "eab29de31547d8f772f64394cd114a08020674c2", "parents": [ "904b9c9701eb6166a98c7db988877d2648a1643f" ], "author": { "name": "Anutosh Bhat", "email": "andersonbhat491@gmail.com", "time": "Thu Oct 22 11:49:37 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 23:28:30 2026 -0700" }, "message": "[mlir][arith] Honor finite min/max reduction identities (#232257)\n\nI hit this while compiling a JAX transformer block through IREE/WebGPU\nin JupyterLite. `linalg.softmax` requests a finite reduction\ninitializer, but `getIdentityValueAttr` returns NaN for `maxnumf`, which\nTint rejects.\n\nHonor `useOnlyFiniteValue` for `maxnumf` and `minnumf`, preserving the\nexisting NaN identities when the flag is false. Update the existing\nsoftmax check and add finite min/max reduction cases.\n\nGitOrigin-RevId: ba58d3b90cda99bff2f6988dfbcbf27628bc11c6\n" }, { "commit": "904b9c9701eb6166a98c7db988877d2648a1643f", "tree": "5ea4e27e1ce9cbaea658ea6ac2e8d1609ede39a0", "parents": [ "b46ff03a9c0f5ac730eb54a7c668775b38e7110c" ], "author": { "name": "Ivan Butygin", "email": "ivan.butygin@gmail.com", "time": "Thu Oct 22 08:13:08 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 23:17:53 2026 -0700" }, "message": "[mlir] Notify rewriter listeners when hoisting constants (#233776)\n\n`OperationFolder` was calling `op-\u003emoveBefore` without notifying the\nrewriter.\n\nAlso, fixed use-after-free exposed in `TestSingleFold`,\n`notifyOperationInserted` called both when op is materialized and when\nit moved in the block, causing same op to be added multiple times,\n`notifyOperationErased` would only remove one instance leaving remaining\npointers dangling.\n\nGitOrigin-RevId: 3edfb3731ae243906a1fc7b46f6b87c5e1957667\n" }, { "commit": "b46ff03a9c0f5ac730eb54a7c668775b38e7110c", "tree": "404aad97cd994e1a92bb9ab04ac171a539c4a265", "parents": [ "360e2626b4167414429e67893c2242722616ac45" ], "author": { "name": "Fangrui Song", "email": "i@maskray.me", "time": "Wed Oct 21 18:53:15 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 18:56:56 2026 -0700" }, "message": "PassBuilder: Take LLVMContext for LibraryOptionsContext (#233150)\n\nPassBuilder uses the PipelineTuningOptions\u0027 context, else the\nTargetMachine\u0027s, else null, for which LibraryOptionsContext::get\u003cT\u003e\nreturns T::Global. A caller that sets neither, such as llvm-reduce,\nsilently gets the global values.\n\nTake the LLVMContext whose library options the pipelines read as the\nfirst constructor parameter instead, as StandardInstrumentations does,\nand remove PipelineTuningOptions::LibraryOptions.\n\nLLM-aided\n\nGitOrigin-RevId: 910cdcd093775616973dfaf6c09850bc93873cb3\n" }, { "commit": "360e2626b4167414429e67893c2242722616ac45", "tree": "b1078d3bd09eec2f3a9b06dc6a900ce6f1683aff", "parents": [ "c8d8618e32a75b494888baaec65230f94414ca1e" ], "author": { "name": "Alexander Shaposhnikov", "email": "ashaposhnikov@google.com", "time": "Wed Oct 21 16:12:55 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 16:16:39 2026 -0700" }, "message": "[mlir][cf] Canonicalize cf.switch cases targeting ub.unreachable (#234387)\n\nAdd a canonicalization pattern for cf.switch that drops cases whose\ndestination block contains only ub.unreachable, mirroring the existing\nDropUnreachableCondBranch pattern for cf.cond_br.\n(following https://github.com/llvm/llvm-project/pull/169873)\n\nGitOrigin-RevId: a808f8ea7fdc61ead417bfe55e8ef5f728776aeb\n" }, { "commit": "c8d8618e32a75b494888baaec65230f94414ca1e", "tree": "60c728da5703858f8360c9c1122585bb1cda07d7", "parents": [ "89619f75f759724f28a6d6ea7f1f3b170ae72aa3" ], "author": { "name": "Alexander Shaposhnikov", "email": "ashaposhnikov@google.com", "time": "Wed Oct 21 15:18:47 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 15:23:30 2026 -0700" }, "message": "[mlir][LLVM] Add a negative test for inttoptr(ptrtoint(x)) (#234397)\n\nFolding `inttoptr(ptrtoint(x))` to `x` is incorrect even when the\nintermediate integer is at least as wide as the pointer, because the\npointer produced by `inttoptr` may carry different provenance than `x`.\nAdd a negative canonicalization test, with a comment pointing to the\nrelevant references, so that the cast pair is documented as\nintentionally not folded and future attempts are caught.\n\nGitOrigin-RevId: 3832e114799cea9f24c6d9ae06d6d75df4327ab5\n" }, { "commit": "89619f75f759724f28a6d6ea7f1f3b170ae72aa3", "tree": "755dec8680dc879a0cd5a69213884ec2e59b4d48", "parents": [ "9b9b2801c4660f168830d76bb3027c016d280cfb" ], "author": { "name": "Moazin K.", "email": "mkhatti@nvidia.com", "time": "Wed Oct 21 14:35:18 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 14:43:47 2026 -0700" }, "message": "[OpenACC] Handle device_type(*) properly for OpenACC routine bind (#234373)\n\nAdd `getEffectiveBindName` to `acc.routine` to select the applicable\nbind for a target device. Use it in `ACCImplicitRoutine`,\n`ACCRoutineLowering`, `ACCRoutineToGPUFunc`,\n`ACCMaterializeRoutineBindTargets`, and `ACCBindRoutine`.\n\nAssisted-by: Codex\nGitOrigin-RevId: c090e6654f2161ab7a6385fb4bce4be208969bba\n" }, { "commit": "9b9b2801c4660f168830d76bb3027c016d280cfb", "tree": "0e17e404f665ee2eb013262dec0b0d8b632fbbe8", "parents": [ "2b1cadec04f9c2fb2b6a08d39cdef971b8c57d26" ], "author": { "name": "Vijay Kandiah", "email": "vkandiah@nvidia.com", "time": "Wed Oct 21 14:28:02 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 12:33:56 2026 -0700" }, "message": "[mlir][acc] Reduce a complex accumulator componentwise (#234276)\n\n`gpu.all_reduce` accepts only integer and float operands, including in\nits\ncustom-region form. A thread-partitioned `acc.reduction_accumulate` or\n`acc.reduction_accumulate_array` with a complex accumulator therefore\nproduced\nIR that failed to verify:\n\n```\nerror: \u0027gpu.all_reduce\u0027 op operand #0 must be Integer or Float, but got \u0027complex\u003cf32\u003e\u0027\n```\n\nMLIR repro:\n\n```mlir\n// repro.mlir\nfunc.func @complex_reduction(%slot: memref\u003ccomplex\u003cf32\u003e\u003e) {\n %c128 \u003d arith.constant 128 : index\n %tx \u003d acc.par_width %c128 par_dim(#acc.par_dim\u003cthread_x\u003e)\n acc.compute_region launch(%ktx \u003d %tx) ins(%s \u003d %slot) : (memref\u003ccomplex\u003cf32\u003e\u003e) {\n %c0 \u003d arith.constant 0 : index\n %c1 \u003d arith.constant 1 : index\n %one \u003d arith.constant 1.0 : f32\n %v \u003d complex.create %one, %one : complex\u003cf32\u003e\n scf.parallel (%i) \u003d (%c0) to (%ktx) step (%c1) {\n acc.reduction_accumulate %v to %s \u003cadd\u003e par_dims(#acc\u003cpar_dims[thread_x]\u003e) : complex\u003cf32\u003e -\u003e memref\u003ccomplex\u003cf32\u003e\u003e\n scf.reduce\n } {acc.par_dims \u003d #acc\u003cpar_dims[thread_x]\u003e}\n acc.yield\n } \u003c{origin \u003d \"acc.parallel\"}\u003e\n return\n}\n```\n\n```\nmlir-opt repro.mlir --pass-pipeline\u003d\"builtin.module(func.func(acc-cg-to-gpu))\"\n```\n\nThis change reduces the real and imaginary parts separately and rebuilds\nthe value from the\ntwo results:\n\n```mlir\n%1 \u003d complex.re %0 : complex\u003cf32\u003e\n%2 \u003d gpu.all_reduce add %1 uniform {\n} {acc.par_dims \u003d #acc\u003cpar_dims[thread_x]\u003e} : (f32) -\u003e f32\n%3 \u003d complex.im %0 : complex\u003cf32\u003e\n%4 \u003d gpu.all_reduce add %3 uniform {\n} {acc.par_dims \u003d #acc\u003cpar_dims[thread_x]\u003e} : (f32) -\u003e f32\n%5 \u003d complex.create %2, %4 : complex\u003cf32\u003e\n```\n\nAddition is the only operator for which this rewrite is valid, since\neach\ncomponent of a sum depends only on that component of the inputs.\nMultiplication mixes the two components, and min and max have no\nordering on\ncomplex at all. The split is therefore allowed for floating-point\naddition\nalone; every other operator on a complex accumulator reports not\nimplemented\nrather than being split in a way that would silently give a wrong\nanswer.\n\nReporting not-implemented also marks the conversion as failed, so the\npass\nleaves the `acc.reduction_accumulate` in place and fails rather than\nerasing\nthe accumulate and emitting incomplete IR.\n\nGitOrigin-RevId: 922d6a22f9971a5fd6c3a38defbcc0c9be392212\n" }, { "commit": "2b1cadec04f9c2fb2b6a08d39cdef971b8c57d26", "tree": "04105115252fb73b494748fcb2369e8dafe446f6", "parents": [ "f5a4fdf9496420d51fc7a5bf938ce40e34be8dfd" ], "author": { "name": "Ville-Markus Yli-Suutala", "email": "ville-markus.yli-suutala@helsinki.fi", "time": "Wed Oct 21 22:20:38 2026 +0300" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 12:28:26 2026 -0700" }, "message": "[openmp][mlir] Expand use of atomicrmw for atomic update (#215654)\n\nUse atomicrmw for more OpenMP atomic updates and captures, avoiding cmpxchg loops where possible.\n\nThis covers fadd, fsub, fmax, fmin, fmaximum, fminimum and xchg for single and double precision floating-point values, plus signed and unsigned integer min/max.\n\nGitOrigin-RevId: 4936d85b08053eead5eb7355691f141c2c473285\n" }, { "commit": "f5a4fdf9496420d51fc7a5bf938ce40e34be8dfd", "tree": "bf00d8e1918d8ca1452dfcd4ead1539373f96afa", "parents": [ "3d73271f111b84f1a6f2102f4b9d0c06870dbe16" ], "author": { "name": "Ivan Kosarev", "email": "ivan.kosarev@amd.com", "time": "Wed Oct 21 17:22:01 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 09:28:05 2026 -0700" }, "message": "[mlir][LLVM] Add LLVMStructType::getElementOffset() (#234171)\n\nSince bb6f7fcb46cd LLVMStructType::getTypeSizeInBits() uses allocation\nsizes, but there are a few places where we still compute field offsets\nbased on store sizes.\n\nThis change factors out the computations into a single method, a\ncounterpart of LLVM\u0027s StructLayout::getElementOffset(), so that all now\nagree in how they do that.\n\nAlso simplify the surrounding code a bit while there.\n\nGitOrigin-RevId: bf40e0c8c48c82f0754904a399912e96d09df00a\n" }, { "commit": "3d73271f111b84f1a6f2102f4b9d0c06870dbe16", "tree": "d993304fe3e423f0ad381b46b5ce2c33c55177c7", "parents": [ "36310abd8cf17e0d31a030be8a19422233aceeb5" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Oct 21 17:41:30 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 08:48:02 2026 -0700" }, "message": "[mlir] Reduce contention in parallel pass execution and timing (#232948)\n\nReplace per-operation executor scans with stable per-task worker\nindices. Allow default timing callbacks to run concurrently using\nthread-local stacks and synchronized parent-scope publication. Existing\ninstrumentations and custom timing managers retain serialized callbacks\nunless they opt in.\n\nBenchmark: 200,000 trivial functions with nested CSE, Release with\nassertions disabled. Medians of seven alternating samples against main,\nwhich includes #232520. With timing enabled:\n\n| Metric | Before | After |\n|---|---:|---:|\n| Pipeline wall | 1.0945 s | 0.1699 s |\n| mlir-opt wall | 1.7564 s | 0.8329 s |\n| mlir-opt system CPU | 15.4775 s | 2.0195 s |\n\nThis is a 6.44x pipeline speedup, 2.11x end-to-end speedup.\n\nAssisted-by: Codex\nGitOrigin-RevId: b93b033ab8a5fd92f09c4e6f793e16608ca25e6c\n" }, { "commit": "36310abd8cf17e0d31a030be8a19422233aceeb5", "tree": "9a9c8a91c94bbcbf925ea7cfec56ebbc4a081c34", "parents": [ "e08e082d7e225580ae9b665e6509c450e129ee7d" ], "author": { "name": "DeanSturtevant1", "email": "dsturtevant@google.com", "time": "Wed Oct 21 11:27:01 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 08:35:30 2026 -0700" }, "message": "[mlir][tosa] Fix GCC 7 build failure in TosaProfileCompliance (#234239)\n\nFixes a GCC 7 build failure introduced by 45b9b97b83db (#233949).\n\nDrop noexcept from the move constructors and move assignment operators\nof VersionedTypeInfo and OpComplianceInfo to match their implicit\nexception specifications.\n\nAssisted-by: Gemini\nGitOrigin-RevId: ca9316a5f0d82612f9cc86471f709c0f9e6c1967\n" }, { "commit": "e08e082d7e225580ae9b665e6509c450e129ee7d", "tree": "b75271045ca8b8aef1e1f144d404ddc95de96884", "parents": [ "187aec22e9e9d1020343af3b9290bdbcab930744" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Oct 21 17:14:49 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 08:26:30 2026 -0700" }, "message": "[mlir] Reduce template work in operation registration (NFC) (#233051)\n\nSave use 3.18% less user CPU when building LLVM/NVVM/ROCDL, and 0.96%\ntotal user CPU when building mlir-opt. Linked mlir-opt code is 0.60%\nsmaller.\n\nThe main thing is to share no-op helper specializations among traits\nthat do not define fold, verification, region-verification, or interface\nhooks. We also preserve pack order and short-circuiting while removing\nthe extra interface-pack forwarding instantiation.\n\nAssisted-by: Codex\nGitOrigin-RevId: c7cae95b018fd5038dfd057ea96692906ee70717\n" }, { "commit": "187aec22e9e9d1020343af3b9290bdbcab930744", "tree": "c1017655bbb142bd3d2fe359104513cfdcbd8b07", "parents": [ "5960957b467781f4866b0e4505b566e9a6f1b14f" ], "author": { "name": "Erich Keane", "email": "ekeane@nvidia.com", "time": "Wed Oct 21 07:34:47 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 07:44:48 2026 -0700" }, "message": "[MLIR][LLVMIR] Add \u0027distinct\u0027 ID to the loop-annotate attribute (#233890)\n\nThe \u0027distinctness\u0027 of a loop annotation is important and meaningful, and\nis used to identify br/br.cond operations that belong to the same\n\u0027loop\u0027. The Clang FE tracks this with its classic codegen.\n\nHowever, mlir is merging identical attributes (which is otherwise a\nnecessity, since we have no other way of identifying \u0027same\u0027 attributes),\nwhich is causing the final LLVM-IR to be incorrect.\n\nThis patch adds a distinct attribute as an \u0027id\u0027 so that an\nimplementation can identify br/br.cond objects that use the same loop\nmetadata, and thus will get the \u0027proper\u0027 distinct attributes.\n\nGitOrigin-RevId: 241a79eb3d959974a93d46820151d30dc34a0ad6\n" }, { "commit": "5960957b467781f4866b0e4505b566e9a6f1b14f", "tree": "7cd96d9efe7bd8abbb3519c529720845b1e0bf2d", "parents": [ "34c27cce4228271875f50956cb5c50cae9d4404d" ], "author": { "name": "DeanSturtevant1", "email": "dsturtevant@google.com", "time": "Wed Oct 21 09:32:32 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 06:40:09 2026 -0700" }, "message": "[mlir][tosa][NFC] Speed up compilation of TosaProfileCompliance (#233949)\n\nBuilding the ~5,000-line generated compliance initializer map in\nTosaProfileCompliance::TosaProfileCompliance() previously caused severe\ncompile-time blowups (400-900+ seconds on AArch64 and \u003e200 seconds under\nsanitizers).\n\nAddress this by rearranging the the data into new types and storage\nlocations (avoiding massive inlining and register allocation).\n\nAssisted-by: Gemini\nGitOrigin-RevId: 45b9b97b83dbf955cd5dce3b57429705f5aec85e\n" }, { "commit": "34c27cce4228271875f50956cb5c50cae9d4404d", "tree": "e1c78f8855e4b5573dfbb5803e7b9be9ea19ecce", "parents": [ "6407a45aa3a9be5322f25ca9d78430f317b53eca" ], "author": { "name": "Vinicius Silva", "email": "viniciusilva@ieee.org", "time": "Wed Oct 21 06:56:36 2026 -0300" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 03:02:32 2026 -0700" }, "message": "[mlir][SymbolTable] Handle unknown symbol users in SymbolUserMap (#227918)\n\nThis PR fixes #226052 treating unknown users record the symbol table\nhaving this specific users instead use the assertion.\n\nPlease see my comment here explaining where the bug was introduced!\n[here](https://github.com/llvm/llvm-project/issues/226052#issuecomment-5922633002).\n\nGitOrigin-RevId: 3027d412c6e38bdd3bf7b07cc1c1ba68920d6073\n" }, { "commit": "6407a45aa3a9be5322f25ca9d78430f317b53eca", "tree": "ebacba57bee5bd20441dbaeb6efcd24da45885b6", "parents": [ "43064b001e124dc540fc7b57bc3401522308d02c" ], "author": { "name": "Akun", "email": "cubehan3@gmail.com", "time": "Wed Oct 21 17:40:41 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 02:44:36 2026 -0700" }, "message": "[mlir][tosa] Lower concat to tensor.concat (#231726)\n\nLower `tosa.concat` directly to `tensor.concat` instead of expanding it\ninto `tensor.empty` and `tensor.insert_slice` operations.\n\nUpdate the TosaToTensor conversion tests to check the resulting concat\noperations.\n\nGitOrigin-RevId: e8f3b2d8d90ca0ed1594615188cf34a503aa53b3\n" }, { "commit": "43064b001e124dc540fc7b57bc3401522308d02c", "tree": "b105887bec0ab704b4f0b7016f9062c43bb87225", "parents": [ "63fc9aa1382b9bb4d843cf26f44b145bcb0fba27" ], "author": { "name": "Alexander Shaposhnikov", "email": "ashaposhnikov@google.com", "time": "Wed Oct 21 02:24:28 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 02:30:08 2026 -0700" }, "message": "[mlir][SPIR-V] Add Volatile function parameter round-trip tests (#232195)\n\nThe deserializer accepts Volatile function parameter decorations since\n #230611 made it keep every unit decoration. Add round-trip tests for\n function definitions and imported declarations, including Volatile\n combined with Alignment and FuncParamAttr decorations, so the Volatile\n path is covered explicitly.\n\nGitOrigin-RevId: ea82af272aa8ac9f3a223be1e5ef2f418e99f3ec\n" }, { "commit": "63fc9aa1382b9bb4d843cf26f44b145bcb0fba27", "tree": "11c9b5bd6fb29117fee13e9bb1291fe793c02139", "parents": [ "1ba2ae0251f7d1896c344539da27f1046581a07d" ], "author": { "name": "Henrich Lauko", "email": "xlauko@mail.muni.cz", "time": "Wed Oct 21 11:05:59 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Wed Oct 21 02:13:28 2026 -0700" }, "message": "[mlir][LLVM] Verify LLVMStructType element types in get() (#234091)\n\n`using Base::verifyInvariants` pulled in StorageUserBase\u0027s variadic\nno-op\nverifier. `StorageUserBase::get` passes a `unique_function` emitter,\nwhich\nbinds to that template exactly, so `getLiteral` skipped the element type\ncheck even in assertions builds.\n\nDrop the `using` and add a storage-key overload. Sub-element replacement\nneeds it because it rebuilds literal structs with `Base::get(ctx, key)`.\n\nAssisted-by: Claude Code (Claude Opus 5.5)\nGitOrigin-RevId: acb162d974706998af2e3045f618a8d66abfdf09\n" }, { "commit": "1ba2ae0251f7d1896c344539da27f1046581a07d", "tree": "a967864adf43ba7dfdca74a361d0d464488d1454", "parents": [ "24979c324f9c887bd5e4982b6cc967287decc3e3" ], "author": { "name": "Markus Böck", "email": "markus.boeck02@gmail.com", "time": "Wed Oct 21 08:54:09 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 23:57:57 2026 -0700" }, "message": "[mlir][tblgen] Define enum `FieldParser` specializations out-of-line (#233730)\n\nThe `FieldParser` specializations generated for every enum were defined\ninline in the enum declarations header. Since their bodies do not depend\non the `ParserT` template parameter, they are type-checked eagerly in\nevery translation unit including the header, which instantiates\n`FailureOr\u003cE\u003e`, `FailureOr\u003cstd::optional\u003cE\u003e\u003e` and their `std::optional`\nbases and type traits for every enum. Only a small fraction of these\nspecializations is ever used, and only from the generated attribute and\nop parsers of the dialect itself.\n\nThis patch changes `parse` to a non-template taking an `AsmParser \u0026`,\ndeclares it in the header and emits its definition into the enum\ndefinitions file instead.\n\nCompiling all of MLIR (clang 18 with 64 cores) takes 4.5% less CPU time,\nwith the median translation unit compiling 2.8% faster and some up to\n15% faster. The summed peak memory usage of all translation units drops\nby 4.5% and the largest peak memory usage of a single translation unit\n(`mlir/lib/CAPI/Conversion/Passes.cpp`) drops by 13% (1710 MB -\u003e 1492\nMB). A translation unit only including `NVVMDialect.h` compiles 12%\nfaster with 14% lower peak memory usage.\n\n---------\n\nCo-authored-by: Claude Opus 5.5 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 71b880e82a911919e7b7a138db741caa6bcf8b92\n" }, { "commit": "24979c324f9c887bd5e4982b6cc967287decc3e3", "tree": "ce090e959edf575a5b9fc924b7884a8115a387c5", "parents": [ "fdbe695ca91995789b3e42b3867ad669ad283044" ], "author": { "name": "Aiden Grossman", "email": "aidengrossman@google.com", "time": "Tue Oct 20 22:40:51 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 22:47:15 2026 -0700" }, "message": "[MLIR][LLVM] Remove support for synthetic profile entry counts (#233357)\n\nThese are going to be fully removed from LLVM soon (they have been\npartially removed for a while). Remove them from MLIR to unblock further\ncleanup in LLVM.\n\nAssisted-by: LLM\nGitOrigin-RevId: 12b3aded3fc0dbc9463b80f2ae48980776306dcc\n" }, { "commit": "fdbe695ca91995789b3e42b3867ad669ad283044", "tree": "2d1402e5388b280bd5d9764121dcc1537277c02f", "parents": [ "7d980cc103750e98204276a71958ad9260da7eb6" ], "author": { "name": "Arseniy Obolenskiy", "email": "arseniy.obolenskiy@amd.com", "time": "Wed Oct 21 05:15:14 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 20:21:49 2026 -0700" }, "message": "[mlir][SPIR-V] Serialize decorations on FunctionCall results (#233917)\n\nDecorations such as RelaxedPrecision on an OpFunctionCall result were\ndropped in both directions (serialize/deserialize)\n\n---------\n\nCo-authored-by: Igor Wodiany \u003cdev@wodiany.com\u003e\nGitOrigin-RevId: 04b524ff69b928535c7ef7d995958e2f5e825b13\n" }, { "commit": "7d980cc103750e98204276a71958ad9260da7eb6", "tree": "8bad94543a8f664e69f7f42b5636c6abf32be469", "parents": [ "fed9cc091f05712d82a36adb6e07e7c5db16f051" ], "author": { "name": "Prashanth", "email": "ping@starone01.me", "time": "Wed Oct 21 07:10:07 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 18:48:16 2026 -0700" }, "message": "[mlir][scf] support front peeling for unsigned loop (#233238)\n\nadd front peeling support for unsigned loop and add tests.\n\nwe branch out if we have a unsigned loop, if constants we check and bail\nout if the loop has at most one iteration else we compute the split\nbound as `arith.minui(arith.addi(lb, step), ub)`, and they are compared\nunsigned.\n\nfrom #231100\n\nclaude helped me with the tests\n\nGitOrigin-RevId: 02ab1491b1970cdb96de3aec49a1348e9ceac676\n" }, { "commit": "fed9cc091f05712d82a36adb6e07e7c5db16f051", "tree": "354c5296f807c0104583e37bf84e7e2b6931e61d", "parents": [ "83a508aa3c456102fcb340806340791702105372" ], "author": { "name": "Sajid Zubair", "email": "154609805+Sajid-Zubair@users.noreply.github.com", "time": "Wed Oct 21 06:00:49 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 17:38:23 2026 -0700" }, "message": "[mlir] Respect unknown memory effects in LICM and dead alloc erasure (#233939)\n\naffine-loop-invariant-code-motion and memref::eraseDeadAllocAndStores\nused hasEffect\u003c...\u003e, which returns false for ops that do not implement\nMemoryEffectOpInterface (e.g. func.call). As a result, affine LICM\nhoisted a load above a call that writes the same memref, and\neraseDeadAllocAndStores erased a call that reads the buffer together\nwith the alloc and its stores.\n\nWe can use mightHaveEffect\u003c...\u003e instead, which returns true for ops with\nunknown effects.\n\nFixes #233733\n\nAssisted-by: Opus 5.5\nGitOrigin-RevId: 6c8bfbc5eb89c378f28d63eb7bc748c1a0d43906\n" }, { "commit": "83a508aa3c456102fcb340806340791702105372", "tree": "d3b409fa8128ff6dbd2ca11684fb8e88d9da38d3", "parents": [ "10c9d218e27a6f93f8e593b099ad5f25d9ba5c0b" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Oct 21 02:23:13 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 17:31:40 2026 -0700" }, "message": "[mlir][OpenACC] Decouple frontend support from GPU operations (#233103)\n\nAllow clients such as CIR to use OpenACC frontend IR without linking the\nfull GPU operation implementation and its Math dependencies.\n\nProvide MLIRGPUBase for GPU representations and expose OpenACC\u0027s GPU,\nLLVM and MemRef external interface models through separate extension\nlibraries. Keep GPU type and attribute ownership and parsing in the GPU\ndialect, and retain all OpenACC operations in MLIROpenACCDialect.\n\nRegister the extensions through MLIR\u0027s default extension registration,\nOpenACC passes and Flang. Preserve the C API\u0027s automatic registration\nand CIR\u0027s pointer models, and explicitly load Arith for CIR\u0027s OpenACC\nlowering.\n\nSave \u003e4MB in clang+CIR build.\n\nAssisted-by: Codex\nGitOrigin-RevId: 092c87674f0f3a2680a4f71e92b41a195dec2c9e\n" }, { "commit": "10c9d218e27a6f93f8e593b099ad5f25d9ba5c0b", "tree": "5e822d18e73a20544330092843c59930a7a60fab", "parents": [ "e5e2fe491432f1812c3b82f6a8780f2d7dd782ea" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Wed Oct 21 01:44:26 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 16:47:12 2026 -0700" }, "message": "[mlir][CIR] Separate OpenMP LLVM conversion helpers from the pass (NFC) (#232766)\n\nMove the standalone OpenMP-to-LLVM pass to its own translation unit.\nKeep MLIROpenMPToLLVM as the complete public conversion target, and\nprovide patterns, legality, and dialect-interface registration through\nMLIROpenMPToLLVMConversion.\n\nUse the helper target in CIR lowering and Flang code generation, and\nremove the unused conversion dependency from FIRDialect. This breaks the\nCIR link path through MemRef conversion and utilities to Affine without\nsplitting MemRef utilities or moving IR-dependent constraint analysis.\n\nAssisted-by: Codex\nGitOrigin-RevId: deae56302506911663b659dd1d8e211bd8d709b3\n" }, { "commit": "e5e2fe491432f1812c3b82f6a8780f2d7dd782ea", "tree": "09f43bd94ab28fa3203125ef3570edd53505f9ee", "parents": [ "663b8bc5749a37b107784e4fa24683233c7bb0a6" ], "author": { "name": "frokaikan", "email": "541240857@qq.com", "time": "Wed Oct 21 07:39:24 2026 +0800" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 16:43:21 2026 -0700" }, "message": "[mlir] Place MathToFuncs helpers in the nearest symbol table (#232582)\n\nThe MathToFuncs pass previously inserted every outlined ipowi, fpowi,\nand ctlz helper into the top-level builtin.module. Calls rewritten\ninside a gpu.module could not resolve those helpers because the\ndeclarations were outside the nearest symbol table.\n\nCreate each helper in the symbol table nearest to its source operation.\nInclude that symbol table in the implementation cache key, and use the\nsame key when looking up helpers during conversion. This preserves reuse\nfor repeated calls in one module without sharing a definition across\ndistinct gpu.modules or the host module.\n\nAI assistance: Portions of this patch and its regression test were\ndeveloped with assistance from OpenAI Codex. I have reviewed and\nunderstand the submitted changes, and I take responsibility for them.\n\nGitOrigin-RevId: d2887211a59222fbae2d00b73335dd6850574402\n" }, { "commit": "663b8bc5749a37b107784e4fa24683233c7bb0a6", "tree": "0daf913759b5facc74a4ee0247612ee7f52a42d4", "parents": [ "38c079b5eedad8d0096bad6195a89e84b22d4097" ], "author": { "name": "Jan Patrick Lehr", "email": "JanPatrick.Lehr@amd.com", "time": "Wed Oct 21 01:08:15 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 16:12:45 2026 -0700" }, "message": "[MLIR] Fix SPIRV shared libs build after #232793 (#234024)\n\nThis needed another dependency.\n\nShould fix https://lab.llvm.org/buildbot/#/builders/234 and other\nbuildbots.\n\nGitOrigin-RevId: 9130be870da296c30e3c6ee3cdc5fa56c27294d1\n" }, { "commit": "38c079b5eedad8d0096bad6195a89e84b22d4097", "tree": "44b47b3e9a01b35b5f975c8dfa1de6ada2e962f5", "parents": [ "e32ee1bf01dbb97fed0a309af3590434386d30c8" ], "author": { "name": "Hideto Ueno", "email": "uenoku.tokotoko@gmail.com", "time": "Tue Oct 20 14:23:02 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 14:32:11 2026 -0700" }, "message": "[mlir][Canonicalizer] Preserve analyses when there is no change (#232159)\n\nCall `markAllAnalysesPreserved` when there is no change in `applyPatternsGreedily`.\n\nAssisted-by: gpt 6 luna\nGitOrigin-RevId: 31e612428a06220689de3230d9b3211579fb3c7e\n" }, { "commit": "e32ee1bf01dbb97fed0a309af3590434386d30c8", "tree": "e33df68f3f91e3ca0f7a7181e05d7d45975dd3b9", "parents": [ "8f10509a8f10a6d02c807fdf3998388d41cf59b2" ], "author": { "name": "Luke Hutton", "email": "luke.hutton@arm.com", "time": "Tue Oct 20 20:13:37 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 12:23:17 2026 -0700" }, "message": "[mlir][tosa] Fix assertion when folding mul with out of range shift (#233486)\n\nTOSA specification requires a shift value in the range [0, 63]. This\ncommit updates the folder so that it is conformant to the specification.\n\nAlso update variable name to conform to guidelines.\n\nFixes: #231812\nGitOrigin-RevId: 97bfa72b8803e94fdb10ee2f40065feb7bad8e22\n" }, { "commit": "8f10509a8f10a6d02c807fdf3998388d41cf59b2", "tree": "ee4a28f24a0ce5b922ea17a86b22d0d643aee6e6", "parents": [ "067637488053769d3a4891eab73ebfeddc5c7108" ], "author": { "name": "Luke Hutton", "email": "luke.hutton@arm.com", "time": "Tue Oct 20 20:12:54 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 12:22:40 2026 -0700" }, "message": "[mlir][tosa] Fix slice fold when result type does not match input (#233515)\n\nWhen folding, the input should only be returned if the output type\nmatches to prevent a crash.\n\nFixes https://github.com/llvm/llvm-project/issues/233055\n\nGitOrigin-RevId: e81f87b1e21374261ed5b4951e0744f5e0c21a27\n" }, { "commit": "067637488053769d3a4891eab73ebfeddc5c7108", "tree": "64286045b2fa691581e7b3ce89641082b7c7c595", "parents": [ "95e672d7f54906eccf9fa3b01cc736fad4309fb2" ], "author": { "name": "Andrzej Warzyński", "email": "andrzej.warzynski@arm.com", "time": "Tue Oct 20 16:02:24 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 08:06:59 2026 -0700" }, "message": "[mlir][ArmSVE][NFC] Remove redundant scalability checks in contract lowering (#233868)\n\nReplace\n```cpp\nif ( ... || !rhsType.getScalableDims()[0]) ...\n !rhsType.getScalableDims()[0])\n```\nwith\n```cpp\nif ( ... || !rhsType.getScalableDims()[0]) ... )\n```\n\nGitOrigin-RevId: ff9a4905f76222d618faf21745012752a2888ae0\n" }, { "commit": "95e672d7f54906eccf9fa3b01cc736fad4309fb2", "tree": "1f9106a0f66b9efbf83716909b1bd5be67436ee7", "parents": [ "40bca52f91d36e5763aa6dbfd445340c884cf6ba" ], "author": { "name": "Aditya Trivedi", "email": "120598696+adit4443ya@users.noreply.github.com", "time": "Tue Oct 20 14:35:32 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 02:13:46 2026 -0700" }, "message": " [mlir][flang][OpenMP] Privatize LINEAR list items with linear privatizers; support ALLOCATABLE (#228827)\n\nFlang miscompiled `LINEAR` on an `ALLOCATABLE` list item (#182401). The\nlinear\noperand was the descriptor reference, but `linear_var_types` held the\nelement\ntype, so translation created an undersized private copy and the program\ncrashed.\n\nThis patch makes linear list items use privatizer recipes, the same way\n`private` and `reduction` do.\n\n**MLIR**\n- The `linear` clause on `omp.wsloop` and `omp.simd` now carries a\nprivatizer\n symbol and an entry block argument for each list item:\n ```mlir\n omp.private {type \u003d linear} @x.linear : i32\nomp.simd linear(@x.linear %x -\u003e %arg0 : !llvm.ptr \u003d %step : i32)\nlinear_var_types([i32]) {\n ```\n- New `linear` `DataSharingType` for `omp.private`. Also an optional\n `data_address` region that yields the address of the underlying linear\n value when the privatized type wraps it (e.g. a Fortran descriptor).\n- Verifier checks:\n- a linear clause must use a `linear` privatizer whose type matches its\n list item;\n - `linear` privatizers can\u0027t be used in other clauses;\n - `data_address` is only allowed on `linear` privatizers, which can\u0027t\n have a copy region;\n - `omp.declare_simd` doesn\u0027t accept linear privatizers.\n\n**Translation**\n- Linear variables are allocated, initialized and deallocated through\nthe\n existing private-variable path.\n- The start value is read from the original variable, the private copy\nis\n set to `start + iv * step`, and the value from the last iteration is\ncopied back. All accesses go through the `data_address` region when the\n privatizer has one.\n- The old `.linear_result` temporary and the in-place rewrite of the\n original variable are removed.\n\n**Flang**\n- `processLinear` and the implicit linear IV of `simd` now create\n`linear`\n privatizers through `DataSharingProcessor`. For an allocatable, the\n recipe has a `data_address` region (`fir.load` + `fir.box_addr`).\n- For composite `do simd` and `distribute parallel do simd`, linear\n privatizers go on `omp.wsloop`.\n- Lowering linear without delayed privatization now emits a TODO.\n\nFixes #182401\n\nGitOrigin-RevId: ac5d3955cd1931f71109caa8c026319ca69ca252\n" }, { "commit": "40bca52f91d36e5763aa6dbfd445340c884cf6ba", "tree": "56bf226705fb7b5fcf57282988f6037ad5c5197a", "parents": [ "f0ca77b28693e4bedbc811394c321fb4d9f92cbd" ], "author": { "name": "Andrzej Warzyński", "email": "andrzej.warzynski@arm.com", "time": "Tue Oct 20 09:57:09 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 02:03:47 2026 -0700" }, "message": "[mlir][vector][nfc] Remove unused mask from tests (#233748)\n\nGitOrigin-RevId: d89ee72b931cc1593352b07f6214b3b559519324\n" }, { "commit": "f0ca77b28693e4bedbc811394c321fb4d9f92cbd", "tree": "fc2289696abb6cf80ee81125d1ea8278ac676ae2", "parents": [ "4d14764f9954ba834ad6088f1d982fffbec18828" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Oct 20 10:56:18 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 02:03:18 2026 -0700" }, "message": "[mlir][bytecode] Allow selecting dialect versions in mlir-opt (#233149)\n\nGitOrigin-RevId: 64bccb9d9ac016ec576971b1591fd8e82e7be801\n" }, { "commit": "4d14764f9954ba834ad6088f1d982fffbec18828", "tree": "bc3614a04a7244ca215c88af5b77cec8c1439ea2", "parents": [ "7715997f371e74a5bf8fc3b1b7d41106a0ecff07" ], "author": { "name": "Andrzej Warzyński", "email": "andrzej.warzynski@arm.com", "time": "Tue Oct 20 09:33:08 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 01:39:40 2026 -0700" }, "message": "[mlir][vector][NFC] Rename getShapeForUnroll to getIterationShapeToUnroll (#232648)\n\nThe old name was ambiguous about whether it returned the original shape\nor the target shape for unrolling.\n\nThe new name makes clear that it returns the shape of the iteration\nspace to be unrolled. This can differ from the result shape: for\nexample, vector.contract includes reduction dimensions in its iteration space\nthat are absent from its result shape.\n\nImplements: https://github.com/llvm/llvm-project/issues/233408\nGitOrigin-RevId: 68aa3b9000f92b3aaa38b2a0f0bf1cc85a4d0705\n" }, { "commit": "7715997f371e74a5bf8fc3b1b7d41106a0ecff07", "tree": "205e9c9fbc235cbbca0a79d91cdaf3fccd0a0e49", "parents": [ "01685624bddbd7e2396605733304691caf1e3513" ], "author": { "name": "Kazu Hirata", "email": "kazu@google.com", "time": "Tue Oct 20 01:11:18 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 01:17:50 2026 -0700" }, "message": "[mlir] Replace PointerUnion::dyn_cast with llvm::dyn_cast (NFC) (#233681)\n\nPointerUnion::dyn_cast has been soft-deprecated. This patch replaces it\nwith llvm::dyn_cast:\n\n- PadTilingInterface.cpp: Each OpFoldResult in paddedShape is a\n nonnull Attribute or Value, and dynamic dimensions must be valid\n Values.\n- TestOps.td: CallWithSegmentsOp::setCalleeFromCallable is an unused\n CallOpInterface implementation on a test op.\n\nThis patch completes the migration away from PointerUnion::dyn_cast\nunder mlir/.\n\nAssisted-by: Antigravity\nGitOrigin-RevId: ce62b185c8b19edc5cf2410ce3811b177a9177e3\n" }, { "commit": "01685624bddbd7e2396605733304691caf1e3513", "tree": "59468e2026b1db12c6bfde406582118fb235352e", "parents": [ "d4f9a452042dc29e47e831c2dcc98a7d602f0b63" ], "author": { "name": "Stanislav Bardyuk", "email": "sbardyuk@google.com", "time": "Tue Oct 20 09:20:52 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Oct 20 00:27:22 2026 -0700" }, "message": "[mlir][tosa] Fix tosa-to-linalg assertion on rescale with an output wider than 32 bits (#233508)\n\nThe rescale lowering does its math in i32 and then saturates to the\noutput type, so it only works for outputs up to 32 bits. That assumption\nwas only checked with an assert inside the linalg.generic body builder.\nThe op verifier accepts any integer output type, so a tosa.rescale with\nan i64 (or i48) result passes verification and then crashes the pass:\n\n```\nTosaToLinalg.cpp:1952: Assertion `outBitWidth \u003c\u003d 32 \u0026\u0026 \"Unexpected output zeropoint bitwidth\"\u0027 failed.\n```\n\nCheck the output element type up front, next to the other early checks\nin RescaleConverter, and decline to match when it is not an integer type\nof at most 32 bits. The pass then reports \"failed to legalize operation\n\u0027tosa.rescale\u0027\" like it already does for the other unsupported\nconfigurations. Inputs wider than 32 bits keep lowering as before.\n\nFixes #224020\n\nGitOrigin-RevId: 07a97fd6b9130d77aa0faee58f1d96ac721567f8\n" }, { "commit": "d4f9a452042dc29e47e831c2dcc98a7d602f0b63", "tree": "031f550dc0bf25026bc814716b3641cfb4b6991d", "parents": [ "ca728dfe31c3e53c224b3595877df6f9516356ee" ], "author": { "name": "Arseniy Obolenskiy", "email": "arseniy.obolenskiy@amd.com", "time": "Tue Oct 20 07:22:10 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 22:27:07 2026 -0700" }, "message": "[mlir][SPIR-V] Deserialize all unit decorations on function parameters (#230611)\n\nPreviously only Aliased, Restrict and RelaxedPrecision were kept, so\ndecorations like Volatile and Coherent were silently dropped\n\nGitOrigin-RevId: f3e9f3095e51424e68bef1a1cb9027f0572ac5a4\n" }, { "commit": "ca728dfe31c3e53c224b3595877df6f9516356ee", "tree": "2b19dac17bf74e478164685a2514546a08c264b0", "parents": [ "c1d60240fb0c3cbcd8bfd35c58796a664a0d8f4f" ], "author": { "name": "Matthias Springer", "email": "me@m-sp.org", "time": "Tue Oct 20 11:29:13 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 19:34:13 2026 -0700" }, "message": "[mlir][arith] Fix integer-to-float comparison canonicalization (#233631)\n\nReject conversions that can produce NaN or saturate, and formats that\ncannot represent zero or signed inputs. Preserve safe rewrites when the\ninteger range fits the floating-point exponent range.\n\nHandle unconditional `cmpf` predicates without reaching an unreachable\ncase. Add regression coverage for exotic formats and rounding limits.\n\nAssisted-by: Codex\nGitOrigin-RevId: b054b9c978b38d8b05fe6da1fa3f1d4013d64754\n" }, { "commit": "c1d60240fb0c3cbcd8bfd35c58796a664a0d8f4f", "tree": "5a01c2cf4c7606a9e3e80f962241c5c52b9be451", "parents": [ "2848251f77abe897ed80e358986257513b5509b2" ], "author": { "name": "Benjamin Wu", "email": "benjaminwu@tenstorrent.com", "time": "Mon Oct 19 17:36:00 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 17:40:23 2026 -0700" }, "message": "[mlir][NFC] Simplify rewrite/conversion using-decls to use Base alias (#233586)\n\nFollow up on #230717.\n\nGitOrigin-RevId: bcd85bce2ea2d665b21d3426210ff829479ecafa\n" }, { "commit": "2848251f77abe897ed80e358986257513b5509b2", "tree": "c17a27d1b13bb29fcc45f53f36c21622b0bc4057", "parents": [ "bc130e224714f5c96694c1dc30ec0e0873511e0f" ], "author": { "name": "Stanislav Bardyuk", "email": "sbardyuk@google.com", "time": "Tue Oct 20 02:12:35 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 17:18:29 2026 -0700" }, "message": "[mlir][memref] Reject memref.reshape with static shape and unranked result (#223496)\n\nThe memref.reshape docs list two forms: a shape operand of static length\nwith a ranked result, or a shape operand of dynamic length with an\nunranked result. The verifier only checks this pairing when the result\nis\nranked, so the third combination (static length, unranked result) is\naccepted:\n\n```mlir\n%0 \u003d memref.reshape %src(%shape) : (memref\u003c*xf32\u003e, memref\u003c2xindex\u003e) -\u003e memref\u003c*xf32\u003e\n```\n\nBoth consumers of the op pick the ranked code path from the shape\noperand alone and then cast the result type to MemRefType, which asserts\non the unranked result: MemRefReshapeOpLowering in MemRefToLLVM (the\nreporter\u0027s -convert-openmp-to-llvm crash, also reachable through\n-finalize-memref-to-llvm) and MemRefReshapeOpConverter in\n-memref-expand.\n\nAdd the missing check to the verifier so the op is rejected with a\nregular diagnostic, mirroring the existing error for the opposite\nmismatch. Nothing in tree produces the rejected form for memref (checked\nall producers and tests). The form could instead be supported by making\nboth consumers dispatch on the result type, but the docs describe the\npairing as the contract, so this enforces it.\n\ntensor.reshape has the same gap in its verifier; it is left alone here\nsince no tensor consumer crashes on it and two Shape canonicalization\ntests use that form.\n\nFixes #205057\n\nGitOrigin-RevId: 02b5549555c5865534a7acae54f000cd5397b74e\n" }, { "commit": "bc130e224714f5c96694c1dc30ec0e0873511e0f", "tree": "407b7568cf84a47bf041ba28f4e76272a80c2576", "parents": [ "bd88dcb3b0cfd2e8d91881d9a0db2d9fe0bed5df" ], "author": { "name": "Slava Zakharin", "email": "szakharin@nvidia.com", "time": "Mon Oct 19 17:04:30 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 17:12:53 2026 -0700" }, "message": "[mlir] Added missing cmake dependency. (#233628)\n\nGitOrigin-RevId: 2fbd0c7d15b39f66322eea702ea55d32b658e646\n" }, { "commit": "bd88dcb3b0cfd2e8d91881d9a0db2d9fe0bed5df", "tree": "24b9a43fe4792de927b642d1b7f30bdba3c1744e", "parents": [ "6fbcb9933e55a1c74784a5b9b5bb61060dacf093" ], "author": { "name": "Matthias Springer", "email": "me@m-sp.org", "time": "Tue Oct 20 09:03:52 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 17:12:30 2026 -0700" }, "message": "[mlir][arith] Drop invalid overflow flags when narrowing (#233324)\n\nPreserve `nsw` only when narrowing preserves signed operand and result\nvalues, and `nuw` only when it preserves unsigned values. Flags proven\nat the original width may otherwise introduce poison after narrowing.\n\nAdd concrete regression cases for `addi`, `subi`, `muli`, and `shli`,\ncovering both overflow flags and retention of valid flags.\n\nAssisted-by: Codex\nGitOrigin-RevId: d22d801a0604ee3db91a41b6c56c7e2cc0d102a1\n" }, { "commit": "6fbcb9933e55a1c74784a5b9b5bb61060dacf093", "tree": "703e620307b782da572a0df5ea75c4e7fa5d5c15", "parents": [ "b175916f7326694a934d765741704ee45ecd3391" ], "author": { "name": "Alexander Richardson", "email": "alexrichardson@google.com", "time": "Mon Oct 19 16:46:14 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 16:53:00 2026 -0700" }, "message": "[Support] Extract SourceMgrDiagnosticVerifier from MLIR\u0027s verifier handler. NFC (#227565)\n\nMove the SourceMgr-based `expected-(error|warning|remark|note)` diagnostic\nparsing and matching logic out of `mlir/lib/IR/Diagnostics.cpp` into a\nreusable `llvm::SourceMgrDiagnosticVerifier` class in `LLVMSupport` so that\nnon-MLIR tools (such as `llvm-mc -verify`) can share the same\nimplementation.\n\n`mlir::SourceMgrDiagnosticVerifierHandler` is now a thin MLIR-specific\nadapter around `llvm::SourceMgrDiagnosticVerifier`.\n\nAssisted-by: AI tooling\nPull-Request: https://github.com/llvm/llvm-project/pull/227565\nGitOrigin-RevId: a1fa72ed1dbfa02f07d0b0e98b8b4a22906578d3\n" }, { "commit": "b175916f7326694a934d765741704ee45ecd3391", "tree": "8b173ba3d48323bb574d3dcffab9d922a1ca7756", "parents": [ "f6abbc134f35dcb28cfcd200685b9e98523da50c" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Tue Oct 20 01:00:14 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 16:07:52 2026 -0700" }, "message": "[mlir] Split analysis implementations into subsystem libraries (#232793)\n\nIntroduce MLIRAnalysisBase, MLIRAnalysisDataFlow and\nMLIRAnalysisPresburger with independent source ownership and focused\ninterface dependencies. Keep the generic Presburger mathematics library\nindependent of MLIR IR.\n\nReuse the component objects in the full MLIRAnalysis compatibility\narchive, and include only the components in aggregate libMLIR. Migrate\nMLIR, CIR and Flang library consumers to their required analysis APIs,\nincluding dependencies previously supplied through other libraries.\n\nThis reduces unnecessary transitive dependencies: we don\u0027t need to build\nPresburger and similar things for CIR for example.\n\nAssisted-by: Codex\nGitOrigin-RevId: d7c54eab76c3cae04571fa1d6edb4b48b70f738a\n" }, { "commit": "f6abbc134f35dcb28cfcd200685b9e98523da50c", "tree": "922184e917532358a1dbd1f6526484af1d293d78", "parents": [ "995480a9eaeff1fd94987739b542d9a71c28bd31" ], "author": { "name": "Chris Frisz", "email": "cfrisz@nvidia.com", "time": "Mon Oct 19 18:15:04 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 15:23:30 2026 -0700" }, "message": "[mlir][math] Avoid integer division by zero when lowering math.ipowi (#230271)\n\n`math.ipowi` with a zero base and a negative exponent is lowered to an\ninteger division by zero in two places: `MathToFuncs` emits a literal `1\n/ 0` for that case, and `PowIStrengthReduction` rewrites a constant\nnegative exponent into `1 / (b * b * ...)` for a base that may be zero.\n`arith.divsi` by zero is undefined behavior, so the result depends on\nthe target and the optimizer: on AArch64, `0 ** -1` lowered through\n`MathToFuncs` returns 0 under `mlir-runner --O0` and 1 under `--O3`.\n\nThis patch:\n\n- deletes the `b \u003d\u003d 0` branch from the `MathToFuncs` helper, so a zero\nbase with a negative exponent returns 0 through the same final return as\nevery `|b| \u003e 1` base;\n- stops `PowIStrengthReduction` from reducing `ipowi` on `IntegerType`\nwith a negative exponent, leaving it to `MathToFuncs`;\n- makes `PowIStrengthReduction` bail out for an `INT64_MIN` exponent,\nsince negating it is signed overflow (this changes `fpowi`,\n`complex.powi` and index `ipowi` for that one exponent).\n\nWhy 0: `0 ** -n` has no representable value, so any result is a choice.\n0 is deterministic, in range for every integer type, needs no new\nsemantics, and matches the `b \u003d\u003d 1` and `b \u003d\u003d -1` cases, which already\nreturn a value. Whether the dialect should instead declare this UB is\nstill open in the Discourse thread \"Undefined behavior in the math\ndialect\"\n(https://discourse.llvm.org/t/undefined-behavior-in-the-math-dialect/90522).\nThis patch only removes lowerings whose answer depends on the optimizer.\n\nRelated: PR 188783 takes a different approach. It makes\n`PowIStrengthReduction` skip every negative-exponent `ipowi`, but leaves\nthe `1 / 0` in `MathToFuncs` and the `INT64_MIN` negation as they are.\nThis patch defines the zero-base result in `MathToFuncs` itself and also\nfixes the negation.\n\nCaveat: `MathToFuncs` does not lower `index`, so index `ipowi` keeps the\nold reduction, and an index `0 ** -n` still divides by zero.\n\nAssisted-by: Claude (Anthropic)\n\nCo-authored-by: Slava Zakharin \u003cszakharin@nvidia.com\u003e\nGitOrigin-RevId: a43db5458aec686da77142ea42b77df6ba4db283\n" }, { "commit": "995480a9eaeff1fd94987739b542d9a71c28bd31", "tree": "2454cffccf23c68ec1bf1644b8e3a9ebc63d7a29", "parents": [ "5c721175373904966e34598267129cf5102c88c1" ], "author": { "name": "Md Abdullah Shahneous Bari", "email": "md.abdullah.shahneous.bari@intel.com", "time": "Mon Oct 19 16:34:40 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 14:42:07 2026 -0700" }, "message": "[MLIR][XeVM] Set the required sub-group size on every kernel (#232844)\n\nWhen serializing a gpu.module to SPIR-V, the XeVM target sets\nintel_reqd_sub_group_size \u003d 16 on the first kernel only: the walk stops\nafter the first kernel it finds. The other kernels of the module get no\nrequired size, so the GPU compiler may pick a different sub-group size\nfor them, for example 32. Code that the XeGPU and XeVM lowering emits\nassumes 16 lanes, so those kernels can compute wrong results.\n\nSet the required sub-group size on every kernel of the module.\n\n---------\n\nCo-authored-by: Claude Opus 5.5 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: d8ade6d5223ae94dfaf11f6b524ec2937d519cec\n" }, { "commit": "5c721175373904966e34598267129cf5102c88c1", "tree": "eaf85e6d1f4d61792998f442e7b9167af766983e", "parents": [ "0e24789f37a8c9d79de14b6405796d1ecfc4b8ab" ], "author": { "name": "Alexander Shaposhnikov", "email": "ashaposhnikov@google.com", "time": "Mon Oct 19 13:55:00 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 14:41:44 2026 -0700" }, "message": "[mlir][SPIR-V] Model OpenCL sincos memory effects (#232017)\n\nAddress comments on https://github.com/llvm/llvm-project/pull/231713.\nMark the cosval operand of spirv.CL.sincos with MemWrite so\nmemory-effect analysis can identify the destination of its cosine write.\n\nGitOrigin-RevId: 5da52b2c841c4b6a5edb7bc875434cb03ae6d999\n" }, { "commit": "0e24789f37a8c9d79de14b6405796d1ecfc4b8ab", "tree": "b4018335ba06dd7d450cb29dec6c7b372c5332a1", "parents": [ "3395c31f9fb0fcdb5ebaeec19904c6609867f1b2" ], "author": { "name": "Md Abdullah Shahneous Bari", "email": "md.abdullah.shahneous.bari@intel.com", "time": "Mon Oct 19 15:54:35 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 14:41:22 2026 -0700" }, "message": "[MLIR][XeVM] Split n-ary ops for a slice only when the source is too wide (#232007)\n\n`HandleVectorExtractPattern` case 4 hoists a contiguous-slice\n`llvm.shufflevector` through an n-ary element-wise op. It slices every\noperand and clones the op at the slice width. The pattern is meant to\nlegalize vectors wider than 16 elements.\n\nCase 4 did not check the source width, so it also split vectors that are\nalready legal. For example, one `llvm.fmul : vector\u003c8xf32\u003e` read one\nlane at a time became 8 scalar `llvm.fmul`s and 16 `llvm.shufflevector`s\n(two per lane, one per operand, where there was one read per lane\nbefore). Each narrow op was placed next to its reader, far from the\noriginal op.\n\nThis patch hoists through an n-ary op only when the source has more than\n16 elements. The other cases of the pattern do not change.\n\nEffect on the IR:\n- A legal-width element-wise op stays one vector op, where the producer\nput it.\n- No per-lane copies of the op, and no per-lane operand shuffles,\nincluding shuffles of constant operands. The pattern runs with folding\ndisabled, so those shuffles stayed in the pass output.\n\nCo-authored-by: Claude Opus 5.5 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 10ea202bc29a0ebbd62066f8c5ffa90528ce0e17\n" }, { "commit": "3395c31f9fb0fcdb5ebaeec19904c6609867f1b2", "tree": "e87b3a459e288cd8e355746a54da38863b3ca96a", "parents": [ "318c673dde0a1d40c3060a0f1dddf213325d410b" ], "author": { "name": "Stanislav Bardyuk", "email": "sbardyuk@google.com", "time": "Mon Oct 19 22:54:17 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 13:56:47 2026 -0700" }, "message": "[mlir][spirv] Fix arith-to-spirv crash on f8 vector/tensor constants without Int8 (#223517)\n\n`convert-arith-to-spirv` crashes on this input with the default target\nenv:\n\n```mlir\n%cst \u003d arith.constant dense\u003c[1.0, -0.5]\u003e : tensor\u003c2xf8E4M3FN\u003e\n```\n\n```\nIntegerAttr::get: APInt bit width must match integer type width\n```\n\nWith `emulate-unsupported-float-types` (on by default) the type\nconverter maps 8-bit floats to i8. If the target does not have the\n`Int8` capability, `emulate-lt-32-bit-scalar-types` then widens that i8\nto i32. So the converted element type of a vector/tensor f8 constant is\ni32 on such targets. `ConstantCompositeOpPattern` only knows about the\nfirst step: it bitcasts the 8-bit float to an 8-bit APInt and asks for\nan IntegerAttr of the converted element type, and the width mismatch\ntrips the assertion. The scalar pattern has a `width \u003d\u003d 8` check so it\ndoes not crash, but that just means it would silently fall through to\nthe float path if it ever saw a wider integer.\n\nThis makes `getIntegerAttrFromFloatAttr` width aware. It builds the\n8-bit integer attribute first, and if the destination integer type is\nwider it goes through the existing `convertIntegerAttr`, so an f8\nconstant is widened exactly like the equivalent i8 constant on the same\ntarget (sign extended, `-0.5 : f8E4M3FN` is `0xB0`, which becomes `-80 :\ni32` just as `-80 : i8` does). The helper now takes an `IntegerType`,\nand the scalar pattern drops its `width \u003d\u003d 8` restriction so both call\nsites behave the same. Targets with `Int8` keep producing i8 constants\nas before.\n\nThe reporter\u0027s input now lowers to `spirv.Constant dense\u003c[56, -80]\u003e :\ntensor\u003c2xi32\u003e : !spirv.array\u003c2 x i32\u003e`, which matches what `dense\u003c[56,\n-80]\u003e : tensor\u003c2xi8\u003e` lowers to on that target, and matches how f8\nfunction arguments of the same type are already converted (to i32) by\nthe type converter.\n\nTwo notes on scope. The scalar pattern change is unreachable today (the\nscalar type converter never yields an integer wider than 8 for an f8\nsource, and its f8 -\u003e i8 mapping does not check `Int8` at all, which is\na separate pre-existing gap), so it is there for consistency with the\nhelper\u0027s new contract. And the composite type converter emulates f8 as\ni8 even when the target has `Float8EXT`, so on such a target a vector\nconstant still lowers to i8/i32 while a scalar stays f8; that is\npre-existing behavior of the type converter and this patch does not\nchange type conversion. I went with `convertIntegerAttr` (sign\nextension, same as i8) rather than an explicit `sext`/`zext` so there is\na single widening policy for emulated 8-bit values; consumers already\ntreat the upper bits of a widened value as unspecified. Happy to switch\nto an explicit extension if preferred.\n\nAdded a test in the \"no special capability\" section of\n`arith-to-spirv.mlir` covering a vector, a 1-D tensor and a 2-D tensor\n`f8E4M3FN` constant and a `vector\u003c2xf8E4M3\u003e` constant. It aborts without\nthe fix.\n\nFixes #203229\n\nGitOrigin-RevId: ad0b04334e9f5904043aa1c68cbbdaa7c6f94d0e\n" }, { "commit": "318c673dde0a1d40c3060a0f1dddf213325d410b", "tree": "37a554628dc01b799667d114e4fae7e2b336368d", "parents": [ "cdd60975e3d588735f8405bc965a3fb060cd8c1c" ], "author": { "name": "Sang Ik Lee", "email": "sang.ik.lee@intel.com", "time": "Mon Oct 19 13:42:33 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 13:49:24 2026 -0700" }, "message": "[MLIR][XeVM] XeVM to LLVM: Use fp conversion spirv builtins (#232463)\n\nIGC\u0027s __builtin_IB API is not stable. And it is better move to\n__builtin_spirv if an alternative is available.\nOnly updating impacted patterns only instead of a general migration for\nall patterns.\n\nGitOrigin-RevId: 7e0dfb056277a8b73bf59d0c5a02e8c9041e28ab\n" }, { "commit": "cdd60975e3d588735f8405bc965a3fb060cd8c1c", "tree": "ec5a5967ec6fc98135531f738204b26c7c205e3b", "parents": [ "52857bd500652b68c6aa91ee70ad9d44351c2f2d" ], "author": { "name": "DeanSturtevant1", "email": "dsturtevant@google.com", "time": "Mon Oct 19 15:55:15 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 13:06:05 2026 -0700" }, "message": "[mlir][tosa][NFC] Replace using namespace with nested namespaces in TosaPr… (#233543)\n\n…ofileCompliance\n\nGitOrigin-RevId: 243b84788b8d5d5447a61f07ef746a400da26644\n" }, { "commit": "52857bd500652b68c6aa91ee70ad9d44351c2f2d", "tree": "2851af08872ceef726475e80010093427736f7ba", "parents": [ "5355c38b3eb7dfb2f7a24df292a61beab07e2999" ], "author": { "name": "Alexander Shaposhnikov", "email": "ashaposhnikov@google.com", "time": "Mon Oct 19 11:36:25 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 11:42:33 2026 -0700" }, "message": "[mlir][SPIR-V] Add LifetimeStart and LifetimeStop operations (#232191)\n\nAdd spirv.LifetimeStart and spirv.LifetimeStop with assembly syntax,\nverification, and generated binary serialization and deserialization.\nBoth operations require function scope and the Kernel capability.\n\nGitOrigin-RevId: c8e95c5e9e7eecc7e14746e2af88148c3864942e\n" }, { "commit": "5355c38b3eb7dfb2f7a24df292a61beab07e2999", "tree": "81e3dc1b089b1103719de86bd1881916dc7a143d", "parents": [ "9f1303bebdee511f5c977f8756af1308041138ad" ], "author": { "name": "Andy Kaylor", "email": "akaylor@nvidia.com", "time": "Mon Oct 19 11:01:21 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 11:07:44 2026 -0700" }, "message": "[LLVMABI][AARCH64] Implement general aggregate classification (#230631)\n\nThis implements general aggregate type classification for arguments and\nreturn values on AArch64 targets. Aggregates of at most 16 bytes are\npassed or return directly in registers or on the stack. Larger\naggregates are passed or returned indirectly.\n\nAssisted-by: Cursor / various models\nGitOrigin-RevId: a3689eda09bb189ab4acd709a2c4e41f3bc0c503\n" }, { "commit": "9f1303bebdee511f5c977f8756af1308041138ad", "tree": "fbd108d69dfaddc0c9f03b574ebe36971999bedf", "parents": [ "628b46eebc65d28ebb96e16e9f60c8fc943523e3" ], "author": { "name": "Federico Bruzzone", "email": "federico.bruzzone.i@gmail.com", "time": "Mon Oct 19 19:39:09 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 10:43:29 2026 -0700" }, "message": "[mlir][ArmSME] Mark integration tests unsupported under ASan on Darwin (#233445)\n\nIn an ASan build on macOS arm64, the ArmSME integration tests fail with:\n\n```\n Assertion failed: (isInt\u003c28\u003e(Addend) \u0026\u0026 \"Branch target is out of range.\")\n (RuntimeDyldMachOAArch64.h, encodeAddend)\n```\n\nWhat happens:\n- `mlir-runner` JIT-compiles the program to machine code in memory\n- That code calls the SME ABI routines (e.g., `__arm_tpidr2_save`),\nwhich live in `libmlir_arm_sme_abi_stubs`\n- On AArch64 a direct branch (bl) can only reach about +/-128 MB from\nwhere it is, see\n[here](https://support.arm.com/documentation/dui0801/l/A64-General-Instructions/BL--A64-?lang\u003den)\n- The AArch64 backend emits these calls as direct branches and ignores\nthe code model, so a large code model in the JIT does not help\n- Under ASan the library can be mapped farther than that, the offset\ncannot be encoded and RuntimeDyld asserts\n\nWith this PR, we mark the two ArmSME directories as unsupported when\nboth \"asan\" and \"system-darwin\" are enabled.\n\n**Note**: Supporting them needs a JIT fix.\n\n---------\n\nSigned-off-by: Federico Bruzzone \u003cfederico.bruzzone.i@gmail.com\u003e\nGitOrigin-RevId: a1d78ee6f8b7d4240b26c5fc9a01bd3946921a2c\n" }, { "commit": "628b46eebc65d28ebb96e16e9f60c8fc943523e3", "tree": "e3a48ab294b4b94bcb9e990cc14fb5f82f0f5d2d", "parents": [ "197f7ba8511a2b89240eb41719b7bef3862bca59" ], "author": { "name": "Federico Bruzzone", "email": "federico.bruzzone.i@gmail.com", "time": "Mon Oct 19 19:30:36 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 10:41:15 2026 -0700" }, "message": "[mlir][linalg] Fix memory leak in `vectorize-insert-slice-rank-reducing` test (#233435)\n\nThe e2e test added in #226490 bufferizes a `tensor.empty` with\n`-one-shot-bufferize`, which allocates the buffer but never frees it.\nThe LeakSanitizer reports the leak in builds with ASAN, see\n[here](https://github.com/llvm/llvm-project/pull/226490#issuecomment-6267203174).\n\nWith this PR, the lowered IR now contains the `free` instruction.\n\n**Note**: I could not check the LeakSanitizer report directly, as LSan\nis not supported on macOS arm64 :(\n\nSigned-off-by: Federico Bruzzone \u003cfederico.bruzzone.i@gmail.com\u003e\nGitOrigin-RevId: a715dbca4d38fe82e569ad5ebdfe5554b2e57cce\n" }, { "commit": "197f7ba8511a2b89240eb41719b7bef3862bca59", "tree": "ac32b1aacca8fc1bd352fd97d7bd2527deab9788", "parents": [ "b8e7ca91c7671eefe4d16d63fcb6218701be6842" ], "author": { "name": "Vito Secona", "email": "secona00@gmail.com", "time": "Mon Oct 19 22:26:09 2026 +0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 08:34:24 2026 -0700" }, "message": "[mlir][sparse] Expose runtime library option in sparsification-and-bufferization (#233217)\n\nThis change adds the enable-runtime-library option to the\n-sparsification-and-bufferization pass. With this, the\n-sparsification-and-bufferization pass has all options from\nSparsificationOptions.\n\nAssisted by Codex for the test check lines.\n\nGitOrigin-RevId: ce31b348a52d9b1320b344c5f5eb017e271c538b\n" }, { "commit": "b8e7ca91c7671eefe4d16d63fcb6218701be6842", "tree": "f2760be65f2d0b018d0811786af0d2ae13269abf", "parents": [ "c4ae33af21fd3f69c77030306c16035723e06db8" ], "author": { "name": "Mattéo Rizza Murgier", "email": "matteo.rizza-murgier@sipearl.com", "time": "Mon Oct 19 17:11:59 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 08:21:53 2026 -0700" }, "message": "[mlir] add missing include in TestOpDefs.cpp (#233454)\n\nGitOrigin-RevId: 2666d750e416b94f9f105d7b082dc7c79dc3e5aa\n" }, { "commit": "c4ae33af21fd3f69c77030306c16035723e06db8", "tree": "b35a15c2f78977cd86038a713f321ca5d313cdd3", "parents": [ "6f377e32f67bdd9a126509647739e48c837af973" ], "author": { "name": "Adam Siemieniuk", "email": "adam.siemieniuk@intel.com", "time": "Mon Oct 19 16:36:07 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 07:44:37 2026 -0700" }, "message": "[mlir][x86] Accumulate AMX VNNI tiles in place (#233388)\n\nAccumulate AMX VNNI contraction results in place instead of through\ntemporary storage when the accumulator and result support direct tile\naccesses.\n\nThis reduces memory traffic and improves performance for contractions in\nVNNI layout with a non-zero accumulator.\n\nAssisted-by: Claude\nGitOrigin-RevId: bb30496e99c79aabe47ec85b779051e8284f9928\n" }, { "commit": "6f377e32f67bdd9a126509647739e48c837af973", "tree": "e9da64e27ac681ec8d035c1dd3012bfe88c99771", "parents": [ "314b0a72ff6b3d78e0062603b66b24bc0a2cd170" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Mon Oct 19 16:00:37 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 07:11:09 2026 -0700" }, "message": "[mlir][tosa] Simplify pad shape inference and verification (#233064)\n\nTreat constant padding amounts as ordinary integers during shape\ninference. Remove the example assigning a dynamic-padding meaning to\nnegative values.\n\nKeep PadOp verification local to operand and result types. Check padding\nlength through its shape type and drop checks of constant operand\ncontents and derived output extents.\n\nAssisted-by: Codex\nGitOrigin-RevId: 1e70f75bda11ab93b5872a548ae7a7802d0fd095\n" }, { "commit": "314b0a72ff6b3d78e0062603b66b24bc0a2cd170", "tree": "4757092bdb818648233e0d0b72036864537e71e9", "parents": [ "4c05f7c3ce80be0aa7ce94c1371ef8a80a060130" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Mon Oct 19 16:00:04 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 07:10:13 2026 -0700" }, "message": "[MLIR] Default PDL off for dependency-only builds (#233108)\n\nDefault PDL support in PatternMatch to off whenever MLIR is configured\nonly as a dependency. Keep the existing default for explicitly enabled\nMLIR builds and preserve user-provided PDL settings. This speeds up\nclang build with CIR enabled.\n\nAssisted-by: Codex\nGitOrigin-RevId: 6fb51f5a4e7dea46d2f717d3bf949579d3f8d9ea\n" }, { "commit": "4c05f7c3ce80be0aa7ce94c1371ef8a80a060130", "tree": "113993d9e6f59b1a9bb1f6ff3f7d0331ff81bae6", "parents": [ "c0a5daa95fba46ae2ce875720197c3b2d8c7d403" ], "author": { "name": "Stanislav Bardyuk", "email": "sbardyuk@google.com", "time": "Mon Oct 19 11:28:23 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 02:33:36 2026 -0700" }, "message": "[mlir][spirv] Fix control of nested sibling constructs in the deserializer (#225920)\n\nWhen the deserializer structurizes an outer loop or selection,\nupdateMergeInfo re-keys the blockMergeInfo entries of the nested\nconstructs from the old blocks to the cloned ones. It erases the old\nentry first and then reads it-\u003esecond.control through the erased\niterator. blockMergeInfo is a MapVector, so the erase shifts the next\nentry into that slot and the nested construct is re-created with its\nsibling\u0027s control.\n\nWith two sibling loops inside an outer loop, the first one marked\nDontUnroll and the second Unroll, the round trip comes back with both\nmarked Unroll. Same thing for two sibling selections with Flatten and\nDontFlatten. If the erased entry was the last one the read is past the\nend of the vector.\n\nCopy the control value out of the entry before erasing it, like loc\nalready is. Adds round-trip tests with two sibling loops and two sibling\nselections.\n\nFixes #218853\n\nGitOrigin-RevId: 03e570bd8d3b3a7947ab2d89a0943d48a99abcef\n" }, { "commit": "c0a5daa95fba46ae2ce875720197c3b2d8c7d403", "tree": "500b447159e4a0015ffa4e4e11fac45d6c97ac6a", "parents": [ "ba937cde129ebcbbb5595fadbfa88d5304ca9eb5" ], "author": { "name": "Abid Qadeer", "email": "haqadeer@amd.com", "time": "Mon Oct 19 09:21:25 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 01:26:29 2026 -0700" }, "message": "[OpenMP] Move constant size allocas in the entry block. (#231907)\n\nThe `createOutlinedFunction` embeds the user code in the middle of the\noutlined function, so allocas from the region end up outside its entry\nblock. It already moves the constant-sized ones back, but only when\ncompiling for the device.\n\nDoing it on the host too helps in two ways.\n\n1. Better debug experience. #229876 started placing the hidden variables\nthat hold the bounds of an adjustable array in allocas. They only get a\nframe slot if they are in the entry block.\n\n2. The comment in the code says that we \"must move what allocas we can\ninto the entry block to avoid possible breaking optimisations for\ndevice\", but that reasoning is true for the host as well. SROA only\nlooks at allocas in the entry block.\n\nAssisted By: Cursor\n\n---------\n\nCo-authored-by: Cursor \u003ccursoragent@cursor.com\u003e\nGitOrigin-RevId: 0566bfbe2e6545c0b18cc648420cfbe977b7bb9e\n" }, { "commit": "ba937cde129ebcbbb5595fadbfa88d5304ca9eb5", "tree": "4fe1eb03cce30a60627eb19cf7340439ca07d9d2", "parents": [ "fcfc977b7c629131a379ac64bc4628a82df9e7ca" ], "author": { "name": "Matthias Springer", "email": "me@m-sp.org", "time": "Mon Oct 19 15:57:02 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Mon Oct 19 00:02:57 2026 -0700" }, "message": "[mlir][arith] Drop `nsw` when canonicalizing shifted truncations (#233176)\n\nAssisted-by: Codex\nGitOrigin-RevId: 5bdfb6a6b50c92819e82a85e1a2d6b19c1abff03\n" }, { "commit": "fcfc977b7c629131a379ac64bc4628a82df9e7ca", "tree": "49c89f6483f9fee058ba64d45914fe32509b03f6", "parents": [ "a62a26968e0d759906eed195c5c3f607dd9d93cc" ], "author": { "name": "Matteo Di Iorio", "email": "matteo.diiorio2@studio.unibo.it", "time": "Mon Oct 19 08:21:40 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sun Oct 18 23:26:56 2026 -0700" }, "message": "[mlir][bufferization] Remove memref.alloc-only check for while exit aliases (#232834)\n\nThe `scf.while` exit-alias path added in #226951 currently restricts\nallocations to `memref.alloc`. With the realloc interface model fixed in\n#231608, I think we can remove that restriction.\n\nThis allows any eligible allocation op that supports\n`HoistingKind::Loop` to use that path, which at this time means an\nextension to `memref.alloca`.\n\nAlso remove the allocation value from the hoisting state since only that\ncheck used it.\n\nGitOrigin-RevId: 2c419645e808a6667eee9dbb16c828f77e2fd2f0\n" }, { "commit": "a62a26968e0d759906eed195c5c3f607dd9d93cc", "tree": "40e60508ecb51f0ac158636ab24f28330ad47de6", "parents": [ "bfc2f655e64ab794a3da2cb4cc3f93e681dc9535" ], "author": { "name": "Matthias Springer", "email": "me@m-sp.org", "time": "Mon Oct 19 15:06:50 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sun Oct 18 23:16:24 2026 -0700" }, "message": "[mlir][arith] Fix overflow flags when folding nested truncations (#233167)\n\nAssisted-by: Codex\nGitOrigin-RevId: 301dc7de591ae8aef7fea3c50c9b6210e491567a\n" }, { "commit": "bfc2f655e64ab794a3da2cb4cc3f93e681dc9535", "tree": "e4adcbf28ba7add65c16bdcbd5daf88d2c45a789", "parents": [ "833568ab070d9b4191f86f5781715e564280c835" ], "author": { "name": "Matthias Springer", "email": "me@m-sp.org", "time": "Mon Oct 19 15:06:03 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Sun Oct 18 23:15:29 2026 -0700" }, "message": "[mlir][arith] Preserve unsigned values when narrowing operations (#233323)\n\nRequire unsigned representability for `divui`, `ceildivui`, `remui`, and\n`shrui`. A signed range fitting the narrower type does not preserve the\nunsigned operand values, even when the result fits.\n\nAdd concrete counterexamples and coverage for safe narrowing of\nzero-extended and proven non-negative operands.\n\nAssisted-by: Codex\nGitOrigin-RevId: 28db2071a69cca854b8902bed58ab8acca16f869\n" } ], "next": "833568ab070d9b4191f86f5781715e564280c835" }