[NVVM][NVPTX] Change TMA Tensor reduction ops to use flag for reduction ops (#213638)

Currently, TMA S2G reduction intrinsics use reduction operation in the
name. Now that we have pretty-printing and a range-based verifier (for
ImmArgs) available, this PR migrates the reduction operation to an
immediate flag argument. This simplifies adding Rubin architecture
extensions to this family, while also reducing the number of intrinsics
from 64 to 8.

GitOrigin-RevId: 1ac19e41a0674925911e88cc5218dfd95a09a3ac