[mlir][xegpu] Raise the reduction vector size to match maxReduceVectorSize (#225122)

`maxReduceVectorSize` was pinned at 1, so a lane reduced one element at
a time no
matter how much data it held. This raises it to 16 and makes the layout
computation actually spend it, so a lane's reduce vector matches the
per-lane
budget.

```cpp
-  int64_t maxReduceVectorSize = 1; // could extend to spirv vector Size
+  int64_t maxReduceVectorSize = 16; // extend to spirv vector Size
```

The PR only raises the vector size for the innermost dim, and only when
that dim is reduced and carries a single lane.

The reason we don't raise vector size for outer dim: Raising the vector
size for the outer dim means the vector may be strided in flat element
order. In case that the producer is a shape_cast op, it causes a
potential convert_layout after shape_cast which assumes all lane data to
be contiguous.

As we simplify propagation rule, the trade-off is that the rule is
conservative since we don't know the information about producer due to
the backward propagation.

---------

Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
GitOrigin-RevId: 894dad791c0124915dcf6b5093744c9307cffaf2