commit: 3bbd68f457c82f57bfbf89681e38408ea7c4c054
[log]
author: Ravil Dorozhinskii <ravil.aviva.com@gmail.com>
Thu Jan 15 21:11:57 2026 +0100
committer: Copybara-Service <copybara-worker@google.com>
Thu Jan 15 12:15:34 2026 -0800
tree: 953d46083c1f2568facb55589e95b0e66d31e58e
parent: 119c377a1fd5b9ddff95316a7d9cb8637f3ac5c1 [diff]

[ROCDL] added: rsq to rocdl.math; fixes to global/flat prefetch (#176167)

PR adds rsq to rocdl.math as well as a fix to global/flat prefetch

- Note, prefetch ops must have MemWrite trait. Otherwise, they
are removed by any DCE pass in a pipeline.

GitOrigin-RevId: 9b6bf8f91c4741fbc069f5811405810cb107afb0

include/mlir/Dialect/LLVMIR/ROCDLOps.td[diff]
test/Dialect/LLVMIR/rocdl.mlir[diff]
test/Target/LLVMIR/rocdl.mlir[diff]

3 files changed

tree: 953d46083c1f2568facb55589e95b0e66d31e58e

benchmark/
cmake/
docs/
examples/
include/
lib/
python/
test/
tools/
unittests/
utils/
.clang-format
.clang-tidy
CMakeLists.txt
LICENSE.TXT
Maintainers.md
README.md

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.