| # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py |
| # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=atom | FileCheck %s |
| movsbw %al, %di |
| |
| # CHECK: Iterations: 100 |
| # CHECK-NEXT: Instructions: 100 |
| # CHECK-NEXT: Total Cycles: 101 |
| # CHECK-NEXT: Total uOps: 100 |
| |
| # CHECK: Dispatch Width: 2 |
| # CHECK-NEXT: uOps Per Cycle: 0.99 |
| # CHECK-NEXT: IPC: 0.99 |
| # CHECK-NEXT: Block RThroughput: 1.0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 1 2 1.00 movsbw %al, %di |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0] - AtomPort0 |
| # CHECK-NEXT: [1] - AtomPort1 |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0] [1] |
| # CHECK-NEXT: 1.00 1.00 |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0] [1] Instructions: |
| # CHECK-NEXT: 1.00 1.00 movsbw %al, %di |