| static const X86FoldTableEntry Table2Addr[] = { |
| {X86::ADD16ri_DB, X86::ADD16mi, TB_NO_REVERSE}, |
| {X86::ADD16rr_DB, X86::ADD16mr, TB_NO_REVERSE}, |
| {X86::ADD32ri_DB, X86::ADD32mi, TB_NO_REVERSE}, |
| {X86::ADD32rr_DB, X86::ADD32mr, TB_NO_REVERSE}, |
| {X86::ADD64ri32_DB, X86::ADD64mi32, TB_NO_REVERSE}, |
| {X86::ADD64rr_DB, X86::ADD64mr, TB_NO_REVERSE}, |
| {X86::ADD8ri_DB, X86::ADD8mi, TB_NO_REVERSE}, |
| {X86::ADD8rr_DB, X86::ADD8mr, TB_NO_REVERSE}, |
| {X86::ADC16ri, X86::ADC16mi, TB_NO_REVERSE}, |
| {X86::ADC16ri8, X86::ADC16mi8, TB_NO_REVERSE}, |
| {X86::ADC16rr, X86::ADC16mr, TB_NO_REVERSE}, |
| {X86::ADC32ri, X86::ADC32mi, TB_NO_REVERSE}, |
| {X86::ADC32ri8, X86::ADC32mi8, TB_NO_REVERSE}, |
| {X86::ADC32rr, X86::ADC32mr, TB_NO_REVERSE}, |
| {X86::ADC64ri32, X86::ADC64mi32, TB_NO_REVERSE}, |
| {X86::ADC64ri8, X86::ADC64mi8, TB_NO_REVERSE}, |
| {X86::ADC64rr, X86::ADC64mr, TB_NO_REVERSE}, |
| {X86::ADC8ri, X86::ADC8mi, TB_NO_REVERSE}, |
| {X86::ADC8ri8, X86::ADC8mi8, TB_NO_REVERSE}, |
| {X86::ADC8rr, X86::ADC8mr, TB_NO_REVERSE}, |
| {X86::ADD16ri, X86::ADD16mi, TB_NO_REVERSE}, |
| {X86::ADD16ri8, X86::ADD16mi8, TB_NO_REVERSE}, |
| {X86::ADD16ri8_NF, X86::ADD16mi8_NF, TB_NO_REVERSE}, |
| {X86::ADD16ri_NF, X86::ADD16mi_NF, TB_NO_REVERSE}, |
| {X86::ADD16rr, X86::ADD16mr, TB_NO_REVERSE}, |
| {X86::ADD16rr_NF, X86::ADD16mr_NF, TB_NO_REVERSE}, |
| {X86::ADD32ri, X86::ADD32mi, TB_NO_REVERSE}, |
| {X86::ADD32ri8, X86::ADD32mi8, TB_NO_REVERSE}, |
| {X86::ADD32ri8_NF, X86::ADD32mi8_NF, TB_NO_REVERSE}, |
| {X86::ADD32ri_NF, X86::ADD32mi_NF, TB_NO_REVERSE}, |
| {X86::ADD32rr, X86::ADD32mr, TB_NO_REVERSE}, |
| {X86::ADD32rr_NF, X86::ADD32mr_NF, TB_NO_REVERSE}, |
| {X86::ADD64ri32, X86::ADD64mi32, TB_NO_REVERSE}, |
| {X86::ADD64ri32_NF, X86::ADD64mi32_NF, TB_NO_REVERSE}, |
| {X86::ADD64ri8, X86::ADD64mi8, TB_NO_REVERSE}, |
| {X86::ADD64ri8_NF, X86::ADD64mi8_NF, TB_NO_REVERSE}, |
| {X86::ADD64rr, X86::ADD64mr, TB_NO_REVERSE}, |
| {X86::ADD64rr_NF, X86::ADD64mr_NF, TB_NO_REVERSE}, |
| {X86::ADD8ri, X86::ADD8mi, TB_NO_REVERSE}, |
| {X86::ADD8ri8, X86::ADD8mi8, TB_NO_REVERSE}, |
| {X86::ADD8ri_NF, X86::ADD8mi_NF, TB_NO_REVERSE}, |
| {X86::ADD8rr, X86::ADD8mr, TB_NO_REVERSE}, |
| {X86::ADD8rr_NF, X86::ADD8mr_NF, TB_NO_REVERSE}, |
| {X86::AND16ri, X86::AND16mi, TB_NO_REVERSE}, |
| {X86::AND16ri8, X86::AND16mi8, TB_NO_REVERSE}, |
| {X86::AND16ri8_NF, X86::AND16mi8_NF, TB_NO_REVERSE}, |
| {X86::AND16ri_NF, X86::AND16mi_NF, TB_NO_REVERSE}, |
| {X86::AND16rr, X86::AND16mr, TB_NO_REVERSE}, |
| {X86::AND16rr_NF, X86::AND16mr_NF, TB_NO_REVERSE}, |
| {X86::AND32ri, X86::AND32mi, TB_NO_REVERSE}, |
| {X86::AND32ri8, X86::AND32mi8, TB_NO_REVERSE}, |
| {X86::AND32ri8_NF, X86::AND32mi8_NF, TB_NO_REVERSE}, |
| {X86::AND32ri_NF, X86::AND32mi_NF, TB_NO_REVERSE}, |
| {X86::AND32rr, X86::AND32mr, TB_NO_REVERSE}, |
| {X86::AND32rr_NF, X86::AND32mr_NF, TB_NO_REVERSE}, |
| {X86::AND64ri32, X86::AND64mi32, TB_NO_REVERSE}, |
| {X86::AND64ri32_NF, X86::AND64mi32_NF, TB_NO_REVERSE}, |
| {X86::AND64ri8, X86::AND64mi8, TB_NO_REVERSE}, |
| {X86::AND64ri8_NF, X86::AND64mi8_NF, TB_NO_REVERSE}, |
| {X86::AND64rr, X86::AND64mr, TB_NO_REVERSE}, |
| {X86::AND64rr_NF, X86::AND64mr_NF, TB_NO_REVERSE}, |
| {X86::AND8ri, X86::AND8mi, TB_NO_REVERSE}, |
| {X86::AND8ri8, X86::AND8mi8, TB_NO_REVERSE}, |
| {X86::AND8ri_NF, X86::AND8mi_NF, TB_NO_REVERSE}, |
| {X86::AND8rr, X86::AND8mr, TB_NO_REVERSE}, |
| {X86::AND8rr_NF, X86::AND8mr_NF, TB_NO_REVERSE}, |
| {X86::BTC16ri8, X86::BTC16mi8, TB_NO_REVERSE}, |
| {X86::BTC32ri8, X86::BTC32mi8, TB_NO_REVERSE}, |
| {X86::BTC64ri8, X86::BTC64mi8, TB_NO_REVERSE}, |
| {X86::BTR16ri8, X86::BTR16mi8, TB_NO_REVERSE}, |
| {X86::BTR32ri8, X86::BTR32mi8, TB_NO_REVERSE}, |
| {X86::BTR64ri8, X86::BTR64mi8, TB_NO_REVERSE}, |
| {X86::BTS16ri8, X86::BTS16mi8, TB_NO_REVERSE}, |
| {X86::BTS32ri8, X86::BTS32mi8, TB_NO_REVERSE}, |
| {X86::BTS64ri8, X86::BTS64mi8, TB_NO_REVERSE}, |
| {X86::DEC16r, X86::DEC16m, TB_NO_REVERSE}, |
| {X86::DEC16r_NF, X86::DEC16m_NF, TB_NO_REVERSE}, |
| {X86::DEC32r, X86::DEC32m, TB_NO_REVERSE}, |
| {X86::DEC32r_NF, X86::DEC32m_NF, TB_NO_REVERSE}, |
| {X86::DEC64r, X86::DEC64m, TB_NO_REVERSE}, |
| {X86::DEC64r_NF, X86::DEC64m_NF, TB_NO_REVERSE}, |
| {X86::DEC8r, X86::DEC8m, TB_NO_REVERSE}, |
| {X86::DEC8r_NF, X86::DEC8m_NF, TB_NO_REVERSE}, |
| {X86::INC16r, X86::INC16m, TB_NO_REVERSE}, |
| {X86::INC16r_NF, X86::INC16m_NF, TB_NO_REVERSE}, |
| {X86::INC32r, X86::INC32m, TB_NO_REVERSE}, |
| {X86::INC32r_NF, X86::INC32m_NF, TB_NO_REVERSE}, |
| {X86::INC64r, X86::INC64m, TB_NO_REVERSE}, |
| {X86::INC64r_NF, X86::INC64m_NF, TB_NO_REVERSE}, |
| {X86::INC8r, X86::INC8m, TB_NO_REVERSE}, |
| {X86::INC8r_NF, X86::INC8m_NF, TB_NO_REVERSE}, |
| {X86::NEG16r, X86::NEG16m, TB_NO_REVERSE}, |
| {X86::NEG16r_NF, X86::NEG16m_NF, TB_NO_REVERSE}, |
| {X86::NEG32r, X86::NEG32m, TB_NO_REVERSE}, |
| {X86::NEG32r_NF, X86::NEG32m_NF, TB_NO_REVERSE}, |
| {X86::NEG64r, X86::NEG64m, TB_NO_REVERSE}, |
| {X86::NEG64r_NF, X86::NEG64m_NF, TB_NO_REVERSE}, |
| {X86::NEG8r, X86::NEG8m, TB_NO_REVERSE}, |
| {X86::NEG8r_NF, X86::NEG8m_NF, TB_NO_REVERSE}, |
| {X86::NOT16r, X86::NOT16m, TB_NO_REVERSE}, |
| {X86::NOT32r, X86::NOT32m, TB_NO_REVERSE}, |
| {X86::NOT64r, X86::NOT64m, TB_NO_REVERSE}, |
| {X86::NOT8r, X86::NOT8m, TB_NO_REVERSE}, |
| {X86::OR16ri, X86::OR16mi, TB_NO_REVERSE}, |
| {X86::OR16ri8, X86::OR16mi8, TB_NO_REVERSE}, |
| {X86::OR16ri8_NF, X86::OR16mi8_NF, TB_NO_REVERSE}, |
| {X86::OR16ri_NF, X86::OR16mi_NF, TB_NO_REVERSE}, |
| {X86::OR16rr, X86::OR16mr, TB_NO_REVERSE}, |
| {X86::OR16rr_NF, X86::OR16mr_NF, TB_NO_REVERSE}, |
| {X86::OR32ri, X86::OR32mi, TB_NO_REVERSE}, |
| {X86::OR32ri8, X86::OR32mi8, TB_NO_REVERSE}, |
| {X86::OR32ri8_NF, X86::OR32mi8_NF, TB_NO_REVERSE}, |
| {X86::OR32ri_NF, X86::OR32mi_NF, TB_NO_REVERSE}, |
| {X86::OR32rr, X86::OR32mr, TB_NO_REVERSE}, |
| {X86::OR32rr_NF, X86::OR32mr_NF, TB_NO_REVERSE}, |
| {X86::OR64ri32, X86::OR64mi32, TB_NO_REVERSE}, |
| {X86::OR64ri32_NF, X86::OR64mi32_NF, TB_NO_REVERSE}, |
| {X86::OR64ri8, X86::OR64mi8, TB_NO_REVERSE}, |
| {X86::OR64ri8_NF, X86::OR64mi8_NF, TB_NO_REVERSE}, |
| {X86::OR64rr, X86::OR64mr, TB_NO_REVERSE}, |
| {X86::OR64rr_NF, X86::OR64mr_NF, TB_NO_REVERSE}, |
| {X86::OR8ri, X86::OR8mi, TB_NO_REVERSE}, |
| {X86::OR8ri8, X86::OR8mi8, TB_NO_REVERSE}, |
| {X86::OR8ri_NF, X86::OR8mi_NF, TB_NO_REVERSE}, |
| {X86::OR8rr, X86::OR8mr, TB_NO_REVERSE}, |
| {X86::OR8rr_NF, X86::OR8mr_NF, TB_NO_REVERSE}, |
| {X86::RCL16r1, X86::RCL16m1, TB_NO_REVERSE}, |
| {X86::RCL16rCL, X86::RCL16mCL, TB_NO_REVERSE}, |
| {X86::RCL16ri, X86::RCL16mi, TB_NO_REVERSE}, |
| {X86::RCL32r1, X86::RCL32m1, TB_NO_REVERSE}, |
| {X86::RCL32rCL, X86::RCL32mCL, TB_NO_REVERSE}, |
| {X86::RCL32ri, X86::RCL32mi, TB_NO_REVERSE}, |
| {X86::RCL64r1, X86::RCL64m1, TB_NO_REVERSE}, |
| {X86::RCL64rCL, X86::RCL64mCL, TB_NO_REVERSE}, |
| {X86::RCL64ri, X86::RCL64mi, TB_NO_REVERSE}, |
| {X86::RCL8r1, X86::RCL8m1, TB_NO_REVERSE}, |
| {X86::RCL8rCL, X86::RCL8mCL, TB_NO_REVERSE}, |
| {X86::RCL8ri, X86::RCL8mi, TB_NO_REVERSE}, |
| {X86::RCR16r1, X86::RCR16m1, TB_NO_REVERSE}, |
| {X86::RCR16rCL, X86::RCR16mCL, TB_NO_REVERSE}, |
| {X86::RCR16ri, X86::RCR16mi, TB_NO_REVERSE}, |
| {X86::RCR32r1, X86::RCR32m1, TB_NO_REVERSE}, |
| {X86::RCR32rCL, X86::RCR32mCL, TB_NO_REVERSE}, |
| {X86::RCR32ri, X86::RCR32mi, TB_NO_REVERSE}, |
| {X86::RCR64r1, X86::RCR64m1, TB_NO_REVERSE}, |
| {X86::RCR64rCL, X86::RCR64mCL, TB_NO_REVERSE}, |
| {X86::RCR64ri, X86::RCR64mi, TB_NO_REVERSE}, |
| {X86::RCR8r1, X86::RCR8m1, TB_NO_REVERSE}, |
| {X86::RCR8rCL, X86::RCR8mCL, TB_NO_REVERSE}, |
| {X86::RCR8ri, X86::RCR8mi, TB_NO_REVERSE}, |
| {X86::ROL16r1, X86::ROL16m1, TB_NO_REVERSE}, |
| {X86::ROL16r1_NF, X86::ROL16m1_NF, TB_NO_REVERSE}, |
| {X86::ROL16rCL, X86::ROL16mCL, TB_NO_REVERSE}, |
| {X86::ROL16rCL_NF, X86::ROL16mCL_NF, TB_NO_REVERSE}, |
| {X86::ROL16ri, X86::ROL16mi, TB_NO_REVERSE}, |
| {X86::ROL16ri_NF, X86::ROL16mi_NF, TB_NO_REVERSE}, |
| {X86::ROL32r1, X86::ROL32m1, TB_NO_REVERSE}, |
| {X86::ROL32r1_NF, X86::ROL32m1_NF, TB_NO_REVERSE}, |
| {X86::ROL32rCL, X86::ROL32mCL, TB_NO_REVERSE}, |
| {X86::ROL32rCL_NF, X86::ROL32mCL_NF, TB_NO_REVERSE}, |
| {X86::ROL32ri, X86::ROL32mi, TB_NO_REVERSE}, |
| {X86::ROL32ri_NF, X86::ROL32mi_NF, TB_NO_REVERSE}, |
| {X86::ROL64r1, X86::ROL64m1, TB_NO_REVERSE}, |
| {X86::ROL64r1_NF, X86::ROL64m1_NF, TB_NO_REVERSE}, |
| {X86::ROL64rCL, X86::ROL64mCL, TB_NO_REVERSE}, |
| {X86::ROL64rCL_NF, X86::ROL64mCL_NF, TB_NO_REVERSE}, |
| {X86::ROL64ri, X86::ROL64mi, TB_NO_REVERSE}, |
| {X86::ROL64ri_NF, X86::ROL64mi_NF, TB_NO_REVERSE}, |
| {X86::ROL8r1, X86::ROL8m1, TB_NO_REVERSE}, |
| {X86::ROL8r1_NF, X86::ROL8m1_NF, TB_NO_REVERSE}, |
| {X86::ROL8rCL, X86::ROL8mCL, TB_NO_REVERSE}, |
| {X86::ROL8rCL_NF, X86::ROL8mCL_NF, TB_NO_REVERSE}, |
| {X86::ROL8ri, X86::ROL8mi, TB_NO_REVERSE}, |
| {X86::ROL8ri_NF, X86::ROL8mi_NF, TB_NO_REVERSE}, |
| {X86::ROR16r1, X86::ROR16m1, TB_NO_REVERSE}, |
| {X86::ROR16r1_NF, X86::ROR16m1_NF, TB_NO_REVERSE}, |
| {X86::ROR16rCL, X86::ROR16mCL, TB_NO_REVERSE}, |
| {X86::ROR16rCL_NF, X86::ROR16mCL_NF, TB_NO_REVERSE}, |
| {X86::ROR16ri, X86::ROR16mi, TB_NO_REVERSE}, |
| {X86::ROR16ri_NF, X86::ROR16mi_NF, TB_NO_REVERSE}, |
| {X86::ROR32r1, X86::ROR32m1, TB_NO_REVERSE}, |
| {X86::ROR32r1_NF, X86::ROR32m1_NF, TB_NO_REVERSE}, |
| {X86::ROR32rCL, X86::ROR32mCL, TB_NO_REVERSE}, |
| {X86::ROR32rCL_NF, X86::ROR32mCL_NF, TB_NO_REVERSE}, |
| {X86::ROR32ri, X86::ROR32mi, TB_NO_REVERSE}, |
| {X86::ROR32ri_NF, X86::ROR32mi_NF, TB_NO_REVERSE}, |
| {X86::ROR64r1, X86::ROR64m1, TB_NO_REVERSE}, |
| {X86::ROR64r1_NF, X86::ROR64m1_NF, TB_NO_REVERSE}, |
| {X86::ROR64rCL, X86::ROR64mCL, TB_NO_REVERSE}, |
| {X86::ROR64rCL_NF, X86::ROR64mCL_NF, TB_NO_REVERSE}, |
| {X86::ROR64ri, X86::ROR64mi, TB_NO_REVERSE}, |
| {X86::ROR64ri_NF, X86::ROR64mi_NF, TB_NO_REVERSE}, |
| {X86::ROR8r1, X86::ROR8m1, TB_NO_REVERSE}, |
| {X86::ROR8r1_NF, X86::ROR8m1_NF, TB_NO_REVERSE}, |
| {X86::ROR8rCL, X86::ROR8mCL, TB_NO_REVERSE}, |
| {X86::ROR8rCL_NF, X86::ROR8mCL_NF, TB_NO_REVERSE}, |
| {X86::ROR8ri, X86::ROR8mi, TB_NO_REVERSE}, |
| {X86::ROR8ri_NF, X86::ROR8mi_NF, TB_NO_REVERSE}, |
| {X86::SAR16r1, X86::SAR16m1, TB_NO_REVERSE}, |
| {X86::SAR16r1_NF, X86::SAR16m1_NF, TB_NO_REVERSE}, |
| {X86::SAR16rCL, X86::SAR16mCL, TB_NO_REVERSE}, |
| {X86::SAR16rCL_NF, X86::SAR16mCL_NF, TB_NO_REVERSE}, |
| {X86::SAR16ri, X86::SAR16mi, TB_NO_REVERSE}, |
| {X86::SAR16ri_NF, X86::SAR16mi_NF, TB_NO_REVERSE}, |
| {X86::SAR32r1, X86::SAR32m1, TB_NO_REVERSE}, |
| {X86::SAR32r1_NF, X86::SAR32m1_NF, TB_NO_REVERSE}, |
| {X86::SAR32rCL, X86::SAR32mCL, TB_NO_REVERSE}, |
| {X86::SAR32rCL_NF, X86::SAR32mCL_NF, TB_NO_REVERSE}, |
| {X86::SAR32ri, X86::SAR32mi, TB_NO_REVERSE}, |
| {X86::SAR32ri_NF, X86::SAR32mi_NF, TB_NO_REVERSE}, |
| {X86::SAR64r1, X86::SAR64m1, TB_NO_REVERSE}, |
| {X86::SAR64r1_NF, X86::SAR64m1_NF, TB_NO_REVERSE}, |
| {X86::SAR64rCL, X86::SAR64mCL, TB_NO_REVERSE}, |
| {X86::SAR64rCL_NF, X86::SAR64mCL_NF, TB_NO_REVERSE}, |
| {X86::SAR64ri, X86::SAR64mi, TB_NO_REVERSE}, |
| {X86::SAR64ri_NF, X86::SAR64mi_NF, TB_NO_REVERSE}, |
| {X86::SAR8r1, X86::SAR8m1, TB_NO_REVERSE}, |
| {X86::SAR8r1_NF, X86::SAR8m1_NF, TB_NO_REVERSE}, |
| {X86::SAR8rCL, X86::SAR8mCL, TB_NO_REVERSE}, |
| {X86::SAR8rCL_NF, X86::SAR8mCL_NF, TB_NO_REVERSE}, |
| {X86::SAR8ri, X86::SAR8mi, TB_NO_REVERSE}, |
| {X86::SAR8ri_NF, X86::SAR8mi_NF, TB_NO_REVERSE}, |
| {X86::SBB16ri, X86::SBB16mi, TB_NO_REVERSE}, |
| {X86::SBB16ri8, X86::SBB16mi8, TB_NO_REVERSE}, |
| {X86::SBB16rr, X86::SBB16mr, TB_NO_REVERSE}, |
| {X86::SBB32ri, X86::SBB32mi, TB_NO_REVERSE}, |
| {X86::SBB32ri8, X86::SBB32mi8, TB_NO_REVERSE}, |
| {X86::SBB32rr, X86::SBB32mr, TB_NO_REVERSE}, |
| {X86::SBB64ri32, X86::SBB64mi32, TB_NO_REVERSE}, |
| {X86::SBB64ri8, X86::SBB64mi8, TB_NO_REVERSE}, |
| {X86::SBB64rr, X86::SBB64mr, TB_NO_REVERSE}, |
| {X86::SBB8ri, X86::SBB8mi, TB_NO_REVERSE}, |
| {X86::SBB8ri8, X86::SBB8mi8, TB_NO_REVERSE}, |
| {X86::SBB8rr, X86::SBB8mr, TB_NO_REVERSE}, |
| {X86::SHL16r1, X86::SHL16m1, TB_NO_REVERSE}, |
| {X86::SHL16r1_NF, X86::SHL16m1_NF, TB_NO_REVERSE}, |
| {X86::SHL16rCL, X86::SHL16mCL, TB_NO_REVERSE}, |
| {X86::SHL16rCL_NF, X86::SHL16mCL_NF, TB_NO_REVERSE}, |
| {X86::SHL16ri, X86::SHL16mi, TB_NO_REVERSE}, |
| {X86::SHL16ri_NF, X86::SHL16mi_NF, TB_NO_REVERSE}, |
| {X86::SHL32r1, X86::SHL32m1, TB_NO_REVERSE}, |
| {X86::SHL32r1_NF, X86::SHL32m1_NF, TB_NO_REVERSE}, |
| {X86::SHL32rCL, X86::SHL32mCL, TB_NO_REVERSE}, |
| {X86::SHL32rCL_NF, X86::SHL32mCL_NF, TB_NO_REVERSE}, |
| {X86::SHL32ri, X86::SHL32mi, TB_NO_REVERSE}, |
| {X86::SHL32ri_NF, X86::SHL32mi_NF, TB_NO_REVERSE}, |
| {X86::SHL64r1, X86::SHL64m1, TB_NO_REVERSE}, |
| {X86::SHL64r1_NF, X86::SHL64m1_NF, TB_NO_REVERSE}, |
| {X86::SHL64rCL, X86::SHL64mCL, TB_NO_REVERSE}, |
| {X86::SHL64rCL_NF, X86::SHL64mCL_NF, TB_NO_REVERSE}, |
| {X86::SHL64ri, X86::SHL64mi, TB_NO_REVERSE}, |
| {X86::SHL64ri_NF, X86::SHL64mi_NF, TB_NO_REVERSE}, |
| {X86::SHL8r1, X86::SHL8m1, TB_NO_REVERSE}, |
| {X86::SHL8r1_NF, X86::SHL8m1_NF, TB_NO_REVERSE}, |
| {X86::SHL8rCL, X86::SHL8mCL, TB_NO_REVERSE}, |
| {X86::SHL8rCL_NF, X86::SHL8mCL_NF, TB_NO_REVERSE}, |
| {X86::SHL8ri, X86::SHL8mi, TB_NO_REVERSE}, |
| {X86::SHL8ri_NF, X86::SHL8mi_NF, TB_NO_REVERSE}, |
| {X86::SHLD16rrCL, X86::SHLD16mrCL, TB_NO_REVERSE}, |
| {X86::SHLD16rrCL_NF, X86::SHLD16mrCL_NF, TB_NO_REVERSE}, |
| {X86::SHLD16rri8, X86::SHLD16mri8, TB_NO_REVERSE}, |
| {X86::SHLD16rri8_NF, X86::SHLD16mri8_NF, TB_NO_REVERSE}, |
| {X86::SHLD32rrCL, X86::SHLD32mrCL, TB_NO_REVERSE}, |
| {X86::SHLD32rrCL_NF, X86::SHLD32mrCL_NF, TB_NO_REVERSE}, |
| {X86::SHLD32rri8, X86::SHLD32mri8, TB_NO_REVERSE}, |
| {X86::SHLD32rri8_NF, X86::SHLD32mri8_NF, TB_NO_REVERSE}, |
| {X86::SHLD64rrCL, X86::SHLD64mrCL, TB_NO_REVERSE}, |
| {X86::SHLD64rrCL_NF, X86::SHLD64mrCL_NF, TB_NO_REVERSE}, |
| {X86::SHLD64rri8, X86::SHLD64mri8, TB_NO_REVERSE}, |
| {X86::SHLD64rri8_NF, X86::SHLD64mri8_NF, TB_NO_REVERSE}, |
| {X86::SHR16r1, X86::SHR16m1, TB_NO_REVERSE}, |
| {X86::SHR16r1_NF, X86::SHR16m1_NF, TB_NO_REVERSE}, |
| {X86::SHR16rCL, X86::SHR16mCL, TB_NO_REVERSE}, |
| {X86::SHR16rCL_NF, X86::SHR16mCL_NF, TB_NO_REVERSE}, |
| {X86::SHR16ri, X86::SHR16mi, TB_NO_REVERSE}, |
| {X86::SHR16ri_NF, X86::SHR16mi_NF, TB_NO_REVERSE}, |
| {X86::SHR32r1, X86::SHR32m1, TB_NO_REVERSE}, |
| {X86::SHR32r1_NF, X86::SHR32m1_NF, TB_NO_REVERSE}, |
| {X86::SHR32rCL, X86::SHR32mCL, TB_NO_REVERSE}, |
| {X86::SHR32rCL_NF, X86::SHR32mCL_NF, TB_NO_REVERSE}, |
| {X86::SHR32ri, X86::SHR32mi, TB_NO_REVERSE}, |
| {X86::SHR32ri_NF, X86::SHR32mi_NF, TB_NO_REVERSE}, |
| {X86::SHR64r1, X86::SHR64m1, TB_NO_REVERSE}, |
| {X86::SHR64r1_NF, X86::SHR64m1_NF, TB_NO_REVERSE}, |
| {X86::SHR64rCL, X86::SHR64mCL, TB_NO_REVERSE}, |
| {X86::SHR64rCL_NF, X86::SHR64mCL_NF, TB_NO_REVERSE}, |
| {X86::SHR64ri, X86::SHR64mi, TB_NO_REVERSE}, |
| {X86::SHR64ri_NF, X86::SHR64mi_NF, TB_NO_REVERSE}, |
| {X86::SHR8r1, X86::SHR8m1, TB_NO_REVERSE}, |
| {X86::SHR8r1_NF, X86::SHR8m1_NF, TB_NO_REVERSE}, |
| {X86::SHR8rCL, X86::SHR8mCL, TB_NO_REVERSE}, |
| {X86::SHR8rCL_NF, X86::SHR8mCL_NF, TB_NO_REVERSE}, |
| {X86::SHR8ri, X86::SHR8mi, TB_NO_REVERSE}, |
| {X86::SHR8ri_NF, X86::SHR8mi_NF, TB_NO_REVERSE}, |
| {X86::SHRD16rrCL, X86::SHRD16mrCL, TB_NO_REVERSE}, |
| {X86::SHRD16rrCL_NF, X86::SHRD16mrCL_NF, TB_NO_REVERSE}, |
| {X86::SHRD16rri8, X86::SHRD16mri8, TB_NO_REVERSE}, |
| {X86::SHRD16rri8_NF, X86::SHRD16mri8_NF, TB_NO_REVERSE}, |
| {X86::SHRD32rrCL, X86::SHRD32mrCL, TB_NO_REVERSE}, |
| {X86::SHRD32rrCL_NF, X86::SHRD32mrCL_NF, TB_NO_REVERSE}, |
| {X86::SHRD32rri8, X86::SHRD32mri8, TB_NO_REVERSE}, |
| {X86::SHRD32rri8_NF, X86::SHRD32mri8_NF, TB_NO_REVERSE}, |
| {X86::SHRD64rrCL, X86::SHRD64mrCL, TB_NO_REVERSE}, |
| {X86::SHRD64rrCL_NF, X86::SHRD64mrCL_NF, TB_NO_REVERSE}, |
| {X86::SHRD64rri8, X86::SHRD64mri8, TB_NO_REVERSE}, |
| {X86::SHRD64rri8_NF, X86::SHRD64mri8_NF, TB_NO_REVERSE}, |
| {X86::SUB16ri, X86::SUB16mi, TB_NO_REVERSE}, |
| {X86::SUB16ri8, X86::SUB16mi8, TB_NO_REVERSE}, |
| {X86::SUB16ri8_NF, X86::SUB16mi8_NF, TB_NO_REVERSE}, |
| {X86::SUB16ri_NF, X86::SUB16mi_NF, TB_NO_REVERSE}, |
| {X86::SUB16rr, X86::SUB16mr, TB_NO_REVERSE}, |
| {X86::SUB16rr_NF, X86::SUB16mr_NF, TB_NO_REVERSE}, |
| {X86::SUB32ri, X86::SUB32mi, TB_NO_REVERSE}, |
| {X86::SUB32ri8, X86::SUB32mi8, TB_NO_REVERSE}, |
| {X86::SUB32ri8_NF, X86::SUB32mi8_NF, TB_NO_REVERSE}, |
| {X86::SUB32ri_NF, X86::SUB32mi_NF, TB_NO_REVERSE}, |
| {X86::SUB32rr, X86::SUB32mr, TB_NO_REVERSE}, |
| {X86::SUB32rr_NF, X86::SUB32mr_NF, TB_NO_REVERSE}, |
| {X86::SUB64ri32, X86::SUB64mi32, TB_NO_REVERSE}, |
| {X86::SUB64ri32_NF, X86::SUB64mi32_NF, TB_NO_REVERSE}, |
| {X86::SUB64ri8, X86::SUB64mi8, TB_NO_REVERSE}, |
| {X86::SUB64ri8_NF, X86::SUB64mi8_NF, TB_NO_REVERSE}, |
| {X86::SUB64rr, X86::SUB64mr, TB_NO_REVERSE}, |
| {X86::SUB64rr_NF, X86::SUB64mr_NF, TB_NO_REVERSE}, |
| {X86::SUB8ri, X86::SUB8mi, TB_NO_REVERSE}, |
| {X86::SUB8ri8, X86::SUB8mi8, TB_NO_REVERSE}, |
| {X86::SUB8ri_NF, X86::SUB8mi_NF, TB_NO_REVERSE}, |
| {X86::SUB8rr, X86::SUB8mr, TB_NO_REVERSE}, |
| {X86::SUB8rr_NF, X86::SUB8mr_NF, TB_NO_REVERSE}, |
| {X86::XOR16ri, X86::XOR16mi, TB_NO_REVERSE}, |
| {X86::XOR16ri8, X86::XOR16mi8, TB_NO_REVERSE}, |
| {X86::XOR16ri8_NF, X86::XOR16mi8_NF, TB_NO_REVERSE}, |
| {X86::XOR16ri_NF, X86::XOR16mi_NF, TB_NO_REVERSE}, |
| {X86::XOR16rr, X86::XOR16mr, TB_NO_REVERSE}, |
| {X86::XOR16rr_NF, X86::XOR16mr_NF, TB_NO_REVERSE}, |
| {X86::XOR32ri, X86::XOR32mi, TB_NO_REVERSE}, |
| {X86::XOR32ri8, X86::XOR32mi8, TB_NO_REVERSE}, |
| {X86::XOR32ri8_NF, X86::XOR32mi8_NF, TB_NO_REVERSE}, |
| {X86::XOR32ri_NF, X86::XOR32mi_NF, TB_NO_REVERSE}, |
| {X86::XOR32rr, X86::XOR32mr, TB_NO_REVERSE}, |
| {X86::XOR32rr_NF, X86::XOR32mr_NF, TB_NO_REVERSE}, |
| {X86::XOR64ri32, X86::XOR64mi32, TB_NO_REVERSE}, |
| {X86::XOR64ri32_NF, X86::XOR64mi32_NF, TB_NO_REVERSE}, |
| {X86::XOR64ri8, X86::XOR64mi8, TB_NO_REVERSE}, |
| {X86::XOR64ri8_NF, X86::XOR64mi8_NF, TB_NO_REVERSE}, |
| {X86::XOR64rr, X86::XOR64mr, TB_NO_REVERSE}, |
| {X86::XOR64rr_NF, X86::XOR64mr_NF, TB_NO_REVERSE}, |
| {X86::XOR8ri, X86::XOR8mi, TB_NO_REVERSE}, |
| {X86::XOR8ri8, X86::XOR8mi8, TB_NO_REVERSE}, |
| {X86::XOR8ri_NF, X86::XOR8mi_NF, TB_NO_REVERSE}, |
| {X86::XOR8rr, X86::XOR8mr, TB_NO_REVERSE}, |
| {X86::XOR8rr_NF, X86::XOR8mr_NF, TB_NO_REVERSE}, |
| }; |
| |
| static const X86FoldTableEntry Table0[] = { |
| {X86::BT16ri8, X86::BT16mi8, TB_FOLDED_LOAD}, |
| {X86::BT32ri8, X86::BT32mi8, TB_FOLDED_LOAD}, |
| {X86::BT64ri8, X86::BT64mi8, TB_FOLDED_LOAD}, |
| {X86::CALL16r, X86::CALL16m, TB_FOLDED_LOAD}, |
| {X86::CALL16r_NT, X86::CALL16m_NT, TB_FOLDED_LOAD}, |
| {X86::CALL32r, X86::CALL32m, TB_FOLDED_LOAD}, |
| {X86::CALL32r_NT, X86::CALL32m_NT, TB_FOLDED_LOAD}, |
| {X86::CALL64r, X86::CALL64m, TB_FOLDED_LOAD}, |
| {X86::CALL64r_NT, X86::CALL64m_NT, TB_FOLDED_LOAD}, |
| {X86::CCMP16ri, X86::CCMP16mi, TB_FOLDED_LOAD}, |
| {X86::CCMP16ri8, X86::CCMP16mi8, TB_FOLDED_LOAD}, |
| {X86::CCMP16rr, X86::CCMP16mr, TB_FOLDED_LOAD}, |
| {X86::CCMP32ri, X86::CCMP32mi, TB_FOLDED_LOAD}, |
| {X86::CCMP32ri8, X86::CCMP32mi8, TB_FOLDED_LOAD}, |
| {X86::CCMP32rr, X86::CCMP32mr, TB_FOLDED_LOAD}, |
| {X86::CCMP64ri32, X86::CCMP64mi32, TB_FOLDED_LOAD}, |
| {X86::CCMP64ri8, X86::CCMP64mi8, TB_FOLDED_LOAD}, |
| {X86::CCMP64rr, X86::CCMP64mr, TB_FOLDED_LOAD}, |
| {X86::CCMP8ri, X86::CCMP8mi, TB_FOLDED_LOAD}, |
| {X86::CCMP8rr, X86::CCMP8mr, TB_FOLDED_LOAD}, |
| {X86::CMP16ri, X86::CMP16mi, TB_FOLDED_LOAD}, |
| {X86::CMP16ri8, X86::CMP16mi8, TB_FOLDED_LOAD}, |
| {X86::CMP16rr, X86::CMP16mr, TB_FOLDED_LOAD}, |
| {X86::CMP32ri, X86::CMP32mi, TB_FOLDED_LOAD}, |
| {X86::CMP32ri8, X86::CMP32mi8, TB_FOLDED_LOAD}, |
| {X86::CMP32rr, X86::CMP32mr, TB_FOLDED_LOAD}, |
| {X86::CMP64ri32, X86::CMP64mi32, TB_FOLDED_LOAD}, |
| {X86::CMP64ri8, X86::CMP64mi8, TB_FOLDED_LOAD}, |
| {X86::CMP64rr, X86::CMP64mr, TB_FOLDED_LOAD}, |
| {X86::CMP8ri, X86::CMP8mi, TB_FOLDED_LOAD}, |
| {X86::CMP8ri8, X86::CMP8mi8, TB_FOLDED_LOAD}, |
| {X86::CMP8rr, X86::CMP8mr, TB_FOLDED_LOAD}, |
| {X86::CTEST16ri, X86::CTEST16mi, TB_FOLDED_LOAD}, |
| {X86::CTEST16rr, X86::CTEST16mr, TB_FOLDED_LOAD}, |
| {X86::CTEST32ri, X86::CTEST32mi, TB_FOLDED_LOAD}, |
| {X86::CTEST32rr, X86::CTEST32mr, TB_FOLDED_LOAD}, |
| {X86::CTEST64ri32, X86::CTEST64mi32, TB_FOLDED_LOAD}, |
| {X86::CTEST64rr, X86::CTEST64mr, TB_FOLDED_LOAD}, |
| {X86::CTEST8ri, X86::CTEST8mi, TB_FOLDED_LOAD}, |
| {X86::CTEST8rr, X86::CTEST8mr, TB_FOLDED_LOAD}, |
| {X86::DIV16r, X86::DIV16m, TB_FOLDED_LOAD}, |
| {X86::DIV16r_NF, X86::DIV16m_NF, TB_FOLDED_LOAD}, |
| {X86::DIV32r, X86::DIV32m, TB_FOLDED_LOAD}, |
| {X86::DIV32r_NF, X86::DIV32m_NF, TB_FOLDED_LOAD}, |
| {X86::DIV64r, X86::DIV64m, TB_FOLDED_LOAD}, |
| {X86::DIV64r_NF, X86::DIV64m_NF, TB_FOLDED_LOAD}, |
| {X86::DIV8r, X86::DIV8m, TB_FOLDED_LOAD}, |
| {X86::DIV8r_NF, X86::DIV8m_NF, TB_FOLDED_LOAD}, |
| {X86::EXTRACTPSrri, X86::EXTRACTPSmri, TB_FOLDED_STORE}, |
| {X86::IDIV16r, X86::IDIV16m, TB_FOLDED_LOAD}, |
| {X86::IDIV16r_NF, X86::IDIV16m_NF, TB_FOLDED_LOAD}, |
| {X86::IDIV32r, X86::IDIV32m, TB_FOLDED_LOAD}, |
| {X86::IDIV32r_NF, X86::IDIV32m_NF, TB_FOLDED_LOAD}, |
| {X86::IDIV64r, X86::IDIV64m, TB_FOLDED_LOAD}, |
| {X86::IDIV64r_NF, X86::IDIV64m_NF, TB_FOLDED_LOAD}, |
| {X86::IDIV8r, X86::IDIV8m, TB_FOLDED_LOAD}, |
| {X86::IDIV8r_NF, X86::IDIV8m_NF, TB_FOLDED_LOAD}, |
| {X86::IMUL16r, X86::IMUL16m, TB_FOLDED_LOAD}, |
| {X86::IMUL16r_NF, X86::IMUL16m_NF, TB_FOLDED_LOAD}, |
| {X86::IMUL32r, X86::IMUL32m, TB_FOLDED_LOAD}, |
| {X86::IMUL32r_NF, X86::IMUL32m_NF, TB_FOLDED_LOAD}, |
| {X86::IMUL64r, X86::IMUL64m, TB_FOLDED_LOAD}, |
| {X86::IMUL64r_NF, X86::IMUL64m_NF, TB_FOLDED_LOAD}, |
| {X86::IMUL8r, X86::IMUL8m, TB_FOLDED_LOAD}, |
| {X86::IMUL8r_NF, X86::IMUL8m_NF, TB_FOLDED_LOAD}, |
| {X86::JMP16r, X86::JMP16m, TB_FOLDED_LOAD}, |
| {X86::JMP16r_NT, X86::JMP16m_NT, TB_FOLDED_LOAD}, |
| {X86::JMP32r, X86::JMP32m, TB_FOLDED_LOAD}, |
| {X86::JMP32r_NT, X86::JMP32m_NT, TB_FOLDED_LOAD}, |
| {X86::JMP64r, X86::JMP64m, TB_FOLDED_LOAD}, |
| {X86::JMP64r_NT, X86::JMP64m_NT, TB_FOLDED_LOAD}, |
| {X86::JMP64r_REX, X86::JMP64m_REX, TB_FOLDED_LOAD}, |
| {X86::LKGS16r, X86::LKGS16m, TB_FOLDED_LOAD}, |
| {X86::MMX_MOVD64from64rr, X86::MMX_MOVQ64mr, TB_FOLDED_STORE}, |
| {X86::MMX_MOVD64grr, X86::MMX_MOVD64mr, TB_FOLDED_STORE}, |
| {X86::MOV16ri, X86::MOV16mi, TB_FOLDED_STORE}, |
| {X86::MOV16rr, X86::MOV16mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE}, |
| {X86::MOV32rr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOV64ri32, X86::MOV64mi32, TB_FOLDED_STORE}, |
| {X86::MOV64rr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOV64toSDrr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOV8ri, X86::MOV8mi, TB_FOLDED_STORE}, |
| {X86::MOV8rr, X86::MOV8mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOV8rr_NOREX, X86::MOV8mr_NOREX, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOVAPDrr, X86::MOVAPDmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::MOVAPSrr, X86::MOVAPSmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::MOVBE16rr, X86::MOVBE16mr_EVEX, TB_FOLDED_STORE}, |
| {X86::MOVBE32rr, X86::MOVBE32mr_EVEX, TB_FOLDED_STORE}, |
| {X86::MOVBE64rr, X86::MOVBE64mr_EVEX, TB_FOLDED_STORE}, |
| {X86::MOVDI2SSrr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOVDQArr, X86::MOVDQAmr, TB_FOLDED_STORE|TB_ALIGN_16}, |
| {X86::MOVDQUrr, X86::MOVDQUmr, TB_FOLDED_STORE}, |
| {X86::MOVPDI2DIrr, X86::MOVPDI2DImr, TB_FOLDED_STORE}, |
| {X86::MOVPQIto64rr, X86::MOVPQI2QImr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOVSDto64rr, X86::MOVSDmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOVSS2DIrr, X86::MOVSSmr, TB_FOLDED_STORE}, |
| {X86::MOVUPDrr, X86::MOVUPDmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MOVUPSrr, X86::MOVUPSmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::MUL16r, X86::MUL16m, TB_FOLDED_LOAD}, |
| {X86::MUL16r_NF, X86::MUL16m_NF, TB_FOLDED_LOAD}, |
| {X86::MUL32r, X86::MUL32m, TB_FOLDED_LOAD}, |
| {X86::MUL32r_NF, X86::MUL32m_NF, TB_FOLDED_LOAD}, |
| {X86::MUL64r, X86::MUL64m, TB_FOLDED_LOAD}, |
| {X86::MUL64r_NF, X86::MUL64m_NF, TB_FOLDED_LOAD}, |
| {X86::MUL8r, X86::MUL8m, TB_FOLDED_LOAD}, |
| {X86::MUL8r_NF, X86::MUL8m_NF, TB_FOLDED_LOAD}, |
| {X86::PEXTRDrri, X86::PEXTRDmri, TB_FOLDED_STORE}, |
| {X86::PEXTRQrri, X86::PEXTRQmri, TB_FOLDED_STORE}, |
| {X86::PTWRITE64r, X86::PTWRITE64m, TB_FOLDED_LOAD}, |
| {X86::PTWRITEr, X86::PTWRITEm, TB_FOLDED_LOAD}, |
| {X86::PUSH16r, X86::PUSH16rmm, TB_FOLDED_LOAD}, |
| {X86::PUSH32r, X86::PUSH32rmm, TB_FOLDED_LOAD}, |
| {X86::PUSH64r, X86::PUSH64rmm, TB_FOLDED_LOAD}, |
| {X86::SETCCr, X86::SETCCm, TB_FOLDED_STORE}, |
| {X86::SETZUCCr, X86::SETZUCCm, TB_FOLDED_STORE}, |
| {X86::TAILJMPr, X86::TAILJMPm, TB_FOLDED_LOAD}, |
| {X86::TAILJMPr64, X86::TAILJMPm64, TB_FOLDED_LOAD}, |
| {X86::TAILJMPr64_REX, X86::TAILJMPm64_REX, TB_FOLDED_LOAD}, |
| {X86::TCRETURNri, X86::TCRETURNmi, TB_FOLDED_LOAD|TB_NO_FORWARD}, |
| {X86::TCRETURNri64, X86::TCRETURNmi64, TB_FOLDED_LOAD|TB_NO_FORWARD}, |
| {X86::TEST16ri, X86::TEST16mi, TB_FOLDED_LOAD}, |
| {X86::TEST16rr, X86::TEST16mr, TB_FOLDED_LOAD}, |
| {X86::TEST32ri, X86::TEST32mi, TB_FOLDED_LOAD}, |
| {X86::TEST32rr, X86::TEST32mr, TB_FOLDED_LOAD}, |
| {X86::TEST64ri32, X86::TEST64mi32, TB_FOLDED_LOAD}, |
| {X86::TEST64rr, X86::TEST64mr, TB_FOLDED_LOAD}, |
| {X86::TEST8ri, X86::TEST8mi, TB_FOLDED_LOAD}, |
| {X86::TEST8rr, X86::TEST8mr, TB_FOLDED_LOAD}, |
| {X86::VCVTPS2PHYrr, X86::VCVTPS2PHYmr, TB_FOLDED_STORE}, |
| {X86::VCVTPS2PHZ256rr, X86::VCVTPS2PHZ256mr, TB_FOLDED_STORE}, |
| {X86::VCVTPS2PHZrr, X86::VCVTPS2PHZmr, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF128rri, X86::VEXTRACTF128mri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF32X4Z256rri, X86::VEXTRACTF32X4Z256mri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF32X4Zrri, X86::VEXTRACTF32X4Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF32X8Zrri, X86::VEXTRACTF32X8Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF64X2Z256rri, X86::VEXTRACTF64X2Z256mri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF64X2Zrri, X86::VEXTRACTF64X2Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTF64X4Zrri, X86::VEXTRACTF64X4Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI128rri, X86::VEXTRACTI128mri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI32X4Z256rri, X86::VEXTRACTI32X4Z256mri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI32X4Zrri, X86::VEXTRACTI32X4Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI32X8Zrri, X86::VEXTRACTI32X8Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI64X2Z256rri, X86::VEXTRACTI64X2Z256mri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI64X2Zrri, X86::VEXTRACTI64X2Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTI64X4Zrri, X86::VEXTRACTI64X4Zmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTPSZrri, X86::VEXTRACTPSZmri, TB_FOLDED_STORE}, |
| {X86::VEXTRACTPSrri, X86::VEXTRACTPSmri, TB_FOLDED_STORE}, |
| {X86::VMOV64toSDZrr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOV64toSDrr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVAPDYrr, X86::VMOVAPDYmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32}, |
| {X86::VMOVAPDZ128rr, X86::VMOVAPDZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::VMOVAPDZ256rr, X86::VMOVAPDZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32}, |
| {X86::VMOVAPDZrr, X86::VMOVAPDZmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64}, |
| {X86::VMOVAPDrr, X86::VMOVAPDmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::VMOVAPSYrr, X86::VMOVAPSYmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32}, |
| {X86::VMOVAPSZ128rr, X86::VMOVAPSZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::VMOVAPSZ256rr, X86::VMOVAPSZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32}, |
| {X86::VMOVAPSZrr, X86::VMOVAPSZmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64}, |
| {X86::VMOVAPSrr, X86::VMOVAPSmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::VMOVDI2SSZrr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDI2SSrr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQA32Z128rr, X86::VMOVDQA32Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::VMOVDQA32Z256rr, X86::VMOVDQA32Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32}, |
| {X86::VMOVDQA32Zrr, X86::VMOVDQA32Zmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64}, |
| {X86::VMOVDQA64Z128rr, X86::VMOVDQA64Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16}, |
| {X86::VMOVDQA64Z256rr, X86::VMOVDQA64Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32}, |
| {X86::VMOVDQA64Zrr, X86::VMOVDQA64Zmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64}, |
| {X86::VMOVDQAYrr, X86::VMOVDQAYmr, TB_FOLDED_STORE|TB_ALIGN_32}, |
| {X86::VMOVDQArr, X86::VMOVDQAmr, TB_FOLDED_STORE|TB_ALIGN_16}, |
| {X86::VMOVDQU16Z128rr, X86::VMOVDQU16Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU16Z256rr, X86::VMOVDQU16Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU16Zrr, X86::VMOVDQU16Zmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU32Z128rr, X86::VMOVDQU32Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU32Z256rr, X86::VMOVDQU32Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU32Zrr, X86::VMOVDQU32Zmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU64Zrr, X86::VMOVDQU64Zmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU8Z128rr, X86::VMOVDQU8Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU8Z256rr, X86::VMOVDQU8Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQU8Zrr, X86::VMOVDQU8Zmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVDQUYrr, X86::VMOVDQUYmr, TB_FOLDED_STORE}, |
| {X86::VMOVDQUrr, X86::VMOVDQUmr, TB_FOLDED_STORE}, |
| {X86::VMOVPDI2DIZrr, X86::VMOVPDI2DIZmr, TB_FOLDED_STORE}, |
| {X86::VMOVPDI2DIrr, X86::VMOVPDI2DImr, TB_FOLDED_STORE}, |
| {X86::VMOVPQIto64Zrr, X86::VMOVPQI2QIZmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVPQIto64rr, X86::VMOVPQI2QImr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVSDto64Zrr, X86::VMOVSDZmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVSDto64rr, X86::VMOVSDmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVSS2DIZrr, X86::VMOVSSZmr, TB_FOLDED_STORE}, |
| {X86::VMOVSS2DIrr, X86::VMOVSSmr, TB_FOLDED_STORE}, |
| {X86::VMOVUPDYrr, X86::VMOVUPDYmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPDZ128rr, X86::VMOVUPDZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPDZ256rr, X86::VMOVUPDZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPDZrr, X86::VMOVUPDZmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPDrr, X86::VMOVUPDmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPSYrr, X86::VMOVUPSYmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPSZ128rr, X86::VMOVUPSZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPSZ256rr, X86::VMOVUPSZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPSZrr, X86::VMOVUPSZmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VMOVUPSrr, X86::VMOVUPSmr, TB_FOLDED_STORE|TB_NO_REVERSE}, |
| {X86::VPEXTRDZrri, X86::VPEXTRDZmri, TB_FOLDED_STORE}, |
| {X86::VPEXTRDrri, X86::VPEXTRDmri, TB_FOLDED_STORE}, |
| {X86::VPEXTRQZrri, X86::VPEXTRQZmri, TB_FOLDED_STORE}, |
| {X86::VPEXTRQrri, X86::VPEXTRQmri, TB_FOLDED_STORE}, |
| {X86::VPMOVDBZrr, X86::VPMOVDBZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVDWZ256rr, X86::VPMOVDWZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVDWZrr, X86::VPMOVDWZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVQDZ256rr, X86::VPMOVQDZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVQDZrr, X86::VPMOVQDZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVQWZrr, X86::VPMOVQWZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVSDBZrr, X86::VPMOVSDBZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVSDWZ256rr, X86::VPMOVSDWZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVSDWZrr, X86::VPMOVSDWZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVSQDZ256rr, X86::VPMOVSQDZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVSQDZrr, X86::VPMOVSQDZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVSQWZrr, X86::VPMOVSQWZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVSWBZ256rr, X86::VPMOVSWBZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVSWBZrr, X86::VPMOVSWBZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSDBZrr, X86::VPMOVUSDBZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSDWZ256rr, X86::VPMOVUSDWZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSDWZrr, X86::VPMOVUSDWZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSQDZ256rr, X86::VPMOVUSQDZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSQDZrr, X86::VPMOVUSQDZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSQWZrr, X86::VPMOVUSQWZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSWBZ256rr, X86::VPMOVUSWBZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVUSWBZrr, X86::VPMOVUSWBZmr, TB_FOLDED_STORE}, |
| {X86::VPMOVWBZ256rr, X86::VPMOVWBZ256mr, TB_FOLDED_STORE}, |
| {X86::VPMOVWBZrr, X86::VPMOVWBZmr, TB_FOLDED_STORE}, |
| }; |
| |
| static const X86FoldTableEntry Table1[] = { |
| {X86::ADC16ri8_ND, X86::ADC16mi8_ND, 0}, |
| {X86::ADC16ri_ND, X86::ADC16mi_ND, 0}, |
| {X86::ADC16rr_ND, X86::ADC16mr_ND, 0}, |
| {X86::ADC32ri8_ND, X86::ADC32mi8_ND, 0}, |
| {X86::ADC32ri_ND, X86::ADC32mi_ND, 0}, |
| {X86::ADC32rr_ND, X86::ADC32mr_ND, 0}, |
| {X86::ADC64ri32_ND, X86::ADC64mi32_ND, 0}, |
| {X86::ADC64ri8_ND, X86::ADC64mi8_ND, 0}, |
| {X86::ADC64rr_ND, X86::ADC64mr_ND, 0}, |
| {X86::ADC8ri_ND, X86::ADC8mi_ND, 0}, |
| {X86::ADC8rr_ND, X86::ADC8mr_ND, 0}, |
| {X86::ADD16ri8_ND, X86::ADD16mi8_ND, 0}, |
| {X86::ADD16ri8_NF_ND, X86::ADD16mi8_NF_ND, 0}, |
| {X86::ADD16ri_ND, X86::ADD16mi_ND, 0}, |
| {X86::ADD16ri_NF_ND, X86::ADD16mi_NF_ND, 0}, |
| {X86::ADD16rr_ND, X86::ADD16mr_ND, 0}, |
| {X86::ADD16rr_NF_ND, X86::ADD16mr_NF_ND, 0}, |
| {X86::ADD32ri8_ND, X86::ADD32mi8_ND, 0}, |
| {X86::ADD32ri8_NF_ND, X86::ADD32mi8_NF_ND, 0}, |
| {X86::ADD32ri_ND, X86::ADD32mi_ND, 0}, |
| {X86::ADD32ri_NF_ND, X86::ADD32mi_NF_ND, 0}, |
| {X86::ADD32rr_ND, X86::ADD32mr_ND, 0}, |
| {X86::ADD32rr_NF_ND, X86::ADD32mr_NF_ND, 0}, |
| {X86::ADD64ri32_ND, X86::ADD64mi32_ND, 0}, |
| {X86::ADD64ri32_NF_ND, X86::ADD64mi32_NF_ND, 0}, |
| {X86::ADD64ri8_ND, X86::ADD64mi8_ND, 0}, |
| {X86::ADD64ri8_NF_ND, X86::ADD64mi8_NF_ND, 0}, |
| {X86::ADD64rr_ND, X86::ADD64mr_ND, 0}, |
| {X86::ADD64rr_NF_ND, X86::ADD64mr_NF_ND, 0}, |
| {X86::ADD8ri_ND, X86::ADD8mi_ND, 0}, |
| {X86::ADD8ri_NF_ND, X86::ADD8mi_NF_ND, 0}, |
| {X86::ADD8rr_ND, X86::ADD8mr_ND, 0}, |
| {X86::ADD8rr_NF_ND, X86::ADD8mr_NF_ND, 0}, |
| {X86::AESIMCrr, X86::AESIMCrm, TB_ALIGN_16}, |
| {X86::AESKEYGENASSIST128rr, X86::AESKEYGENASSIST128rm, TB_ALIGN_16}, |
| {X86::AND16ri8_ND, X86::AND16mi8_ND, 0}, |
| {X86::AND16ri8_NF_ND, X86::AND16mi8_NF_ND, 0}, |
| {X86::AND16ri_ND, X86::AND16mi_ND, 0}, |
| {X86::AND16ri_NF_ND, X86::AND16mi_NF_ND, 0}, |
| {X86::AND16rr_ND, X86::AND16mr_ND, 0}, |
| {X86::AND16rr_NF_ND, X86::AND16mr_NF_ND, 0}, |
| {X86::AND32ri8_ND, X86::AND32mi8_ND, 0}, |
| {X86::AND32ri8_NF_ND, X86::AND32mi8_NF_ND, 0}, |
| {X86::AND32ri_ND, X86::AND32mi_ND, 0}, |
| {X86::AND32ri_NF_ND, X86::AND32mi_NF_ND, 0}, |
| {X86::AND32rr_ND, X86::AND32mr_ND, 0}, |
| {X86::AND32rr_NF_ND, X86::AND32mr_NF_ND, 0}, |
| {X86::AND64ri32_ND, X86::AND64mi32_ND, 0}, |
| {X86::AND64ri32_NF_ND, X86::AND64mi32_NF_ND, 0}, |
| {X86::AND64ri8_ND, X86::AND64mi8_ND, 0}, |
| {X86::AND64ri8_NF_ND, X86::AND64mi8_NF_ND, 0}, |
| {X86::AND64rr_ND, X86::AND64mr_ND, 0}, |
| {X86::AND64rr_NF_ND, X86::AND64mr_NF_ND, 0}, |
| {X86::AND8ri_ND, X86::AND8mi_ND, 0}, |
| {X86::AND8ri_NF_ND, X86::AND8mi_NF_ND, 0}, |
| {X86::AND8rr_ND, X86::AND8mr_ND, 0}, |
| {X86::AND8rr_NF_ND, X86::AND8mr_NF_ND, 0}, |
| {X86::BEXTR32rr, X86::BEXTR32rm, 0}, |
| {X86::BEXTR32rr_EVEX, X86::BEXTR32rm_EVEX, 0}, |
| {X86::BEXTR32rr_NF, X86::BEXTR32rm_NF, 0}, |
| {X86::BEXTR64rr, X86::BEXTR64rm, 0}, |
| {X86::BEXTR64rr_EVEX, X86::BEXTR64rm_EVEX, 0}, |
| {X86::BEXTR64rr_NF, X86::BEXTR64rm_NF, 0}, |
| {X86::BEXTRI32ri, X86::BEXTRI32mi, 0}, |
| {X86::BEXTRI64ri, X86::BEXTRI64mi, 0}, |
| {X86::BLCFILL32rr, X86::BLCFILL32rm, 0}, |
| {X86::BLCFILL64rr, X86::BLCFILL64rm, 0}, |
| {X86::BLCI32rr, X86::BLCI32rm, 0}, |
| {X86::BLCI64rr, X86::BLCI64rm, 0}, |
| {X86::BLCIC32rr, X86::BLCIC32rm, 0}, |
| {X86::BLCIC64rr, X86::BLCIC64rm, 0}, |
| {X86::BLCMSK32rr, X86::BLCMSK32rm, 0}, |
| {X86::BLCMSK64rr, X86::BLCMSK64rm, 0}, |
| {X86::BLCS32rr, X86::BLCS32rm, 0}, |
| {X86::BLCS64rr, X86::BLCS64rm, 0}, |
| {X86::BLSFILL32rr, X86::BLSFILL32rm, 0}, |
| {X86::BLSFILL64rr, X86::BLSFILL64rm, 0}, |
| {X86::BLSI32rr, X86::BLSI32rm, 0}, |
| {X86::BLSI32rr_EVEX, X86::BLSI32rm_EVEX, 0}, |
| {X86::BLSI32rr_NF, X86::BLSI32rm_NF, 0}, |
| {X86::BLSI64rr, X86::BLSI64rm, 0}, |
| {X86::BLSI64rr_EVEX, X86::BLSI64rm_EVEX, 0}, |
| {X86::BLSI64rr_NF, X86::BLSI64rm_NF, 0}, |
| {X86::BLSIC32rr, X86::BLSIC32rm, 0}, |
| {X86::BLSIC64rr, X86::BLSIC64rm, 0}, |
| {X86::BLSMSK32rr, X86::BLSMSK32rm, 0}, |
| {X86::BLSMSK32rr_EVEX, X86::BLSMSK32rm_EVEX, 0}, |
| {X86::BLSMSK32rr_NF, X86::BLSMSK32rm_NF, 0}, |
| {X86::BLSMSK64rr, X86::BLSMSK64rm, 0}, |
| {X86::BLSMSK64rr_EVEX, X86::BLSMSK64rm_EVEX, 0}, |
| {X86::BLSMSK64rr_NF, X86::BLSMSK64rm_NF, 0}, |
| {X86::BLSR32rr, X86::BLSR32rm, 0}, |
| {X86::BLSR32rr_EVEX, X86::BLSR32rm_EVEX, 0}, |
| {X86::BLSR32rr_NF, X86::BLSR32rm_NF, 0}, |
| {X86::BLSR64rr, X86::BLSR64rm, 0}, |
| {X86::BLSR64rr_EVEX, X86::BLSR64rm_EVEX, 0}, |
| {X86::BLSR64rr_NF, X86::BLSR64rm_NF, 0}, |
| {X86::BSF16rr, X86::BSF16rm, 0}, |
| {X86::BSF32rr, X86::BSF32rm, 0}, |
| {X86::BSF64rr, X86::BSF64rm, 0}, |
| {X86::BSR16rr, X86::BSR16rm, 0}, |
| {X86::BSR32rr, X86::BSR32rm, 0}, |
| {X86::BSR64rr, X86::BSR64rm, 0}, |
| {X86::BZHI32rr, X86::BZHI32rm, 0}, |
| {X86::BZHI32rr_EVEX, X86::BZHI32rm_EVEX, 0}, |
| {X86::BZHI32rr_NF, X86::BZHI32rm_NF, 0}, |
| {X86::BZHI64rr, X86::BZHI64rm, 0}, |
| {X86::BZHI64rr_EVEX, X86::BZHI64rm_EVEX, 0}, |
| {X86::BZHI64rr_NF, X86::BZHI64rm_NF, 0}, |
| {X86::CCMP16rr, X86::CCMP16rm, 0}, |
| {X86::CCMP32rr, X86::CCMP32rm, 0}, |
| {X86::CCMP64rr, X86::CCMP64rm, 0}, |
| {X86::CCMP8rr, X86::CCMP8rm, 0}, |
| {X86::CMP16rr, X86::CMP16rm, 0}, |
| {X86::CMP32rr, X86::CMP32rm, 0}, |
| {X86::CMP64rr, X86::CMP64rm, 0}, |
| {X86::CMP8rr, X86::CMP8rm, 0}, |
| {X86::COMISDrr, X86::COMISDrm, 0}, |
| {X86::COMISDrr_Int, X86::COMISDrm_Int, TB_NO_REVERSE}, |
| {X86::COMISSrr, X86::COMISSrm, 0}, |
| {X86::COMISSrr_Int, X86::COMISSrm_Int, TB_NO_REVERSE}, |
| {X86::CVTDQ2PDrr, X86::CVTDQ2PDrm, TB_NO_REVERSE}, |
| {X86::CVTDQ2PSrr, X86::CVTDQ2PSrm, TB_ALIGN_16}, |
| {X86::CVTPD2DQrr, X86::CVTPD2DQrm, TB_ALIGN_16}, |
| {X86::CVTPD2PSrr, X86::CVTPD2PSrm, TB_ALIGN_16}, |
| {X86::CVTPS2DQrr, X86::CVTPS2DQrm, TB_ALIGN_16}, |
| {X86::CVTPS2PDrr, X86::CVTPS2PDrm, TB_NO_REVERSE}, |
| {X86::CVTSD2SI64rr, X86::CVTSD2SI64rm, 0}, |
| {X86::CVTSD2SI64rr_Int, X86::CVTSD2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::CVTSD2SIrr, X86::CVTSD2SIrm, 0}, |
| {X86::CVTSD2SIrr_Int, X86::CVTSD2SIrm_Int, TB_NO_REVERSE}, |
| {X86::CVTSD2SSrr, X86::CVTSD2SSrm, 0}, |
| {X86::CVTSI2SDrr, X86::CVTSI2SDrm, 0}, |
| {X86::CVTSI2SSrr, X86::CVTSI2SSrm, 0}, |
| {X86::CVTSI642SDrr, X86::CVTSI642SDrm, 0}, |
| {X86::CVTSI642SSrr, X86::CVTSI642SSrm, 0}, |
| {X86::CVTSS2SDrr, X86::CVTSS2SDrm, 0}, |
| {X86::CVTSS2SI64rr, X86::CVTSS2SI64rm, 0}, |
| {X86::CVTSS2SI64rr_Int, X86::CVTSS2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::CVTSS2SIrr, X86::CVTSS2SIrm, 0}, |
| {X86::CVTSS2SIrr_Int, X86::CVTSS2SIrm_Int, TB_NO_REVERSE}, |
| {X86::CVTTPD2DQrr, X86::CVTTPD2DQrm, TB_ALIGN_16}, |
| {X86::CVTTPS2DQrr, X86::CVTTPS2DQrm, TB_ALIGN_16}, |
| {X86::CVTTSD2SI64rr, X86::CVTTSD2SI64rm, 0}, |
| {X86::CVTTSD2SI64rr_Int, X86::CVTTSD2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::CVTTSD2SIrr, X86::CVTTSD2SIrm, 0}, |
| {X86::CVTTSD2SIrr_Int, X86::CVTTSD2SIrm_Int, TB_NO_REVERSE}, |
| {X86::CVTTSS2SI64rr, X86::CVTTSS2SI64rm, 0}, |
| {X86::CVTTSS2SI64rr_Int, X86::CVTTSS2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::CVTTSS2SIrr, X86::CVTTSS2SIrm, 0}, |
| {X86::CVTTSS2SIrr_Int, X86::CVTTSS2SIrm_Int, TB_NO_REVERSE}, |
| {X86::DEC16r_ND, X86::DEC16m_ND, 0}, |
| {X86::DEC16r_NF_ND, X86::DEC16m_NF_ND, 0}, |
| {X86::DEC32r_ND, X86::DEC32m_ND, 0}, |
| {X86::DEC32r_NF_ND, X86::DEC32m_NF_ND, 0}, |
| {X86::DEC64r_ND, X86::DEC64m_ND, 0}, |
| {X86::DEC64r_NF_ND, X86::DEC64m_NF_ND, 0}, |
| {X86::DEC8r_ND, X86::DEC8m_ND, 0}, |
| {X86::DEC8r_NF_ND, X86::DEC8m_NF_ND, 0}, |
| {X86::IMUL16rri, X86::IMUL16rmi, 0}, |
| {X86::IMUL16rri8, X86::IMUL16rmi8, 0}, |
| {X86::IMUL16rri8_NF, X86::IMUL16rmi8_NF, 0}, |
| {X86::IMUL16rri_NF, X86::IMUL16rmi_NF, 0}, |
| {X86::IMUL32rri, X86::IMUL32rmi, 0}, |
| {X86::IMUL32rri8, X86::IMUL32rmi8, 0}, |
| {X86::IMUL32rri8_NF, X86::IMUL32rmi8_NF, 0}, |
| {X86::IMUL32rri_NF, X86::IMUL32rmi_NF, 0}, |
| {X86::IMUL64rri32, X86::IMUL64rmi32, 0}, |
| {X86::IMUL64rri32_NF, X86::IMUL64rmi32_NF, 0}, |
| {X86::IMUL64rri8, X86::IMUL64rmi8, 0}, |
| {X86::IMUL64rri8_NF, X86::IMUL64rmi8_NF, 0}, |
| {X86::IMULZU16rri, X86::IMULZU16rmi, 0}, |
| {X86::IMULZU16rri8, X86::IMULZU16rmi8, 0}, |
| {X86::IMULZU32rri, X86::IMULZU32rmi, 0}, |
| {X86::IMULZU32rri8, X86::IMULZU32rmi8, 0}, |
| {X86::IMULZU64rri32, X86::IMULZU64rmi32, 0}, |
| {X86::IMULZU64rri8, X86::IMULZU64rmi8, 0}, |
| {X86::INC16r_ND, X86::INC16m_ND, 0}, |
| {X86::INC16r_NF_ND, X86::INC16m_NF_ND, 0}, |
| {X86::INC32r_ND, X86::INC32m_ND, 0}, |
| {X86::INC32r_NF_ND, X86::INC32m_NF_ND, 0}, |
| {X86::INC64r_ND, X86::INC64m_ND, 0}, |
| {X86::INC64r_NF_ND, X86::INC64m_NF_ND, 0}, |
| {X86::INC8r_ND, X86::INC8m_ND, 0}, |
| {X86::INC8r_NF_ND, X86::INC8m_NF_ND, 0}, |
| {X86::KMOVBkk, X86::KMOVBkm, TB_NO_REVERSE}, |
| {X86::KMOVBkk_EVEX, X86::KMOVBkm_EVEX, TB_NO_REVERSE}, |
| {X86::KMOVDkk, X86::KMOVDkm, 0}, |
| {X86::KMOVDkk_EVEX, X86::KMOVDkm_EVEX, 0}, |
| {X86::KMOVQkk, X86::KMOVQkm, 0}, |
| {X86::KMOVQkk_EVEX, X86::KMOVQkm_EVEX, 0}, |
| {X86::KMOVWkk, X86::KMOVWkm, 0}, |
| {X86::KMOVWkk_EVEX, X86::KMOVWkm_EVEX, 0}, |
| {X86::LWPINS32rri, X86::LWPINS32rmi, 0}, |
| {X86::LWPINS64rri, X86::LWPINS64rmi, 0}, |
| {X86::LWPVAL32rri, X86::LWPVAL32rmi, 0}, |
| {X86::LWPVAL64rri, X86::LWPVAL64rmi, 0}, |
| {X86::LZCNT16rr, X86::LZCNT16rm, 0}, |
| {X86::LZCNT16rr_NF, X86::LZCNT16rm_NF, 0}, |
| {X86::LZCNT32rr, X86::LZCNT32rm, 0}, |
| {X86::LZCNT32rr_NF, X86::LZCNT32rm_NF, 0}, |
| {X86::LZCNT64rr, X86::LZCNT64rm, 0}, |
| {X86::LZCNT64rr_NF, X86::LZCNT64rm_NF, 0}, |
| {X86::MMX_CVTPD2PIrr, X86::MMX_CVTPD2PIrm, TB_ALIGN_16}, |
| {X86::MMX_CVTPI2PDrr, X86::MMX_CVTPI2PDrm, 0}, |
| {X86::MMX_CVTPS2PIrr, X86::MMX_CVTPS2PIrm, TB_NO_REVERSE}, |
| {X86::MMX_CVTTPD2PIrr, X86::MMX_CVTTPD2PIrm, TB_ALIGN_16}, |
| {X86::MMX_CVTTPS2PIrr, X86::MMX_CVTTPS2PIrm, TB_NO_REVERSE}, |
| {X86::MMX_MOVD64rr, X86::MMX_MOVD64rm, 0}, |
| {X86::MMX_MOVD64to64rr, X86::MMX_MOVQ64rm, 0}, |
| {X86::MMX_PABSBrr, X86::MMX_PABSBrm, 0}, |
| {X86::MMX_PABSDrr, X86::MMX_PABSDrm, 0}, |
| {X86::MMX_PABSWrr, X86::MMX_PABSWrm, 0}, |
| {X86::MMX_PSHUFWri, X86::MMX_PSHUFWmi, 0}, |
| {X86::MOV16rr, X86::MOV16rm, 0}, |
| {X86::MOV32rr, X86::MOV32rm, 0}, |
| {X86::MOV64rr, X86::MOV64rm, 0}, |
| {X86::MOV64toPQIrr, X86::MOVQI2PQIrm, TB_NO_REVERSE}, |
| {X86::MOV64toSDrr, X86::MOVSDrm_alt, TB_NO_REVERSE}, |
| {X86::MOV8rr, X86::MOV8rm, 0}, |
| {X86::MOVAPDrr, X86::MOVAPDrm, TB_ALIGN_16}, |
| {X86::MOVAPSrr, X86::MOVAPSrm, TB_ALIGN_16}, |
| {X86::MOVBE16rr, X86::MOVBE16rm_EVEX, 0}, |
| {X86::MOVBE32rr, X86::MOVBE32rm_EVEX, 0}, |
| {X86::MOVBE64rr, X86::MOVBE64rm_EVEX, 0}, |
| {X86::MOVDDUPrr, X86::MOVDDUPrm, TB_NO_REVERSE}, |
| {X86::MOVDI2PDIrr, X86::MOVDI2PDIrm, 0}, |
| {X86::MOVDI2SSrr, X86::MOVSSrm_alt, 0}, |
| {X86::MOVDQArr, X86::MOVDQArm, TB_ALIGN_16}, |
| {X86::MOVDQUrr, X86::MOVDQUrm, 0}, |
| {X86::MOVSHDUPrr, X86::MOVSHDUPrm, TB_ALIGN_16}, |
| {X86::MOVSLDUPrr, X86::MOVSLDUPrm, TB_ALIGN_16}, |
| {X86::MOVSX16rr32, X86::MOVSX16rm32, 0}, |
| {X86::MOVSX16rr8, X86::MOVSX16rm8, 0}, |
| {X86::MOVSX32rr16, X86::MOVSX32rm16, 0}, |
| {X86::MOVSX32rr32, X86::MOVSX32rm32, 0}, |
| {X86::MOVSX32rr8, X86::MOVSX32rm8, 0}, |
| {X86::MOVSX32rr8_NOREX, X86::MOVSX32rm8_NOREX, 0}, |
| {X86::MOVSX64rr16, X86::MOVSX64rm16, 0}, |
| {X86::MOVSX64rr32, X86::MOVSX64rm32, 0}, |
| {X86::MOVSX64rr8, X86::MOVSX64rm8, 0}, |
| {X86::MOVUPDrr, X86::MOVUPDrm, 0}, |
| {X86::MOVUPSrr, X86::MOVUPSrm, 0}, |
| {X86::MOVZPQILo2PQIrr, X86::MOVQI2PQIrm, TB_NO_REVERSE}, |
| {X86::MOVZX16rr8, X86::MOVZX16rm8, 0}, |
| {X86::MOVZX32rr16, X86::MOVZX32rm16, 0}, |
| {X86::MOVZX32rr8, X86::MOVZX32rm8, 0}, |
| {X86::MOVZX32rr8_NOREX, X86::MOVZX32rm8_NOREX, 0}, |
| {X86::MOVZX64rr16, X86::MOVZX64rm16, 0}, |
| {X86::MOVZX64rr8, X86::MOVZX64rm8, 0}, |
| {X86::NEG16r_ND, X86::NEG16m_ND, 0}, |
| {X86::NEG16r_NF_ND, X86::NEG16m_NF_ND, 0}, |
| {X86::NEG32r_ND, X86::NEG32m_ND, 0}, |
| {X86::NEG32r_NF_ND, X86::NEG32m_NF_ND, 0}, |
| {X86::NEG64r_ND, X86::NEG64m_ND, 0}, |
| {X86::NEG64r_NF_ND, X86::NEG64m_NF_ND, 0}, |
| {X86::NEG8r_ND, X86::NEG8m_ND, 0}, |
| {X86::NEG8r_NF_ND, X86::NEG8m_NF_ND, 0}, |
| {X86::NOT16r_ND, X86::NOT16m_ND, 0}, |
| {X86::NOT32r_ND, X86::NOT32m_ND, 0}, |
| {X86::NOT64r_ND, X86::NOT64m_ND, 0}, |
| {X86::NOT8r_ND, X86::NOT8m_ND, 0}, |
| {X86::OR16ri8_ND, X86::OR16mi8_ND, 0}, |
| {X86::OR16ri8_NF_ND, X86::OR16mi8_NF_ND, 0}, |
| {X86::OR16ri_ND, X86::OR16mi_ND, 0}, |
| {X86::OR16ri_NF_ND, X86::OR16mi_NF_ND, 0}, |
| {X86::OR16rr_ND, X86::OR16mr_ND, 0}, |
| {X86::OR16rr_NF_ND, X86::OR16mr_NF_ND, 0}, |
| {X86::OR32ri8_ND, X86::OR32mi8_ND, 0}, |
| {X86::OR32ri8_NF_ND, X86::OR32mi8_NF_ND, 0}, |
| {X86::OR32ri_ND, X86::OR32mi_ND, 0}, |
| {X86::OR32ri_NF_ND, X86::OR32mi_NF_ND, 0}, |
| {X86::OR32rr_ND, X86::OR32mr_ND, 0}, |
| {X86::OR32rr_NF_ND, X86::OR32mr_NF_ND, 0}, |
| {X86::OR64ri32_ND, X86::OR64mi32_ND, 0}, |
| {X86::OR64ri32_NF_ND, X86::OR64mi32_NF_ND, 0}, |
| {X86::OR64ri8_ND, X86::OR64mi8_ND, 0}, |
| {X86::OR64ri8_NF_ND, X86::OR64mi8_NF_ND, 0}, |
| {X86::OR64rr_ND, X86::OR64mr_ND, 0}, |
| {X86::OR64rr_NF_ND, X86::OR64mr_NF_ND, 0}, |
| {X86::OR8ri_ND, X86::OR8mi_ND, 0}, |
| {X86::OR8ri_NF_ND, X86::OR8mi_NF_ND, 0}, |
| {X86::OR8rr_ND, X86::OR8mr_ND, 0}, |
| {X86::OR8rr_NF_ND, X86::OR8mr_NF_ND, 0}, |
| {X86::PABSBrr, X86::PABSBrm, TB_ALIGN_16}, |
| {X86::PABSDrr, X86::PABSDrm, TB_ALIGN_16}, |
| {X86::PABSWrr, X86::PABSWrm, TB_ALIGN_16}, |
| {X86::PCMPESTRIrri, X86::PCMPESTRIrmi, 0}, |
| {X86::PCMPESTRMrri, X86::PCMPESTRMrmi, 0}, |
| {X86::PCMPISTRIrri, X86::PCMPISTRIrmi, 0}, |
| {X86::PCMPISTRMrri, X86::PCMPISTRMrmi, 0}, |
| {X86::PF2IDrr, X86::PF2IDrm, 0}, |
| {X86::PF2IWrr, X86::PF2IWrm, 0}, |
| {X86::PFRCPrr, X86::PFRCPrm, 0}, |
| {X86::PFRSQRTrr, X86::PFRSQRTrm, 0}, |
| {X86::PHMINPOSUWrr, X86::PHMINPOSUWrm, TB_ALIGN_16}, |
| {X86::PI2FDrr, X86::PI2FDrm, 0}, |
| {X86::PI2FWrr, X86::PI2FWrm, 0}, |
| {X86::PMOVSXBDrr, X86::PMOVSXBDrm, TB_NO_REVERSE}, |
| {X86::PMOVSXBQrr, X86::PMOVSXBQrm, TB_NO_REVERSE}, |
| {X86::PMOVSXBWrr, X86::PMOVSXBWrm, TB_NO_REVERSE}, |
| {X86::PMOVSXDQrr, X86::PMOVSXDQrm, TB_NO_REVERSE}, |
| {X86::PMOVSXWDrr, X86::PMOVSXWDrm, TB_NO_REVERSE}, |
| {X86::PMOVSXWQrr, X86::PMOVSXWQrm, TB_NO_REVERSE}, |
| {X86::PMOVZXBDrr, X86::PMOVZXBDrm, TB_NO_REVERSE}, |
| {X86::PMOVZXBQrr, X86::PMOVZXBQrm, TB_NO_REVERSE}, |
| {X86::PMOVZXBWrr, X86::PMOVZXBWrm, TB_NO_REVERSE}, |
| {X86::PMOVZXDQrr, X86::PMOVZXDQrm, TB_NO_REVERSE}, |
| {X86::PMOVZXWDrr, X86::PMOVZXWDrm, TB_NO_REVERSE}, |
| {X86::PMOVZXWQrr, X86::PMOVZXWQrm, TB_NO_REVERSE}, |
| {X86::POPCNT16rr, X86::POPCNT16rm, 0}, |
| {X86::POPCNT16rr_NF, X86::POPCNT16rm_NF, 0}, |
| {X86::POPCNT32rr, X86::POPCNT32rm, 0}, |
| {X86::POPCNT32rr_NF, X86::POPCNT32rm_NF, 0}, |
| {X86::POPCNT64rr, X86::POPCNT64rm, 0}, |
| {X86::POPCNT64rr_NF, X86::POPCNT64rm_NF, 0}, |
| {X86::PSHUFDri, X86::PSHUFDmi, TB_ALIGN_16}, |
| {X86::PSHUFHWri, X86::PSHUFHWmi, TB_ALIGN_16}, |
| {X86::PSHUFLWri, X86::PSHUFLWmi, TB_ALIGN_16}, |
| {X86::PSWAPDrr, X86::PSWAPDrm, 0}, |
| {X86::PTESTrr, X86::PTESTrm, TB_ALIGN_16}, |
| {X86::RCL16r1_ND, X86::RCL16m1_ND, 0}, |
| {X86::RCL16rCL_ND, X86::RCL16mCL_ND, 0}, |
| {X86::RCL16ri_ND, X86::RCL16mi_ND, 0}, |
| {X86::RCL32r1_ND, X86::RCL32m1_ND, 0}, |
| {X86::RCL32rCL_ND, X86::RCL32mCL_ND, 0}, |
| {X86::RCL32ri_ND, X86::RCL32mi_ND, 0}, |
| {X86::RCL64r1_ND, X86::RCL64m1_ND, 0}, |
| {X86::RCL64rCL_ND, X86::RCL64mCL_ND, 0}, |
| {X86::RCL64ri_ND, X86::RCL64mi_ND, 0}, |
| {X86::RCL8r1_ND, X86::RCL8m1_ND, 0}, |
| {X86::RCL8rCL_ND, X86::RCL8mCL_ND, 0}, |
| {X86::RCL8ri_ND, X86::RCL8mi_ND, 0}, |
| {X86::RCPPSr, X86::RCPPSm, TB_ALIGN_16}, |
| {X86::RCPSSr, X86::RCPSSm, 0}, |
| {X86::RCR16r1_ND, X86::RCR16m1_ND, 0}, |
| {X86::RCR16rCL_ND, X86::RCR16mCL_ND, 0}, |
| {X86::RCR16ri_ND, X86::RCR16mi_ND, 0}, |
| {X86::RCR32r1_ND, X86::RCR32m1_ND, 0}, |
| {X86::RCR32rCL_ND, X86::RCR32mCL_ND, 0}, |
| {X86::RCR32ri_ND, X86::RCR32mi_ND, 0}, |
| {X86::RCR64r1_ND, X86::RCR64m1_ND, 0}, |
| {X86::RCR64rCL_ND, X86::RCR64mCL_ND, 0}, |
| {X86::RCR64ri_ND, X86::RCR64mi_ND, 0}, |
| {X86::RCR8r1_ND, X86::RCR8m1_ND, 0}, |
| {X86::RCR8rCL_ND, X86::RCR8mCL_ND, 0}, |
| {X86::RCR8ri_ND, X86::RCR8mi_ND, 0}, |
| {X86::ROL16r1_ND, X86::ROL16m1_ND, 0}, |
| {X86::ROL16r1_NF_ND, X86::ROL16m1_NF_ND, 0}, |
| {X86::ROL16rCL_ND, X86::ROL16mCL_ND, 0}, |
| {X86::ROL16rCL_NF_ND, X86::ROL16mCL_NF_ND, 0}, |
| {X86::ROL16ri_ND, X86::ROL16mi_ND, 0}, |
| {X86::ROL16ri_NF_ND, X86::ROL16mi_NF_ND, 0}, |
| {X86::ROL32r1_ND, X86::ROL32m1_ND, 0}, |
| {X86::ROL32r1_NF_ND, X86::ROL32m1_NF_ND, 0}, |
| {X86::ROL32rCL_ND, X86::ROL32mCL_ND, 0}, |
| {X86::ROL32rCL_NF_ND, X86::ROL32mCL_NF_ND, 0}, |
| {X86::ROL32ri_ND, X86::ROL32mi_ND, 0}, |
| {X86::ROL32ri_NF_ND, X86::ROL32mi_NF_ND, 0}, |
| {X86::ROL64r1_ND, X86::ROL64m1_ND, 0}, |
| {X86::ROL64r1_NF_ND, X86::ROL64m1_NF_ND, 0}, |
| {X86::ROL64rCL_ND, X86::ROL64mCL_ND, 0}, |
| {X86::ROL64rCL_NF_ND, X86::ROL64mCL_NF_ND, 0}, |
| {X86::ROL64ri_ND, X86::ROL64mi_ND, 0}, |
| {X86::ROL64ri_NF_ND, X86::ROL64mi_NF_ND, 0}, |
| {X86::ROL8r1_ND, X86::ROL8m1_ND, 0}, |
| {X86::ROL8r1_NF_ND, X86::ROL8m1_NF_ND, 0}, |
| {X86::ROL8rCL_ND, X86::ROL8mCL_ND, 0}, |
| {X86::ROL8rCL_NF_ND, X86::ROL8mCL_NF_ND, 0}, |
| {X86::ROL8ri_ND, X86::ROL8mi_ND, 0}, |
| {X86::ROL8ri_NF_ND, X86::ROL8mi_NF_ND, 0}, |
| {X86::ROR16r1_ND, X86::ROR16m1_ND, 0}, |
| {X86::ROR16r1_NF_ND, X86::ROR16m1_NF_ND, 0}, |
| {X86::ROR16rCL_ND, X86::ROR16mCL_ND, 0}, |
| {X86::ROR16rCL_NF_ND, X86::ROR16mCL_NF_ND, 0}, |
| {X86::ROR16ri_ND, X86::ROR16mi_ND, 0}, |
| {X86::ROR16ri_NF_ND, X86::ROR16mi_NF_ND, 0}, |
| {X86::ROR32r1_ND, X86::ROR32m1_ND, 0}, |
| {X86::ROR32r1_NF_ND, X86::ROR32m1_NF_ND, 0}, |
| {X86::ROR32rCL_ND, X86::ROR32mCL_ND, 0}, |
| {X86::ROR32rCL_NF_ND, X86::ROR32mCL_NF_ND, 0}, |
| {X86::ROR32ri_ND, X86::ROR32mi_ND, 0}, |
| {X86::ROR32ri_NF_ND, X86::ROR32mi_NF_ND, 0}, |
| {X86::ROR64r1_ND, X86::ROR64m1_ND, 0}, |
| {X86::ROR64r1_NF_ND, X86::ROR64m1_NF_ND, 0}, |
| {X86::ROR64rCL_ND, X86::ROR64mCL_ND, 0}, |
| {X86::ROR64rCL_NF_ND, X86::ROR64mCL_NF_ND, 0}, |
| {X86::ROR64ri_ND, X86::ROR64mi_ND, 0}, |
| {X86::ROR64ri_NF_ND, X86::ROR64mi_NF_ND, 0}, |
| {X86::ROR8r1_ND, X86::ROR8m1_ND, 0}, |
| {X86::ROR8r1_NF_ND, X86::ROR8m1_NF_ND, 0}, |
| {X86::ROR8rCL_ND, X86::ROR8mCL_ND, 0}, |
| {X86::ROR8rCL_NF_ND, X86::ROR8mCL_NF_ND, 0}, |
| {X86::ROR8ri_ND, X86::ROR8mi_ND, 0}, |
| {X86::ROR8ri_NF_ND, X86::ROR8mi_NF_ND, 0}, |
| {X86::RORX32ri, X86::RORX32mi, 0}, |
| {X86::RORX32ri_EVEX, X86::RORX32mi_EVEX, 0}, |
| {X86::RORX64ri, X86::RORX64mi, 0}, |
| {X86::RORX64ri_EVEX, X86::RORX64mi_EVEX, 0}, |
| {X86::ROUNDPDri, X86::ROUNDPDmi, TB_ALIGN_16}, |
| {X86::ROUNDPSri, X86::ROUNDPSmi, TB_ALIGN_16}, |
| {X86::ROUNDSDri, X86::ROUNDSDmi, 0}, |
| {X86::ROUNDSSri, X86::ROUNDSSmi, 0}, |
| {X86::RSQRTPSr, X86::RSQRTPSm, TB_ALIGN_16}, |
| {X86::RSQRTSSr, X86::RSQRTSSm, 0}, |
| {X86::SAR16r1_ND, X86::SAR16m1_ND, 0}, |
| {X86::SAR16r1_NF_ND, X86::SAR16m1_NF_ND, 0}, |
| {X86::SAR16rCL_ND, X86::SAR16mCL_ND, 0}, |
| {X86::SAR16rCL_NF_ND, X86::SAR16mCL_NF_ND, 0}, |
| {X86::SAR16ri_ND, X86::SAR16mi_ND, 0}, |
| {X86::SAR16ri_NF_ND, X86::SAR16mi_NF_ND, 0}, |
| {X86::SAR32r1_ND, X86::SAR32m1_ND, 0}, |
| {X86::SAR32r1_NF_ND, X86::SAR32m1_NF_ND, 0}, |
| {X86::SAR32rCL_ND, X86::SAR32mCL_ND, 0}, |
| {X86::SAR32rCL_NF_ND, X86::SAR32mCL_NF_ND, 0}, |
| {X86::SAR32ri_ND, X86::SAR32mi_ND, 0}, |
| {X86::SAR32ri_NF_ND, X86::SAR32mi_NF_ND, 0}, |
| {X86::SAR64r1_ND, X86::SAR64m1_ND, 0}, |
| {X86::SAR64r1_NF_ND, X86::SAR64m1_NF_ND, 0}, |
| {X86::SAR64rCL_ND, X86::SAR64mCL_ND, 0}, |
| {X86::SAR64rCL_NF_ND, X86::SAR64mCL_NF_ND, 0}, |
| {X86::SAR64ri_ND, X86::SAR64mi_ND, 0}, |
| {X86::SAR64ri_NF_ND, X86::SAR64mi_NF_ND, 0}, |
| {X86::SAR8r1_ND, X86::SAR8m1_ND, 0}, |
| {X86::SAR8r1_NF_ND, X86::SAR8m1_NF_ND, 0}, |
| {X86::SAR8rCL_ND, X86::SAR8mCL_ND, 0}, |
| {X86::SAR8rCL_NF_ND, X86::SAR8mCL_NF_ND, 0}, |
| {X86::SAR8ri_ND, X86::SAR8mi_ND, 0}, |
| {X86::SAR8ri_NF_ND, X86::SAR8mi_NF_ND, 0}, |
| {X86::SARX32rr, X86::SARX32rm, 0}, |
| {X86::SARX32rr_EVEX, X86::SARX32rm_EVEX, 0}, |
| {X86::SARX64rr, X86::SARX64rm, 0}, |
| {X86::SARX64rr_EVEX, X86::SARX64rm_EVEX, 0}, |
| {X86::SBB16ri8_ND, X86::SBB16mi8_ND, 0}, |
| {X86::SBB16ri_ND, X86::SBB16mi_ND, 0}, |
| {X86::SBB16rr_ND, X86::SBB16mr_ND, 0}, |
| {X86::SBB32ri8_ND, X86::SBB32mi8_ND, 0}, |
| {X86::SBB32ri_ND, X86::SBB32mi_ND, 0}, |
| {X86::SBB32rr_ND, X86::SBB32mr_ND, 0}, |
| {X86::SBB64ri32_ND, X86::SBB64mi32_ND, 0}, |
| {X86::SBB64ri8_ND, X86::SBB64mi8_ND, 0}, |
| {X86::SBB64rr_ND, X86::SBB64mr_ND, 0}, |
| {X86::SBB8ri_ND, X86::SBB8mi_ND, 0}, |
| {X86::SBB8rr_ND, X86::SBB8mr_ND, 0}, |
| {X86::SHL16r1_ND, X86::SHL16m1_ND, 0}, |
| {X86::SHL16r1_NF_ND, X86::SHL16m1_NF_ND, 0}, |
| {X86::SHL16rCL_ND, X86::SHL16mCL_ND, 0}, |
| {X86::SHL16rCL_NF_ND, X86::SHL16mCL_NF_ND, 0}, |
| {X86::SHL16ri_ND, X86::SHL16mi_ND, 0}, |
| {X86::SHL16ri_NF_ND, X86::SHL16mi_NF_ND, 0}, |
| {X86::SHL32r1_ND, X86::SHL32m1_ND, 0}, |
| {X86::SHL32r1_NF_ND, X86::SHL32m1_NF_ND, 0}, |
| {X86::SHL32rCL_ND, X86::SHL32mCL_ND, 0}, |
| {X86::SHL32rCL_NF_ND, X86::SHL32mCL_NF_ND, 0}, |
| {X86::SHL32ri_ND, X86::SHL32mi_ND, 0}, |
| {X86::SHL32ri_NF_ND, X86::SHL32mi_NF_ND, 0}, |
| {X86::SHL64r1_ND, X86::SHL64m1_ND, 0}, |
| {X86::SHL64r1_NF_ND, X86::SHL64m1_NF_ND, 0}, |
| {X86::SHL64rCL_ND, X86::SHL64mCL_ND, 0}, |
| {X86::SHL64rCL_NF_ND, X86::SHL64mCL_NF_ND, 0}, |
| {X86::SHL64ri_ND, X86::SHL64mi_ND, 0}, |
| {X86::SHL64ri_NF_ND, X86::SHL64mi_NF_ND, 0}, |
| {X86::SHL8r1_ND, X86::SHL8m1_ND, 0}, |
| {X86::SHL8r1_NF_ND, X86::SHL8m1_NF_ND, 0}, |
| {X86::SHL8rCL_ND, X86::SHL8mCL_ND, 0}, |
| {X86::SHL8rCL_NF_ND, X86::SHL8mCL_NF_ND, 0}, |
| {X86::SHL8ri_ND, X86::SHL8mi_ND, 0}, |
| {X86::SHL8ri_NF_ND, X86::SHL8mi_NF_ND, 0}, |
| {X86::SHLD16rrCL_ND, X86::SHLD16mrCL_ND, 0}, |
| {X86::SHLD16rrCL_NF_ND, X86::SHLD16mrCL_NF_ND, 0}, |
| {X86::SHLD16rri8_ND, X86::SHLD16mri8_ND, 0}, |
| {X86::SHLD16rri8_NF_ND, X86::SHLD16mri8_NF_ND, 0}, |
| {X86::SHLD32rrCL_ND, X86::SHLD32mrCL_ND, 0}, |
| {X86::SHLD32rrCL_NF_ND, X86::SHLD32mrCL_NF_ND, 0}, |
| {X86::SHLD32rri8_ND, X86::SHLD32mri8_ND, 0}, |
| {X86::SHLD32rri8_NF_ND, X86::SHLD32mri8_NF_ND, 0}, |
| {X86::SHLD64rrCL_ND, X86::SHLD64mrCL_ND, 0}, |
| {X86::SHLD64rrCL_NF_ND, X86::SHLD64mrCL_NF_ND, 0}, |
| {X86::SHLD64rri8_ND, X86::SHLD64mri8_ND, 0}, |
| {X86::SHLD64rri8_NF_ND, X86::SHLD64mri8_NF_ND, 0}, |
| {X86::SHLX32rr, X86::SHLX32rm, 0}, |
| {X86::SHLX32rr_EVEX, X86::SHLX32rm_EVEX, 0}, |
| {X86::SHLX64rr, X86::SHLX64rm, 0}, |
| {X86::SHLX64rr_EVEX, X86::SHLX64rm_EVEX, 0}, |
| {X86::SHR16r1_ND, X86::SHR16m1_ND, 0}, |
| {X86::SHR16r1_NF_ND, X86::SHR16m1_NF_ND, 0}, |
| {X86::SHR16rCL_ND, X86::SHR16mCL_ND, 0}, |
| {X86::SHR16rCL_NF_ND, X86::SHR16mCL_NF_ND, 0}, |
| {X86::SHR16ri_ND, X86::SHR16mi_ND, 0}, |
| {X86::SHR16ri_NF_ND, X86::SHR16mi_NF_ND, 0}, |
| {X86::SHR32r1_ND, X86::SHR32m1_ND, 0}, |
| {X86::SHR32r1_NF_ND, X86::SHR32m1_NF_ND, 0}, |
| {X86::SHR32rCL_ND, X86::SHR32mCL_ND, 0}, |
| {X86::SHR32rCL_NF_ND, X86::SHR32mCL_NF_ND, 0}, |
| {X86::SHR32ri_ND, X86::SHR32mi_ND, 0}, |
| {X86::SHR32ri_NF_ND, X86::SHR32mi_NF_ND, 0}, |
| {X86::SHR64r1_ND, X86::SHR64m1_ND, 0}, |
| {X86::SHR64r1_NF_ND, X86::SHR64m1_NF_ND, 0}, |
| {X86::SHR64rCL_ND, X86::SHR64mCL_ND, 0}, |
| {X86::SHR64rCL_NF_ND, X86::SHR64mCL_NF_ND, 0}, |
| {X86::SHR64ri_ND, X86::SHR64mi_ND, 0}, |
| {X86::SHR64ri_NF_ND, X86::SHR64mi_NF_ND, 0}, |
| {X86::SHR8r1_ND, X86::SHR8m1_ND, 0}, |
| {X86::SHR8r1_NF_ND, X86::SHR8m1_NF_ND, 0}, |
| {X86::SHR8rCL_ND, X86::SHR8mCL_ND, 0}, |
| {X86::SHR8rCL_NF_ND, X86::SHR8mCL_NF_ND, 0}, |
| {X86::SHR8ri_ND, X86::SHR8mi_ND, 0}, |
| {X86::SHR8ri_NF_ND, X86::SHR8mi_NF_ND, 0}, |
| {X86::SHRD16rrCL_ND, X86::SHRD16mrCL_ND, 0}, |
| {X86::SHRD16rrCL_NF_ND, X86::SHRD16mrCL_NF_ND, 0}, |
| {X86::SHRD16rri8_ND, X86::SHRD16mri8_ND, 0}, |
| {X86::SHRD16rri8_NF_ND, X86::SHRD16mri8_NF_ND, 0}, |
| {X86::SHRD32rrCL_ND, X86::SHRD32mrCL_ND, 0}, |
| {X86::SHRD32rrCL_NF_ND, X86::SHRD32mrCL_NF_ND, 0}, |
| {X86::SHRD32rri8_ND, X86::SHRD32mri8_ND, 0}, |
| {X86::SHRD32rri8_NF_ND, X86::SHRD32mri8_NF_ND, 0}, |
| {X86::SHRD64rrCL_ND, X86::SHRD64mrCL_ND, 0}, |
| {X86::SHRD64rrCL_NF_ND, X86::SHRD64mrCL_NF_ND, 0}, |
| {X86::SHRD64rri8_ND, X86::SHRD64mri8_ND, 0}, |
| {X86::SHRD64rri8_NF_ND, X86::SHRD64mri8_NF_ND, 0}, |
| {X86::SHRX32rr, X86::SHRX32rm, 0}, |
| {X86::SHRX32rr_EVEX, X86::SHRX32rm_EVEX, 0}, |
| {X86::SHRX64rr, X86::SHRX64rm, 0}, |
| {X86::SHRX64rr_EVEX, X86::SHRX64rm_EVEX, 0}, |
| {X86::SQRTPDr, X86::SQRTPDm, TB_ALIGN_16}, |
| {X86::SQRTPSr, X86::SQRTPSm, TB_ALIGN_16}, |
| {X86::SQRTSDr, X86::SQRTSDm, 0}, |
| {X86::SQRTSSr, X86::SQRTSSm, 0}, |
| {X86::SUB16ri8_ND, X86::SUB16mi8_ND, 0}, |
| {X86::SUB16ri8_NF_ND, X86::SUB16mi8_NF_ND, 0}, |
| {X86::SUB16ri_ND, X86::SUB16mi_ND, 0}, |
| {X86::SUB16ri_NF_ND, X86::SUB16mi_NF_ND, 0}, |
| {X86::SUB16rr_ND, X86::SUB16mr_ND, 0}, |
| {X86::SUB16rr_NF_ND, X86::SUB16mr_NF_ND, 0}, |
| {X86::SUB32ri8_ND, X86::SUB32mi8_ND, 0}, |
| {X86::SUB32ri8_NF_ND, X86::SUB32mi8_NF_ND, 0}, |
| {X86::SUB32ri_ND, X86::SUB32mi_ND, 0}, |
| {X86::SUB32ri_NF_ND, X86::SUB32mi_NF_ND, 0}, |
| {X86::SUB32rr_ND, X86::SUB32mr_ND, 0}, |
| {X86::SUB32rr_NF_ND, X86::SUB32mr_NF_ND, 0}, |
| {X86::SUB64ri32_ND, X86::SUB64mi32_ND, 0}, |
| {X86::SUB64ri32_NF_ND, X86::SUB64mi32_NF_ND, 0}, |
| {X86::SUB64ri8_ND, X86::SUB64mi8_ND, 0}, |
| {X86::SUB64ri8_NF_ND, X86::SUB64mi8_NF_ND, 0}, |
| {X86::SUB64rr_ND, X86::SUB64mr_ND, 0}, |
| {X86::SUB64rr_NF_ND, X86::SUB64mr_NF_ND, 0}, |
| {X86::SUB8ri_ND, X86::SUB8mi_ND, 0}, |
| {X86::SUB8ri_NF_ND, X86::SUB8mi_NF_ND, 0}, |
| {X86::SUB8rr_ND, X86::SUB8mr_ND, 0}, |
| {X86::SUB8rr_NF_ND, X86::SUB8mr_NF_ND, 0}, |
| {X86::T1MSKC32rr, X86::T1MSKC32rm, 0}, |
| {X86::T1MSKC64rr, X86::T1MSKC64rm, 0}, |
| {X86::TZCNT16rr, X86::TZCNT16rm, 0}, |
| {X86::TZCNT16rr_NF, X86::TZCNT16rm_NF, 0}, |
| {X86::TZCNT32rr, X86::TZCNT32rm, 0}, |
| {X86::TZCNT32rr_NF, X86::TZCNT32rm_NF, 0}, |
| {X86::TZCNT64rr, X86::TZCNT64rm, 0}, |
| {X86::TZCNT64rr_NF, X86::TZCNT64rm_NF, 0}, |
| {X86::TZMSK32rr, X86::TZMSK32rm, 0}, |
| {X86::TZMSK64rr, X86::TZMSK64rm, 0}, |
| {X86::UCOMISDrr, X86::UCOMISDrm, 0}, |
| {X86::UCOMISDrr_Int, X86::UCOMISDrm_Int, TB_NO_REVERSE}, |
| {X86::UCOMISSrr, X86::UCOMISSrm, 0}, |
| {X86::UCOMISSrr_Int, X86::UCOMISSrm_Int, TB_NO_REVERSE}, |
| {X86::VAESIMCrr, X86::VAESIMCrm, 0}, |
| {X86::VAESKEYGENASSIST128rr, X86::VAESKEYGENASSIST128rm, 0}, |
| {X86::VBROADCASTF32X2Z256rr, X86::VBROADCASTF32X2Z256rm, TB_NO_REVERSE}, |
| {X86::VBROADCASTF32X2Zrr, X86::VBROADCASTF32X2Zrm, TB_NO_REVERSE}, |
| {X86::VBROADCASTI32X2Z128rr, X86::VBROADCASTI32X2Z128rm, TB_NO_REVERSE}, |
| {X86::VBROADCASTI32X2Z256rr, X86::VBROADCASTI32X2Z256rm, TB_NO_REVERSE}, |
| {X86::VBROADCASTI32X2Zrr, X86::VBROADCASTI32X2Zrm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSDYrr, X86::VBROADCASTSDYrm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSDZ256rr, X86::VBROADCASTSDZ256rm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSDZrr, X86::VBROADCASTSDZrm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSSYrr, X86::VBROADCASTSSYrm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSSZ128rr, X86::VBROADCASTSSZ128rm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSSZ256rr, X86::VBROADCASTSSZ256rm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSSZrr, X86::VBROADCASTSSZrm, TB_NO_REVERSE}, |
| {X86::VBROADCASTSSrr, X86::VBROADCASTSSrm, TB_NO_REVERSE}, |
| {X86::VCOMISDZrr, X86::VCOMISDZrm, 0}, |
| {X86::VCOMISDZrr_Int, X86::VCOMISDZrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMISDrr, X86::VCOMISDrm, 0}, |
| {X86::VCOMISDrr_Int, X86::VCOMISDrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMISHZrr, X86::VCOMISHZrm, 0}, |
| {X86::VCOMISHZrr_Int, X86::VCOMISHZrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMISSZrr, X86::VCOMISSZrm, 0}, |
| {X86::VCOMISSZrr_Int, X86::VCOMISSZrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMISSrr, X86::VCOMISSrm, 0}, |
| {X86::VCOMISSrr_Int, X86::VCOMISSrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMSBF16Zrr, X86::VCOMSBF16Zrm, 0}, |
| {X86::VCOMSBF16Zrr_Int, X86::VCOMSBF16Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMXSDZrr_Int, X86::VCOMXSDZrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMXSHZrr_Int, X86::VCOMXSHZrm_Int, TB_NO_REVERSE}, |
| {X86::VCOMXSSZrr_Int, X86::VCOMXSSZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTDQ2PDYrr, X86::VCVTDQ2PDYrm, 0}, |
| {X86::VCVTDQ2PDZ128rr, X86::VCVTDQ2PDZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTDQ2PDZ256rr, X86::VCVTDQ2PDZ256rm, 0}, |
| {X86::VCVTDQ2PDZrr, X86::VCVTDQ2PDZrm, 0}, |
| {X86::VCVTDQ2PDrr, X86::VCVTDQ2PDrm, TB_NO_REVERSE}, |
| {X86::VCVTDQ2PHZ128rr, X86::VCVTDQ2PHZ128rm, 0}, |
| {X86::VCVTDQ2PHZ256rr, X86::VCVTDQ2PHZ256rm, 0}, |
| {X86::VCVTDQ2PHZrr, X86::VCVTDQ2PHZrm, 0}, |
| {X86::VCVTDQ2PSYrr, X86::VCVTDQ2PSYrm, 0}, |
| {X86::VCVTDQ2PSZ128rr, X86::VCVTDQ2PSZ128rm, 0}, |
| {X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rm, 0}, |
| {X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrm, 0}, |
| {X86::VCVTDQ2PSrr, X86::VCVTDQ2PSrm, 0}, |
| {X86::VCVTHF82PHZ128rr, X86::VCVTHF82PHZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTHF82PHZ256rr, X86::VCVTHF82PHZ256rm, 0}, |
| {X86::VCVTHF82PHZrr, X86::VCVTHF82PHZrm, 0}, |
| {X86::VCVTNEBF162IBSZ128rr, X86::VCVTNEBF162IBSZ128rm, 0}, |
| {X86::VCVTNEBF162IBSZ256rr, X86::VCVTNEBF162IBSZ256rm, 0}, |
| {X86::VCVTNEBF162IBSZrr, X86::VCVTNEBF162IBSZrm, 0}, |
| {X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rm, 0}, |
| {X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rm, 0}, |
| {X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrm, 0}, |
| {X86::VCVTNEPH2BF8SZ128rr, X86::VCVTNEPH2BF8SZ128rm, 0}, |
| {X86::VCVTNEPH2BF8SZ256rr, X86::VCVTNEPH2BF8SZ256rm, 0}, |
| {X86::VCVTNEPH2BF8SZrr, X86::VCVTNEPH2BF8SZrm, 0}, |
| {X86::VCVTNEPH2BF8Z128rr, X86::VCVTNEPH2BF8Z128rm, 0}, |
| {X86::VCVTNEPH2BF8Z256rr, X86::VCVTNEPH2BF8Z256rm, 0}, |
| {X86::VCVTNEPH2BF8Zrr, X86::VCVTNEPH2BF8Zrm, 0}, |
| {X86::VCVTNEPH2HF8SZ128rr, X86::VCVTNEPH2HF8SZ128rm, 0}, |
| {X86::VCVTNEPH2HF8SZ256rr, X86::VCVTNEPH2HF8SZ256rm, 0}, |
| {X86::VCVTNEPH2HF8SZrr, X86::VCVTNEPH2HF8SZrm, 0}, |
| {X86::VCVTNEPH2HF8Z128rr, X86::VCVTNEPH2HF8Z128rm, 0}, |
| {X86::VCVTNEPH2HF8Z256rr, X86::VCVTNEPH2HF8Z256rm, 0}, |
| {X86::VCVTNEPH2HF8Zrr, X86::VCVTNEPH2HF8Zrm, 0}, |
| {X86::VCVTNEPS2BF16Yrr, X86::VCVTNEPS2BF16Yrm, 0}, |
| {X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rm, 0}, |
| {X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rm, 0}, |
| {X86::VCVTNEPS2BF16Zrr, X86::VCVTNEPS2BF16Zrm, 0}, |
| {X86::VCVTNEPS2BF16rr, X86::VCVTNEPS2BF16rm, 0}, |
| {X86::VCVTPD2DQYrr, X86::VCVTPD2DQYrm, 0}, |
| {X86::VCVTPD2DQZ128rr, X86::VCVTPD2DQZ128rm, 0}, |
| {X86::VCVTPD2DQZ256rr, X86::VCVTPD2DQZ256rm, 0}, |
| {X86::VCVTPD2DQZrr, X86::VCVTPD2DQZrm, 0}, |
| {X86::VCVTPD2DQrr, X86::VCVTPD2DQrm, 0}, |
| {X86::VCVTPD2PHZ128rr, X86::VCVTPD2PHZ128rm, 0}, |
| {X86::VCVTPD2PHZ256rr, X86::VCVTPD2PHZ256rm, 0}, |
| {X86::VCVTPD2PHZrr, X86::VCVTPD2PHZrm, 0}, |
| {X86::VCVTPD2PSYrr, X86::VCVTPD2PSYrm, 0}, |
| {X86::VCVTPD2PSZ128rr, X86::VCVTPD2PSZ128rm, 0}, |
| {X86::VCVTPD2PSZ256rr, X86::VCVTPD2PSZ256rm, 0}, |
| {X86::VCVTPD2PSZrr, X86::VCVTPD2PSZrm, 0}, |
| {X86::VCVTPD2PSrr, X86::VCVTPD2PSrm, 0}, |
| {X86::VCVTPD2QQZ128rr, X86::VCVTPD2QQZ128rm, 0}, |
| {X86::VCVTPD2QQZ256rr, X86::VCVTPD2QQZ256rm, 0}, |
| {X86::VCVTPD2QQZrr, X86::VCVTPD2QQZrm, 0}, |
| {X86::VCVTPD2UDQZ128rr, X86::VCVTPD2UDQZ128rm, 0}, |
| {X86::VCVTPD2UDQZ256rr, X86::VCVTPD2UDQZ256rm, 0}, |
| {X86::VCVTPD2UDQZrr, X86::VCVTPD2UDQZrm, 0}, |
| {X86::VCVTPD2UQQZ128rr, X86::VCVTPD2UQQZ128rm, 0}, |
| {X86::VCVTPD2UQQZ256rr, X86::VCVTPD2UQQZ256rm, 0}, |
| {X86::VCVTPD2UQQZrr, X86::VCVTPD2UQQZrm, 0}, |
| {X86::VCVTPH2DQZ128rr, X86::VCVTPH2DQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2DQZ256rr, X86::VCVTPH2DQZ256rm, 0}, |
| {X86::VCVTPH2DQZrr, X86::VCVTPH2DQZrm, 0}, |
| {X86::VCVTPH2IBSZ128rr, X86::VCVTPH2IBSZ128rm, 0}, |
| {X86::VCVTPH2IBSZ256rr, X86::VCVTPH2IBSZ256rm, 0}, |
| {X86::VCVTPH2IBSZrr, X86::VCVTPH2IBSZrm, 0}, |
| {X86::VCVTPH2IUBSZ128rr, X86::VCVTPH2IUBSZ128rm, 0}, |
| {X86::VCVTPH2IUBSZ256rr, X86::VCVTPH2IUBSZ256rm, 0}, |
| {X86::VCVTPH2IUBSZrr, X86::VCVTPH2IUBSZrm, 0}, |
| {X86::VCVTPH2PDZ128rr, X86::VCVTPH2PDZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2PDZ256rr, X86::VCVTPH2PDZ256rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2PDZrr, X86::VCVTPH2PDZrm, 0}, |
| {X86::VCVTPH2PSXZ128rr, X86::VCVTPH2PSXZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2PSXZ256rr, X86::VCVTPH2PSXZ256rm, 0}, |
| {X86::VCVTPH2PSXZrr, X86::VCVTPH2PSXZrm, 0}, |
| {X86::VCVTPH2PSYrr, X86::VCVTPH2PSYrm, 0}, |
| {X86::VCVTPH2PSZ128rr, X86::VCVTPH2PSZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2PSZ256rr, X86::VCVTPH2PSZ256rm, 0}, |
| {X86::VCVTPH2PSZrr, X86::VCVTPH2PSZrm, 0}, |
| {X86::VCVTPH2PSrr, X86::VCVTPH2PSrm, TB_NO_REVERSE}, |
| {X86::VCVTPH2QQZ128rr, X86::VCVTPH2QQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2QQZ256rr, X86::VCVTPH2QQZ256rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2QQZrr, X86::VCVTPH2QQZrm, 0}, |
| {X86::VCVTPH2UDQZ128rr, X86::VCVTPH2UDQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2UDQZ256rr, X86::VCVTPH2UDQZ256rm, 0}, |
| {X86::VCVTPH2UDQZrr, X86::VCVTPH2UDQZrm, 0}, |
| {X86::VCVTPH2UQQZ128rr, X86::VCVTPH2UQQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2UQQZ256rr, X86::VCVTPH2UQQZ256rm, TB_NO_REVERSE}, |
| {X86::VCVTPH2UQQZrr, X86::VCVTPH2UQQZrm, 0}, |
| {X86::VCVTPH2UWZ128rr, X86::VCVTPH2UWZ128rm, 0}, |
| {X86::VCVTPH2UWZ256rr, X86::VCVTPH2UWZ256rm, 0}, |
| {X86::VCVTPH2UWZrr, X86::VCVTPH2UWZrm, 0}, |
| {X86::VCVTPH2WZ128rr, X86::VCVTPH2WZ128rm, 0}, |
| {X86::VCVTPH2WZ256rr, X86::VCVTPH2WZ256rm, 0}, |
| {X86::VCVTPH2WZrr, X86::VCVTPH2WZrm, 0}, |
| {X86::VCVTPS2DQYrr, X86::VCVTPS2DQYrm, 0}, |
| {X86::VCVTPS2DQZ128rr, X86::VCVTPS2DQZ128rm, 0}, |
| {X86::VCVTPS2DQZ256rr, X86::VCVTPS2DQZ256rm, 0}, |
| {X86::VCVTPS2DQZrr, X86::VCVTPS2DQZrm, 0}, |
| {X86::VCVTPS2DQrr, X86::VCVTPS2DQrm, 0}, |
| {X86::VCVTPS2IBSZ128rr, X86::VCVTPS2IBSZ128rm, 0}, |
| {X86::VCVTPS2IBSZ256rr, X86::VCVTPS2IBSZ256rm, 0}, |
| {X86::VCVTPS2IBSZrr, X86::VCVTPS2IBSZrm, 0}, |
| {X86::VCVTPS2IUBSZ128rr, X86::VCVTPS2IUBSZ128rm, 0}, |
| {X86::VCVTPS2IUBSZ256rr, X86::VCVTPS2IUBSZ256rm, 0}, |
| {X86::VCVTPS2IUBSZrr, X86::VCVTPS2IUBSZrm, 0}, |
| {X86::VCVTPS2PDYrr, X86::VCVTPS2PDYrm, 0}, |
| {X86::VCVTPS2PDZ128rr, X86::VCVTPS2PDZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPS2PDZ256rr, X86::VCVTPS2PDZ256rm, 0}, |
| {X86::VCVTPS2PDZrr, X86::VCVTPS2PDZrm, 0}, |
| {X86::VCVTPS2PDrr, X86::VCVTPS2PDrm, TB_NO_REVERSE}, |
| {X86::VCVTPS2PHXZ128rr, X86::VCVTPS2PHXZ128rm, 0}, |
| {X86::VCVTPS2PHXZ256rr, X86::VCVTPS2PHXZ256rm, 0}, |
| {X86::VCVTPS2PHXZrr, X86::VCVTPS2PHXZrm, 0}, |
| {X86::VCVTPS2QQZ128rr, X86::VCVTPS2QQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPS2QQZ256rr, X86::VCVTPS2QQZ256rm, 0}, |
| {X86::VCVTPS2QQZrr, X86::VCVTPS2QQZrm, 0}, |
| {X86::VCVTPS2UDQZ128rr, X86::VCVTPS2UDQZ128rm, 0}, |
| {X86::VCVTPS2UDQZ256rr, X86::VCVTPS2UDQZ256rm, 0}, |
| {X86::VCVTPS2UDQZrr, X86::VCVTPS2UDQZrm, 0}, |
| {X86::VCVTPS2UQQZ128rr, X86::VCVTPS2UQQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTPS2UQQZ256rr, X86::VCVTPS2UQQZ256rm, 0}, |
| {X86::VCVTPS2UQQZrr, X86::VCVTPS2UQQZrm, 0}, |
| {X86::VCVTQQ2PDZ128rr, X86::VCVTQQ2PDZ128rm, 0}, |
| {X86::VCVTQQ2PDZ256rr, X86::VCVTQQ2PDZ256rm, 0}, |
| {X86::VCVTQQ2PDZrr, X86::VCVTQQ2PDZrm, 0}, |
| {X86::VCVTQQ2PHZ128rr, X86::VCVTQQ2PHZ128rm, 0}, |
| {X86::VCVTQQ2PHZ256rr, X86::VCVTQQ2PHZ256rm, 0}, |
| {X86::VCVTQQ2PHZrr, X86::VCVTQQ2PHZrm, 0}, |
| {X86::VCVTQQ2PSZ128rr, X86::VCVTQQ2PSZ128rm, 0}, |
| {X86::VCVTQQ2PSZ256rr, X86::VCVTQQ2PSZ256rm, 0}, |
| {X86::VCVTQQ2PSZrr, X86::VCVTQQ2PSZrm, 0}, |
| {X86::VCVTSD2SI64Zrr, X86::VCVTSD2SI64Zrm, 0}, |
| {X86::VCVTSD2SI64Zrr_Int, X86::VCVTSD2SI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSD2SI64rr, X86::VCVTSD2SI64rm, 0}, |
| {X86::VCVTSD2SI64rr_Int, X86::VCVTSD2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSD2SIZrr, X86::VCVTSD2SIZrm, 0}, |
| {X86::VCVTSD2SIZrr_Int, X86::VCVTSD2SIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSD2SIrr, X86::VCVTSD2SIrm, 0}, |
| {X86::VCVTSD2SIrr_Int, X86::VCVTSD2SIrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSD2USI64Zrr_Int, X86::VCVTSD2USI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSD2USIZrr_Int, X86::VCVTSD2USIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSH2SI64Zrr_Int, X86::VCVTSH2SI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSH2SIZrr_Int, X86::VCVTSH2SIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSH2USI64Zrr_Int, X86::VCVTSH2USI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSH2USIZrr_Int, X86::VCVTSH2USIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSS2SI64Zrr, X86::VCVTSS2SI64Zrm, 0}, |
| {X86::VCVTSS2SI64Zrr_Int, X86::VCVTSS2SI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSS2SI64rr, X86::VCVTSS2SI64rm, 0}, |
| {X86::VCVTSS2SI64rr_Int, X86::VCVTSS2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSS2SIZrr, X86::VCVTSS2SIZrm, 0}, |
| {X86::VCVTSS2SIZrr_Int, X86::VCVTSS2SIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSS2SIrr, X86::VCVTSS2SIrm, 0}, |
| {X86::VCVTSS2SIrr_Int, X86::VCVTSS2SIrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSS2USI64Zrr_Int, X86::VCVTSS2USI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTSS2USIZrr_Int, X86::VCVTSS2USIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTNEBF162IBSZ128rr, X86::VCVTTNEBF162IBSZ128rm, 0}, |
| {X86::VCVTTNEBF162IBSZ256rr, X86::VCVTTNEBF162IBSZ256rm, 0}, |
| {X86::VCVTTNEBF162IBSZrr, X86::VCVTTNEBF162IBSZrm, 0}, |
| {X86::VCVTTNEBF162IUBSZ128rr, X86::VCVTTNEBF162IUBSZ128rm, 0}, |
| {X86::VCVTTNEBF162IUBSZ256rr, X86::VCVTTNEBF162IUBSZ256rm, 0}, |
| {X86::VCVTTNEBF162IUBSZrr, X86::VCVTTNEBF162IUBSZrm, 0}, |
| {X86::VCVTTPD2DQSZ128rr, X86::VCVTTPD2DQSZ128rm, 0}, |
| {X86::VCVTTPD2DQSZ256rr, X86::VCVTTPD2DQSZ256rm, 0}, |
| {X86::VCVTTPD2DQSZrr, X86::VCVTTPD2DQSZrm, 0}, |
| {X86::VCVTTPD2DQYrr, X86::VCVTTPD2DQYrm, 0}, |
| {X86::VCVTTPD2DQZ128rr, X86::VCVTTPD2DQZ128rm, 0}, |
| {X86::VCVTTPD2DQZ256rr, X86::VCVTTPD2DQZ256rm, 0}, |
| {X86::VCVTTPD2DQZrr, X86::VCVTTPD2DQZrm, 0}, |
| {X86::VCVTTPD2DQrr, X86::VCVTTPD2DQrm, 0}, |
| {X86::VCVTTPD2QQSZ128rr, X86::VCVTTPD2QQSZ128rm, 0}, |
| {X86::VCVTTPD2QQSZ256rr, X86::VCVTTPD2QQSZ256rm, 0}, |
| {X86::VCVTTPD2QQSZrr, X86::VCVTTPD2QQSZrm, 0}, |
| {X86::VCVTTPD2QQZ128rr, X86::VCVTTPD2QQZ128rm, 0}, |
| {X86::VCVTTPD2QQZ256rr, X86::VCVTTPD2QQZ256rm, 0}, |
| {X86::VCVTTPD2QQZrr, X86::VCVTTPD2QQZrm, 0}, |
| {X86::VCVTTPD2UDQSZ128rr, X86::VCVTTPD2UDQSZ128rm, 0}, |
| {X86::VCVTTPD2UDQSZ256rr, X86::VCVTTPD2UDQSZ256rm, 0}, |
| {X86::VCVTTPD2UDQSZrr, X86::VCVTTPD2UDQSZrm, 0}, |
| {X86::VCVTTPD2UDQZ128rr, X86::VCVTTPD2UDQZ128rm, 0}, |
| {X86::VCVTTPD2UDQZ256rr, X86::VCVTTPD2UDQZ256rm, 0}, |
| {X86::VCVTTPD2UDQZrr, X86::VCVTTPD2UDQZrm, 0}, |
| {X86::VCVTTPD2UQQSZ128rr, X86::VCVTTPD2UQQSZ128rm, 0}, |
| {X86::VCVTTPD2UQQSZ256rr, X86::VCVTTPD2UQQSZ256rm, 0}, |
| {X86::VCVTTPD2UQQSZrr, X86::VCVTTPD2UQQSZrm, 0}, |
| {X86::VCVTTPD2UQQZ128rr, X86::VCVTTPD2UQQZ128rm, 0}, |
| {X86::VCVTTPD2UQQZ256rr, X86::VCVTTPD2UQQZ256rm, 0}, |
| {X86::VCVTTPD2UQQZrr, X86::VCVTTPD2UQQZrm, 0}, |
| {X86::VCVTTPH2DQZ128rr, X86::VCVTTPH2DQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPH2DQZ256rr, X86::VCVTTPH2DQZ256rm, 0}, |
| {X86::VCVTTPH2DQZrr, X86::VCVTTPH2DQZrm, 0}, |
| {X86::VCVTTPH2IBSZ128rr, X86::VCVTTPH2IBSZ128rm, 0}, |
| {X86::VCVTTPH2IBSZ256rr, X86::VCVTTPH2IBSZ256rm, 0}, |
| {X86::VCVTTPH2IBSZrr, X86::VCVTTPH2IBSZrm, 0}, |
| {X86::VCVTTPH2IUBSZ128rr, X86::VCVTTPH2IUBSZ128rm, 0}, |
| {X86::VCVTTPH2IUBSZ256rr, X86::VCVTTPH2IUBSZ256rm, 0}, |
| {X86::VCVTTPH2IUBSZrr, X86::VCVTTPH2IUBSZrm, 0}, |
| {X86::VCVTTPH2QQZ128rr, X86::VCVTTPH2QQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPH2QQZ256rr, X86::VCVTTPH2QQZ256rm, TB_NO_REVERSE}, |
| {X86::VCVTTPH2QQZrr, X86::VCVTTPH2QQZrm, 0}, |
| {X86::VCVTTPH2UDQZ128rr, X86::VCVTTPH2UDQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPH2UDQZ256rr, X86::VCVTTPH2UDQZ256rm, 0}, |
| {X86::VCVTTPH2UDQZrr, X86::VCVTTPH2UDQZrm, 0}, |
| {X86::VCVTTPH2UQQZ128rr, X86::VCVTTPH2UQQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPH2UQQZ256rr, X86::VCVTTPH2UQQZ256rm, TB_NO_REVERSE}, |
| {X86::VCVTTPH2UQQZrr, X86::VCVTTPH2UQQZrm, 0}, |
| {X86::VCVTTPH2UWZ128rr, X86::VCVTTPH2UWZ128rm, 0}, |
| {X86::VCVTTPH2UWZ256rr, X86::VCVTTPH2UWZ256rm, 0}, |
| {X86::VCVTTPH2UWZrr, X86::VCVTTPH2UWZrm, 0}, |
| {X86::VCVTTPH2WZ128rr, X86::VCVTTPH2WZ128rm, 0}, |
| {X86::VCVTTPH2WZ256rr, X86::VCVTTPH2WZ256rm, 0}, |
| {X86::VCVTTPH2WZrr, X86::VCVTTPH2WZrm, 0}, |
| {X86::VCVTTPS2DQSZ128rr, X86::VCVTTPS2DQSZ128rm, 0}, |
| {X86::VCVTTPS2DQSZ256rr, X86::VCVTTPS2DQSZ256rm, 0}, |
| {X86::VCVTTPS2DQSZrr, X86::VCVTTPS2DQSZrm, 0}, |
| {X86::VCVTTPS2DQYrr, X86::VCVTTPS2DQYrm, 0}, |
| {X86::VCVTTPS2DQZ128rr, X86::VCVTTPS2DQZ128rm, 0}, |
| {X86::VCVTTPS2DQZ256rr, X86::VCVTTPS2DQZ256rm, 0}, |
| {X86::VCVTTPS2DQZrr, X86::VCVTTPS2DQZrm, 0}, |
| {X86::VCVTTPS2DQrr, X86::VCVTTPS2DQrm, 0}, |
| {X86::VCVTTPS2IBSZ128rr, X86::VCVTTPS2IBSZ128rm, 0}, |
| {X86::VCVTTPS2IBSZ256rr, X86::VCVTTPS2IBSZ256rm, 0}, |
| {X86::VCVTTPS2IBSZrr, X86::VCVTTPS2IBSZrm, 0}, |
| {X86::VCVTTPS2IUBSZ128rr, X86::VCVTTPS2IUBSZ128rm, 0}, |
| {X86::VCVTTPS2IUBSZ256rr, X86::VCVTTPS2IUBSZ256rm, 0}, |
| {X86::VCVTTPS2IUBSZrr, X86::VCVTTPS2IUBSZrm, 0}, |
| {X86::VCVTTPS2QQSZ128rr, X86::VCVTTPS2QQSZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPS2QQSZ256rr, X86::VCVTTPS2QQSZ256rm, 0}, |
| {X86::VCVTTPS2QQSZrr, X86::VCVTTPS2QQSZrm, 0}, |
| {X86::VCVTTPS2QQZ128rr, X86::VCVTTPS2QQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPS2QQZ256rr, X86::VCVTTPS2QQZ256rm, 0}, |
| {X86::VCVTTPS2QQZrr, X86::VCVTTPS2QQZrm, 0}, |
| {X86::VCVTTPS2UDQSZ128rr, X86::VCVTTPS2UDQSZ128rm, 0}, |
| {X86::VCVTTPS2UDQSZ256rr, X86::VCVTTPS2UDQSZ256rm, 0}, |
| {X86::VCVTTPS2UDQSZrr, X86::VCVTTPS2UDQSZrm, 0}, |
| {X86::VCVTTPS2UDQZ128rr, X86::VCVTTPS2UDQZ128rm, 0}, |
| {X86::VCVTTPS2UDQZ256rr, X86::VCVTTPS2UDQZ256rm, 0}, |
| {X86::VCVTTPS2UDQZrr, X86::VCVTTPS2UDQZrm, 0}, |
| {X86::VCVTTPS2UQQSZ128rr, X86::VCVTTPS2UQQSZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPS2UQQSZ256rr, X86::VCVTTPS2UQQSZ256rm, 0}, |
| {X86::VCVTTPS2UQQSZrr, X86::VCVTTPS2UQQSZrm, 0}, |
| {X86::VCVTTPS2UQQZ128rr, X86::VCVTTPS2UQQZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTTPS2UQQZ256rr, X86::VCVTTPS2UQQZ256rm, 0}, |
| {X86::VCVTTPS2UQQZrr, X86::VCVTTPS2UQQZrm, 0}, |
| {X86::VCVTTSD2SI64Srr, X86::VCVTTSD2SI64Srm, 0}, |
| {X86::VCVTTSD2SI64Srr_Int, X86::VCVTTSD2SI64Srm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2SI64Zrr, X86::VCVTTSD2SI64Zrm, 0}, |
| {X86::VCVTTSD2SI64Zrr_Int, X86::VCVTTSD2SI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2SI64rr, X86::VCVTTSD2SI64rm, 0}, |
| {X86::VCVTTSD2SI64rr_Int, X86::VCVTTSD2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2SISrr, X86::VCVTTSD2SISrm, 0}, |
| {X86::VCVTTSD2SISrr_Int, X86::VCVTTSD2SISrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2SIZrr, X86::VCVTTSD2SIZrm, 0}, |
| {X86::VCVTTSD2SIZrr_Int, X86::VCVTTSD2SIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2SIrr, X86::VCVTTSD2SIrm, 0}, |
| {X86::VCVTTSD2SIrr_Int, X86::VCVTTSD2SIrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2USI64Srr, X86::VCVTTSD2USI64Srm, 0}, |
| {X86::VCVTTSD2USI64Srr_Int, X86::VCVTTSD2USI64Srm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2USI64Zrr, X86::VCVTTSD2USI64Zrm, 0}, |
| {X86::VCVTTSD2USI64Zrr_Int, X86::VCVTTSD2USI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2USISrr, X86::VCVTTSD2USISrm, 0}, |
| {X86::VCVTTSD2USISrr_Int, X86::VCVTTSD2USISrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSD2USIZrr, X86::VCVTTSD2USIZrm, 0}, |
| {X86::VCVTTSD2USIZrr_Int, X86::VCVTTSD2USIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSH2SI64Zrr, X86::VCVTTSH2SI64Zrm, 0}, |
| {X86::VCVTTSH2SI64Zrr_Int, X86::VCVTTSH2SI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSH2SIZrr, X86::VCVTTSH2SIZrm, 0}, |
| {X86::VCVTTSH2SIZrr_Int, X86::VCVTTSH2SIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSH2USI64Zrr, X86::VCVTTSH2USI64Zrm, 0}, |
| {X86::VCVTTSH2USI64Zrr_Int, X86::VCVTTSH2USI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSH2USIZrr, X86::VCVTTSH2USIZrm, 0}, |
| {X86::VCVTTSH2USIZrr_Int, X86::VCVTTSH2USIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2SI64Srr, X86::VCVTTSS2SI64Srm, 0}, |
| {X86::VCVTTSS2SI64Srr_Int, X86::VCVTTSS2SI64Srm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2SI64Zrr, X86::VCVTTSS2SI64Zrm, 0}, |
| {X86::VCVTTSS2SI64Zrr_Int, X86::VCVTTSS2SI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2SI64rr, X86::VCVTTSS2SI64rm, 0}, |
| {X86::VCVTTSS2SI64rr_Int, X86::VCVTTSS2SI64rm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2SISrr, X86::VCVTTSS2SISrm, 0}, |
| {X86::VCVTTSS2SISrr_Int, X86::VCVTTSS2SISrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2SIZrr, X86::VCVTTSS2SIZrm, 0}, |
| {X86::VCVTTSS2SIZrr_Int, X86::VCVTTSS2SIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2SIrr, X86::VCVTTSS2SIrm, 0}, |
| {X86::VCVTTSS2SIrr_Int, X86::VCVTTSS2SIrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2USI64Srr, X86::VCVTTSS2USI64Srm, 0}, |
| {X86::VCVTTSS2USI64Srr_Int, X86::VCVTTSS2USI64Srm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2USI64Zrr, X86::VCVTTSS2USI64Zrm, 0}, |
| {X86::VCVTTSS2USI64Zrr_Int, X86::VCVTTSS2USI64Zrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2USISrr, X86::VCVTTSS2USISrm, 0}, |
| {X86::VCVTTSS2USISrr_Int, X86::VCVTTSS2USISrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTTSS2USIZrr, X86::VCVTTSS2USIZrm, 0}, |
| {X86::VCVTTSS2USIZrr_Int, X86::VCVTTSS2USIZrm_Int, TB_NO_REVERSE}, |
| {X86::VCVTUDQ2PDZ128rr, X86::VCVTUDQ2PDZ128rm, TB_NO_REVERSE}, |
| {X86::VCVTUDQ2PDZ256rr, X86::VCVTUDQ2PDZ256rm, 0}, |
| {X86::VCVTUDQ2PDZrr, X86::VCVTUDQ2PDZrm, 0}, |
| {X86::VCVTUDQ2PHZ128rr, X86::VCVTUDQ2PHZ128rm, 0}, |
| {X86::VCVTUDQ2PHZ256rr, X86::VCVTUDQ2PHZ256rm, 0}, |
| {X86::VCVTUDQ2PHZrr, X86::VCVTUDQ2PHZrm, 0}, |
| {X86::VCVTUDQ2PSZ128rr, X86::VCVTUDQ2PSZ128rm, 0}, |
| {X86::VCVTUDQ2PSZ256rr, X86::VCVTUDQ2PSZ256rm, 0}, |
| {X86::VCVTUDQ2PSZrr, X86::VCVTUDQ2PSZrm, 0}, |
| {X86::VCVTUQQ2PDZ128rr, X86::VCVTUQQ2PDZ128rm, 0}, |
| {X86::VCVTUQQ2PDZ256rr, X86::VCVTUQQ2PDZ256rm, 0}, |
| {X86::VCVTUQQ2PDZrr, X86::VCVTUQQ2PDZrm, 0}, |
| {X86::VCVTUQQ2PHZ128rr, X86::VCVTUQQ2PHZ128rm, 0}, |
| {X86::VCVTUQQ2PHZ256rr, X86::VCVTUQQ2PHZ256rm, 0}, |
| {X86::VCVTUQQ2PHZrr, X86::VCVTUQQ2PHZrm, 0}, |
| {X86::VCVTUQQ2PSZ128rr, X86::VCVTUQQ2PSZ128rm, 0}, |
| {X86::VCVTUQQ2PSZ256rr, X86::VCVTUQQ2PSZ256rm, 0}, |
| {X86::VCVTUQQ2PSZrr, X86::VCVTUQQ2PSZrm, 0}, |
| {X86::VCVTUW2PHZ128rr, X86::VCVTUW2PHZ128rm, 0}, |
| {X86::VCVTUW2PHZ256rr, X86::VCVTUW2PHZ256rm, 0}, |
| {X86::VCVTUW2PHZrr, X86::VCVTUW2PHZrm, 0}, |
| {X86::VCVTW2PHZ128rr, X86::VCVTW2PHZ128rm, 0}, |
| {X86::VCVTW2PHZ256rr, X86::VCVTW2PHZ256rm, 0}, |
| {X86::VCVTW2PHZrr, X86::VCVTW2PHZrm, 0}, |
| {X86::VEXP2PDZr, X86::VEXP2PDZm, 0}, |
| {X86::VEXP2PSZr, X86::VEXP2PSZm, 0}, |
| {X86::VEXPANDPDZ128rr, X86::VEXPANDPDZ128rm, TB_NO_REVERSE}, |
| {X86::VEXPANDPDZ256rr, X86::VEXPANDPDZ256rm, TB_NO_REVERSE}, |
| {X86::VEXPANDPDZrr, X86::VEXPANDPDZrm, TB_NO_REVERSE}, |
| {X86::VEXPANDPSZ128rr, X86::VEXPANDPSZ128rm, TB_NO_REVERSE}, |
| {X86::VEXPANDPSZ256rr, X86::VEXPANDPSZ256rm, TB_NO_REVERSE}, |
| {X86::VEXPANDPSZrr, X86::VEXPANDPSZrm, TB_NO_REVERSE}, |
| {X86::VFPCLASSPBF16Z128ri, X86::VFPCLASSPBF16Z128mi, 0}, |
| {X86::VFPCLASSPBF16Z256ri, X86::VFPCLASSPBF16Z256mi, 0}, |
| {X86::VFPCLASSPBF16Zri, X86::VFPCLASSPBF16Zmi, 0}, |
| {X86::VFPCLASSPDZ128ri, X86::VFPCLASSPDZ128mi, 0}, |
| {X86::VFPCLASSPDZ256ri, X86::VFPCLASSPDZ256mi, 0}, |
| {X86::VFPCLASSPDZri, X86::VFPCLASSPDZmi, 0}, |
| {X86::VFPCLASSPHZ128ri, X86::VFPCLASSPHZ128mi, 0}, |
| {X86::VFPCLASSPHZ256ri, X86::VFPCLASSPHZ256mi, 0}, |
| {X86::VFPCLASSPHZri, X86::VFPCLASSPHZmi, 0}, |
| {X86::VFPCLASSPSZ128ri, X86::VFPCLASSPSZ128mi, 0}, |
| {X86::VFPCLASSPSZ256ri, X86::VFPCLASSPSZ256mi, 0}, |
| {X86::VFPCLASSPSZri, X86::VFPCLASSPSZmi, 0}, |
| {X86::VFPCLASSSDZri, X86::VFPCLASSSDZmi, TB_NO_REVERSE}, |
| {X86::VFPCLASSSHZri, X86::VFPCLASSSHZmi, TB_NO_REVERSE}, |
| {X86::VFPCLASSSSZri, X86::VFPCLASSSSZmi, TB_NO_REVERSE}, |
| {X86::VFRCZPDYrr, X86::VFRCZPDYrm, 0}, |
| {X86::VFRCZPDrr, X86::VFRCZPDrm, 0}, |
| {X86::VFRCZPSYrr, X86::VFRCZPSYrm, 0}, |
| {X86::VFRCZPSrr, X86::VFRCZPSrm, 0}, |
| {X86::VFRCZSDrr, X86::VFRCZSDrm, TB_NO_REVERSE}, |
| {X86::VFRCZSSrr, X86::VFRCZSSrm, TB_NO_REVERSE}, |
| {X86::VGETEXPPBF16Z128r, X86::VGETEXPPBF16Z128m, 0}, |
| {X86::VGETEXPPBF16Z256r, X86::VGETEXPPBF16Z256m, 0}, |
| {X86::VGETEXPPBF16Zr, X86::VGETEXPPBF16Zm, 0}, |
| {X86::VGETEXPPDZ128r, X86::VGETEXPPDZ128m, 0}, |
| {X86::VGETEXPPDZ256r, X86::VGETEXPPDZ256m, 0}, |
| {X86::VGETEXPPDZr, X86::VGETEXPPDZm, 0}, |
| {X86::VGETEXPPHZ128r, X86::VGETEXPPHZ128m, 0}, |
| {X86::VGETEXPPHZ256r, X86::VGETEXPPHZ256m, 0}, |
| {X86::VGETEXPPHZr, X86::VGETEXPPHZm, 0}, |
| {X86::VGETEXPPSZ128r, X86::VGETEXPPSZ128m, 0}, |
| {X86::VGETEXPPSZ256r, X86::VGETEXPPSZ256m, 0}, |
| {X86::VGETEXPPSZr, X86::VGETEXPPSZm, 0}, |
| {X86::VGETMANTPBF16Z128rri, X86::VGETMANTPBF16Z128rmi, 0}, |
| {X86::VGETMANTPBF16Z256rri, X86::VGETMANTPBF16Z256rmi, 0}, |
| {X86::VGETMANTPBF16Zrri, X86::VGETMANTPBF16Zrmi, 0}, |
| {X86::VGETMANTPDZ128rri, X86::VGETMANTPDZ128rmi, 0}, |
| {X86::VGETMANTPDZ256rri, X86::VGETMANTPDZ256rmi, 0}, |
| {X86::VGETMANTPDZrri, X86::VGETMANTPDZrmi, 0}, |
| {X86::VGETMANTPHZ128rri, X86::VGETMANTPHZ128rmi, 0}, |
| {X86::VGETMANTPHZ256rri, X86::VGETMANTPHZ256rmi, 0}, |
| {X86::VGETMANTPHZrri, X86::VGETMANTPHZrmi, 0}, |
| {X86::VGETMANTPSZ128rri, X86::VGETMANTPSZ128rmi, 0}, |
| {X86::VGETMANTPSZ256rri, X86::VGETMANTPSZ256rmi, 0}, |
| {X86::VGETMANTPSZrri, X86::VGETMANTPSZrmi, 0}, |
| {X86::VMOV64toPQIZrr, X86::VMOVQI2PQIZrm, TB_NO_REVERSE}, |
| {X86::VMOV64toPQIrr, X86::VMOVQI2PQIrm, TB_NO_REVERSE}, |
| {X86::VMOV64toSDZrr, X86::VMOVSDZrm_alt, TB_NO_REVERSE}, |
| {X86::VMOV64toSDrr, X86::VMOVSDrm_alt, TB_NO_REVERSE}, |
| {X86::VMOVAPDYrr, X86::VMOVAPDYrm, TB_ALIGN_32}, |
| {X86::VMOVAPDZ128rr, X86::VMOVAPDZ128rm, TB_ALIGN_16}, |
| {X86::VMOVAPDZ256rr, X86::VMOVAPDZ256rm, TB_ALIGN_32}, |
| {X86::VMOVAPDZrr, X86::VMOVAPDZrm, TB_ALIGN_64}, |
| {X86::VMOVAPDrr, X86::VMOVAPDrm, TB_ALIGN_16}, |
| {X86::VMOVAPSYrr, X86::VMOVAPSYrm, TB_ALIGN_32}, |
| {X86::VMOVAPSZ128rr, X86::VMOVAPSZ128rm, TB_ALIGN_16}, |
| {X86::VMOVAPSZ256rr, X86::VMOVAPSZ256rm, TB_ALIGN_32}, |
| {X86::VMOVAPSZrr, X86::VMOVAPSZrm, TB_ALIGN_64}, |
| {X86::VMOVAPSrr, X86::VMOVAPSrm, TB_ALIGN_16}, |
| {X86::VMOVDDUPYrr, X86::VMOVDDUPYrm, 0}, |
| {X86::VMOVDDUPZ128rr, X86::VMOVDDUPZ128rm, TB_NO_REVERSE}, |
| {X86::VMOVDDUPZ256rr, X86::VMOVDDUPZ256rm, 0}, |
| {X86::VMOVDDUPZrr, X86::VMOVDDUPZrm, 0}, |
| {X86::VMOVDDUPrr, X86::VMOVDDUPrm, TB_NO_REVERSE}, |
| {X86::VMOVDI2PDIZrr, X86::VMOVDI2PDIZrm, 0}, |
| {X86::VMOVDI2PDIrr, X86::VMOVDI2PDIrm, 0}, |
| {X86::VMOVDI2SSZrr, X86::VMOVSSZrm_alt, 0}, |
| {X86::VMOVDI2SSrr, X86::VMOVSSrm_alt, 0}, |
| {X86::VMOVDQA32Z128rr, X86::VMOVDQA32Z128rm, TB_ALIGN_16}, |
| {X86::VMOVDQA32Z256rr, X86::VMOVDQA32Z256rm, TB_ALIGN_32}, |
| {X86::VMOVDQA32Zrr, X86::VMOVDQA32Zrm, TB_ALIGN_64}, |
| {X86::VMOVDQA64Z128rr, X86::VMOVDQA64Z128rm, TB_ALIGN_16}, |
| {X86::VMOVDQA64Z256rr, X86::VMOVDQA64Z256rm, TB_ALIGN_32}, |
| {X86::VMOVDQA64Zrr, X86::VMOVDQA64Zrm, TB_ALIGN_64}, |
| {X86::VMOVDQAYrr, X86::VMOVDQAYrm, TB_ALIGN_32}, |
| {X86::VMOVDQArr, X86::VMOVDQArm, TB_ALIGN_16}, |
| {X86::VMOVDQU16Z128rr, X86::VMOVDQU16Z128rm, 0}, |
| {X86::VMOVDQU16Z256rr, X86::VMOVDQU16Z256rm, 0}, |
| {X86::VMOVDQU16Zrr, X86::VMOVDQU16Zrm, 0}, |
| {X86::VMOVDQU32Z128rr, X86::VMOVDQU32Z128rm, 0}, |
| {X86::VMOVDQU32Z256rr, X86::VMOVDQU32Z256rm, 0}, |
| {X86::VMOVDQU32Zrr, X86::VMOVDQU32Zrm, 0}, |
| {X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128rm, 0}, |
| {X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256rm, 0}, |
| {X86::VMOVDQU64Zrr, X86::VMOVDQU64Zrm, 0}, |
| {X86::VMOVDQU8Z128rr, X86::VMOVDQU8Z128rm, 0}, |
| {X86::VMOVDQU8Z256rr, X86::VMOVDQU8Z256rm, 0}, |
| {X86::VMOVDQU8Zrr, X86::VMOVDQU8Zrm, 0}, |
| {X86::VMOVDQUYrr, X86::VMOVDQUYrm, 0}, |
| {X86::VMOVDQUrr, X86::VMOVDQUrm, 0}, |
| {X86::VMOVSHDUPYrr, X86::VMOVSHDUPYrm, 0}, |
| {X86::VMOVSHDUPZ128rr, X86::VMOVSHDUPZ128rm, 0}, |
| {X86::VMOVSHDUPZ256rr, X86::VMOVSHDUPZ256rm, 0}, |
| {X86::VMOVSHDUPZrr, X86::VMOVSHDUPZrm, 0}, |
| {X86::VMOVSHDUPrr, X86::VMOVSHDUPrm, 0}, |
| {X86::VMOVSLDUPYrr, X86::VMOVSLDUPYrm, 0}, |
| {X86::VMOVSLDUPZ128rr, X86::VMOVSLDUPZ128rm, 0}, |
| {X86::VMOVSLDUPZ256rr, X86::VMOVSLDUPZ256rm, 0}, |
| {X86::VMOVSLDUPZrr, X86::VMOVSLDUPZrm, 0}, |
| {X86::VMOVSLDUPrr, X86::VMOVSLDUPrm, 0}, |
| {X86::VMOVUPDYrr, X86::VMOVUPDYrm, 0}, |
| {X86::VMOVUPDZ128rr, X86::VMOVUPDZ128rm, 0}, |
| {X86::VMOVUPDZ256rr, X86::VMOVUPDZ256rm, 0}, |
| {X86::VMOVUPDZrr, X86::VMOVUPDZrm, 0}, |
| {X86::VMOVUPDrr, X86::VMOVUPDrm, 0}, |
| {X86::VMOVUPSYrr, X86::VMOVUPSYrm, 0}, |
| {X86::VMOVUPSZ128rr, X86::VMOVUPSZ128rm, 0}, |
| {X86::VMOVUPSZ256rr, X86::VMOVUPSZ256rm, 0}, |
| {X86::VMOVUPSZrr, X86::VMOVUPSZrm, 0}, |
| {X86::VMOVUPSrr, X86::VMOVUPSrm, 0}, |
| {X86::VMOVW2SHrr, X86::VMOVWrm, TB_NO_REVERSE}, |
| {X86::VMOVZPDILo2PDIZrr, X86::VMOVZPDILo2PDIZrm, TB_NO_REVERSE}, |
| {X86::VMOVZPQILo2PQIZrr, X86::VMOVQI2PQIZrm, TB_NO_REVERSE}, |
| {X86::VMOVZPQILo2PQIrr, X86::VMOVQI2PQIrm, TB_NO_REVERSE}, |
| {X86::VMOVZPWILo2PWIZrr, X86::VMOVZPWILo2PWIZrm, TB_NO_REVERSE}, |
| {X86::VPABSBYrr, X86::VPABSBYrm, 0}, |
| {X86::VPABSBZ128rr, X86::VPABSBZ128rm, 0}, |
| {X86::VPABSBZ256rr, X86::VPABSBZ256rm, 0}, |
| {X86::VPABSBZrr, X86::VPABSBZrm, 0}, |
| {X86::VPABSBrr, X86::VPABSBrm, 0}, |
| {X86::VPABSDYrr, X86::VPABSDYrm, 0}, |
| {X86::VPABSDZ128rr, X86::VPABSDZ128rm, 0}, |
| {X86::VPABSDZ256rr, X86::VPABSDZ256rm, 0}, |
| {X86::VPABSDZrr, X86::VPABSDZrm, 0}, |
| {X86::VPABSDrr, X86::VPABSDrm, 0}, |
| {X86::VPABSQZ128rr, X86::VPABSQZ128rm, 0}, |
| {X86::VPABSQZ256rr, X86::VPABSQZ256rm, 0}, |
| {X86::VPABSQZrr, X86::VPABSQZrm, 0}, |
| {X86::VPABSWYrr, X86::VPABSWYrm, 0}, |
| {X86::VPABSWZ128rr, X86::VPABSWZ128rm, 0}, |
| {X86::VPABSWZ256rr, X86::VPABSWZ256rm, 0}, |
| {X86::VPABSWZrr, X86::VPABSWZrm, 0}, |
| {X86::VPABSWrr, X86::VPABSWrm, 0}, |
| {X86::VPBROADCASTBYrr, X86::VPBROADCASTBYrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTBZ128rr, X86::VPBROADCASTBZ128rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTBZ256rr, X86::VPBROADCASTBZ256rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTBZrr, X86::VPBROADCASTBZrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTBrr, X86::VPBROADCASTBrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTDYrr, X86::VPBROADCASTDYrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTDZ128rr, X86::VPBROADCASTDZ128rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTDZ256rr, X86::VPBROADCASTDZ256rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTDZrr, X86::VPBROADCASTDZrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTDrr, X86::VPBROADCASTDrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTQYrr, X86::VPBROADCASTQYrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTQZ128rr, X86::VPBROADCASTQZ128rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTQZ256rr, X86::VPBROADCASTQZ256rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTQZrr, X86::VPBROADCASTQZrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTQrr, X86::VPBROADCASTQrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTWYrr, X86::VPBROADCASTWYrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTWZ128rr, X86::VPBROADCASTWZ128rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTWZ256rr, X86::VPBROADCASTWZ256rm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTWZrr, X86::VPBROADCASTWZrm, TB_NO_REVERSE}, |
| {X86::VPBROADCASTWrr, X86::VPBROADCASTWrm, TB_NO_REVERSE}, |
| {X86::VPCMPESTRIrri, X86::VPCMPESTRIrmi, 0}, |
| {X86::VPCMPESTRMrri, X86::VPCMPESTRMrmi, 0}, |
| {X86::VPCMPISTRIrri, X86::VPCMPISTRIrmi, 0}, |
| {X86::VPCMPISTRMrri, X86::VPCMPISTRMrmi, 0}, |
| {X86::VPCONFLICTDZ128rr, X86::VPCONFLICTDZ128rm, 0}, |
| {X86::VPCONFLICTDZ256rr, X86::VPCONFLICTDZ256rm, 0}, |
| {X86::VPCONFLICTDZrr, X86::VPCONFLICTDZrm, 0}, |
| {X86::VPCONFLICTQZ128rr, X86::VPCONFLICTQZ128rm, 0}, |
| {X86::VPCONFLICTQZ256rr, X86::VPCONFLICTQZ256rm, 0}, |
| {X86::VPCONFLICTQZrr, X86::VPCONFLICTQZrm, 0}, |
| {X86::VPERMILPDYri, X86::VPERMILPDYmi, 0}, |
| {X86::VPERMILPDZ128ri, X86::VPERMILPDZ128mi, 0}, |
| {X86::VPERMILPDZ256ri, X86::VPERMILPDZ256mi, 0}, |
| {X86::VPERMILPDZri, X86::VPERMILPDZmi, 0}, |
| {X86::VPERMILPDri, X86::VPERMILPDmi, 0}, |
| {X86::VPERMILPSYri, X86::VPERMILPSYmi, 0}, |
| {X86::VPERMILPSZ128ri, X86::VPERMILPSZ128mi, 0}, |
| {X86::VPERMILPSZ256ri, X86::VPERMILPSZ256mi, 0}, |
| {X86::VPERMILPSZri, X86::VPERMILPSZmi, 0}, |
| {X86::VPERMILPSri, X86::VPERMILPSmi, 0}, |
| {X86::VPERMPDYri, X86::VPERMPDYmi, 0}, |
| {X86::VPERMPDZ256ri, X86::VPERMPDZ256mi, 0}, |
| {X86::VPERMPDZri, X86::VPERMPDZmi, 0}, |
| {X86::VPERMQYri, X86::VPERMQYmi, 0}, |
| {X86::VPERMQZ256ri, X86::VPERMQZ256mi, 0}, |
| {X86::VPERMQZri, X86::VPERMQZmi, 0}, |
| {X86::VPEXPANDBZ128rr, X86::VPEXPANDBZ128rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDBZ256rr, X86::VPEXPANDBZ256rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDBZrr, X86::VPEXPANDBZrm, TB_NO_REVERSE}, |
| {X86::VPEXPANDDZ128rr, X86::VPEXPANDDZ128rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDDZ256rr, X86::VPEXPANDDZ256rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDDZrr, X86::VPEXPANDDZrm, TB_NO_REVERSE}, |
| {X86::VPEXPANDQZ128rr, X86::VPEXPANDQZ128rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDQZ256rr, X86::VPEXPANDQZ256rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDQZrr, X86::VPEXPANDQZrm, TB_NO_REVERSE}, |
| {X86::VPEXPANDWZ128rr, X86::VPEXPANDWZ128rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDWZ256rr, X86::VPEXPANDWZ256rm, TB_NO_REVERSE}, |
| {X86::VPEXPANDWZrr, X86::VPEXPANDWZrm, TB_NO_REVERSE}, |
| {X86::VPHADDBDrr, X86::VPHADDBDrm, 0}, |
| {X86::VPHADDBQrr, X86::VPHADDBQrm, 0}, |
| {X86::VPHADDBWrr, X86::VPHADDBWrm, 0}, |
| {X86::VPHADDDQrr, X86::VPHADDDQrm, 0}, |
| {X86::VPHADDUBDrr, X86::VPHADDUBDrm, 0}, |
| {X86::VPHADDUBQrr, X86::VPHADDUBQrm, 0}, |
| {X86::VPHADDUBWrr, X86::VPHADDUBWrm, 0}, |
| {X86::VPHADDUDQrr, X86::VPHADDUDQrm, 0}, |
| {X86::VPHADDUWDrr, X86::VPHADDUWDrm, 0}, |
| {X86::VPHADDUWQrr, X86::VPHADDUWQrm, 0}, |
| {X86::VPHADDWDrr, X86::VPHADDWDrm, 0}, |
| {X86::VPHADDWQrr, X86::VPHADDWQrm, 0}, |
| {X86::VPHMINPOSUWrr, X86::VPHMINPOSUWrm, 0}, |
| {X86::VPHSUBBWrr, X86::VPHSUBBWrm, 0}, |
| {X86::VPHSUBDQrr, X86::VPHSUBDQrm, 0}, |
| {X86::VPHSUBWDrr, X86::VPHSUBWDrm, 0}, |
| {X86::VPLZCNTDZ128rr, X86::VPLZCNTDZ128rm, 0}, |
| {X86::VPLZCNTDZ256rr, X86::VPLZCNTDZ256rm, 0}, |
| {X86::VPLZCNTDZrr, X86::VPLZCNTDZrm, 0}, |
| {X86::VPLZCNTQZ128rr, X86::VPLZCNTQZ128rm, 0}, |
| {X86::VPLZCNTQZ256rr, X86::VPLZCNTQZ256rm, 0}, |
| {X86::VPLZCNTQZrr, X86::VPLZCNTQZrm, 0}, |
| {X86::VPMOVSXBDYrr, X86::VPMOVSXBDYrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBDZ128rr, X86::VPMOVSXBDZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBDZ256rr, X86::VPMOVSXBDZ256rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBDZrr, X86::VPMOVSXBDZrm, 0}, |
| {X86::VPMOVSXBDrr, X86::VPMOVSXBDrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBQYrr, X86::VPMOVSXBQYrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBQZ128rr, X86::VPMOVSXBQZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBQZ256rr, X86::VPMOVSXBQZ256rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBQZrr, X86::VPMOVSXBQZrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBQrr, X86::VPMOVSXBQrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBWYrr, X86::VPMOVSXBWYrm, 0}, |
| {X86::VPMOVSXBWZ128rr, X86::VPMOVSXBWZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXBWZ256rr, X86::VPMOVSXBWZ256rm, 0}, |
| {X86::VPMOVSXBWZrr, X86::VPMOVSXBWZrm, 0}, |
| {X86::VPMOVSXBWrr, X86::VPMOVSXBWrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXDQYrr, X86::VPMOVSXDQYrm, 0}, |
| {X86::VPMOVSXDQZ128rr, X86::VPMOVSXDQZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXDQZ256rr, X86::VPMOVSXDQZ256rm, 0}, |
| {X86::VPMOVSXDQZrr, X86::VPMOVSXDQZrm, 0}, |
| {X86::VPMOVSXDQrr, X86::VPMOVSXDQrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXWDYrr, X86::VPMOVSXWDYrm, 0}, |
| {X86::VPMOVSXWDZ128rr, X86::VPMOVSXWDZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXWDZ256rr, X86::VPMOVSXWDZ256rm, 0}, |
| {X86::VPMOVSXWDZrr, X86::VPMOVSXWDZrm, 0}, |
| {X86::VPMOVSXWDrr, X86::VPMOVSXWDrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXWQYrr, X86::VPMOVSXWQYrm, TB_NO_REVERSE}, |
| {X86::VPMOVSXWQZ128rr, X86::VPMOVSXWQZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXWQZ256rr, X86::VPMOVSXWQZ256rm, TB_NO_REVERSE}, |
| {X86::VPMOVSXWQZrr, X86::VPMOVSXWQZrm, 0}, |
| {X86::VPMOVSXWQrr, X86::VPMOVSXWQrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBDYrr, X86::VPMOVZXBDYrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBDZ128rr, X86::VPMOVZXBDZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBDZ256rr, X86::VPMOVZXBDZ256rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBDZrr, X86::VPMOVZXBDZrm, 0}, |
| {X86::VPMOVZXBDrr, X86::VPMOVZXBDrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBQYrr, X86::VPMOVZXBQYrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBQZ128rr, X86::VPMOVZXBQZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBQZ256rr, X86::VPMOVZXBQZ256rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBQZrr, X86::VPMOVZXBQZrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBQrr, X86::VPMOVZXBQrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBWYrr, X86::VPMOVZXBWYrm, 0}, |
| {X86::VPMOVZXBWZ128rr, X86::VPMOVZXBWZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXBWZ256rr, X86::VPMOVZXBWZ256rm, 0}, |
| {X86::VPMOVZXBWZrr, X86::VPMOVZXBWZrm, 0}, |
| {X86::VPMOVZXBWrr, X86::VPMOVZXBWrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXDQYrr, X86::VPMOVZXDQYrm, 0}, |
| {X86::VPMOVZXDQZ128rr, X86::VPMOVZXDQZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXDQZ256rr, X86::VPMOVZXDQZ256rm, 0}, |
| {X86::VPMOVZXDQZrr, X86::VPMOVZXDQZrm, 0}, |
| {X86::VPMOVZXDQrr, X86::VPMOVZXDQrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXWDYrr, X86::VPMOVZXWDYrm, 0}, |
| {X86::VPMOVZXWDZ128rr, X86::VPMOVZXWDZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXWDZ256rr, X86::VPMOVZXWDZ256rm, 0}, |
| {X86::VPMOVZXWDZrr, X86::VPMOVZXWDZrm, 0}, |
| {X86::VPMOVZXWDrr, X86::VPMOVZXWDrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXWQYrr, X86::VPMOVZXWQYrm, TB_NO_REVERSE}, |
| {X86::VPMOVZXWQZ128rr, X86::VPMOVZXWQZ128rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXWQZ256rr, X86::VPMOVZXWQZ256rm, TB_NO_REVERSE}, |
| {X86::VPMOVZXWQZrr, X86::VPMOVZXWQZrm, 0}, |
| {X86::VPMOVZXWQrr, X86::VPMOVZXWQrm, TB_NO_REVERSE}, |
| {X86::VPOPCNTBZ128rr, X86::VPOPCNTBZ128rm, 0}, |
| {X86::VPOPCNTBZ256rr, X86::VPOPCNTBZ256rm, 0}, |
| {X86::VPOPCNTBZrr, X86::VPOPCNTBZrm, 0}, |
| {X86::VPOPCNTDZ128rr, X86::VPOPCNTDZ128rm, 0}, |
| {X86::VPOPCNTDZ256rr, X86::VPOPCNTDZ256rm, 0}, |
| {X86::VPOPCNTDZrr, X86::VPOPCNTDZrm, 0}, |
| {X86::VPOPCNTQZ128rr, X86::VPOPCNTQZ128rm, 0}, |
| {X86::VPOPCNTQZ256rr, X86::VPOPCNTQZ256rm, 0}, |
| {X86::VPOPCNTQZrr, X86::VPOPCNTQZrm, 0}, |
| {X86::VPOPCNTWZ128rr, X86::VPOPCNTWZ128rm, 0}, |
| {X86::VPOPCNTWZ256rr, X86::VPOPCNTWZ256rm, 0}, |
| {X86::VPOPCNTWZrr, X86::VPOPCNTWZrm, 0}, |
| {X86::VPROLDZ128ri, X86::VPROLDZ128mi, 0}, |
| {X86::VPROLDZ256ri, X86::VPROLDZ256mi, 0}, |
| {X86::VPROLDZri, X86::VPROLDZmi, 0}, |
| {X86::VPROLQZ128ri, X86::VPROLQZ128mi, 0}, |
| {X86::VPROLQZ256ri, X86::VPROLQZ256mi, 0}, |
| {X86::VPROLQZri, X86::VPROLQZmi, 0}, |
| {X86::VPRORDZ128ri, X86::VPRORDZ128mi, 0}, |
| {X86::VPRORDZ256ri, X86::VPRORDZ256mi, 0}, |
| {X86::VPRORDZri, X86::VPRORDZmi, 0}, |
| {X86::VPRORQZ128ri, X86::VPRORQZ128mi, 0}, |
| {X86::VPRORQZ256ri, X86::VPRORQZ256mi, 0}, |
| {X86::VPRORQZri, X86::VPRORQZmi, 0}, |
| {X86::VPROTBri, X86::VPROTBmi, 0}, |
| {X86::VPROTBrr, X86::VPROTBmr, 0}, |
| {X86::VPROTDri, X86::VPROTDmi, 0}, |
| {X86::VPROTDrr, X86::VPROTDmr, 0}, |
| {X86::VPROTQri, X86::VPROTQmi, 0}, |
| {X86::VPROTQrr, X86::VPROTQmr, 0}, |
| {X86::VPROTWri, X86::VPROTWmi, 0}, |
| {X86::VPROTWrr, X86::VPROTWmr, 0}, |
| {X86::VPSHABrr, X86::VPSHABmr, 0}, |
| {X86::VPSHADrr, X86::VPSHADmr, 0}, |
| {X86::VPSHAQrr, X86::VPSHAQmr, 0}, |
| {X86::VPSHAWrr, X86::VPSHAWmr, 0}, |
| {X86::VPSHLBrr, X86::VPSHLBmr, 0}, |
| {X86::VPSHLDrr, X86::VPSHLDmr, 0}, |
| {X86::VPSHLQrr, X86::VPSHLQmr, 0}, |
| {X86::VPSHLWrr, X86::VPSHLWmr, 0}, |
| {X86::VPSHUFDYri, X86::VPSHUFDYmi, 0}, |
| {X86::VPSHUFDZ128ri, X86::VPSHUFDZ128mi, 0}, |
| {X86::VPSHUFDZ256ri, X86::VPSHUFDZ256mi, 0}, |
| {X86::VPSHUFDZri, X86::VPSHUFDZmi, 0}, |
| {X86::VPSHUFDri, X86::VPSHUFDmi, 0}, |
| {X86::VPSHUFHWYri, X86::VPSHUFHWYmi, 0}, |
| {X86::VPSHUFHWZ128ri, X86::VPSHUFHWZ128mi, 0}, |
| {X86::VPSHUFHWZ256ri, X86::VPSHUFHWZ256mi, 0}, |
| {X86::VPSHUFHWZri, X86::VPSHUFHWZmi, 0}, |
| {X86::VPSHUFHWri, X86::VPSHUFHWmi, 0}, |
| {X86::VPSHUFLWYri, X86::VPSHUFLWYmi, 0}, |
| {X86::VPSHUFLWZ128ri, X86::VPSHUFLWZ128mi, 0}, |
| {X86::VPSHUFLWZ256ri, X86::VPSHUFLWZ256mi, 0}, |
| {X86::VPSHUFLWZri, X86::VPSHUFLWZmi, 0}, |
| {X86::VPSHUFLWri, X86::VPSHUFLWmi, 0}, |
| {X86::VPSLLDQZ128ri, X86::VPSLLDQZ128mi, 0}, |
| {X86::VPSLLDQZ256ri, X86::VPSLLDQZ256mi, 0}, |
| {X86::VPSLLDQZri, X86::VPSLLDQZmi, 0}, |
| {X86::VPSLLDZ128ri, X86::VPSLLDZ128mi, 0}, |
| {X86::VPSLLDZ256ri, X86::VPSLLDZ256mi, 0}, |
| {X86::VPSLLDZri, X86::VPSLLDZmi, 0}, |
| {X86::VPSLLQZ128ri, X86::VPSLLQZ128mi, 0}, |
| {X86::VPSLLQZ256ri, X86::VPSLLQZ256mi, 0}, |
| {X86::VPSLLQZri, X86::VPSLLQZmi, 0}, |
| {X86::VPSLLWZ128ri, X86::VPSLLWZ128mi, 0}, |
| {X86::VPSLLWZ256ri, X86::VPSLLWZ256mi, 0}, |
| {X86::VPSLLWZri, X86::VPSLLWZmi, 0}, |
| {X86::VPSRADZ128ri, X86::VPSRADZ128mi, 0}, |
| {X86::VPSRADZ256ri, X86::VPSRADZ256mi, 0}, |
| {X86::VPSRADZri, X86::VPSRADZmi, 0}, |
| {X86::VPSRAQZ128ri, X86::VPSRAQZ128mi, 0}, |
| {X86::VPSRAQZ256ri, X86::VPSRAQZ256mi, 0}, |
| {X86::VPSRAQZri, X86::VPSRAQZmi, 0}, |
| {X86::VPSRAWZ128ri, X86::VPSRAWZ128mi, 0}, |
| {X86::VPSRAWZ256ri, X86::VPSRAWZ256mi, 0}, |
| {X86::VPSRAWZri, X86::VPSRAWZmi, 0}, |
| {X86::VPSRLDQZ128ri, X86::VPSRLDQZ128mi, 0}, |
| {X86::VPSRLDQZ256ri, X86::VPSRLDQZ256mi, 0}, |
| {X86::VPSRLDQZri, X86::VPSRLDQZmi, 0}, |
| {X86::VPSRLDZ128ri, X86::VPSRLDZ128mi, 0}, |
| {X86::VPSRLDZ256ri, X86::VPSRLDZ256mi, 0}, |
| {X86::VPSRLDZri, X86::VPSRLDZmi, 0}, |
| {X86::VPSRLQZ128ri, X86::VPSRLQZ128mi, 0}, |
| {X86::VPSRLQZ256ri, X86::VPSRLQZ256mi, 0}, |
| {X86::VPSRLQZri, X86::VPSRLQZmi, 0}, |
| {X86::VPSRLWZ128ri, X86::VPSRLWZ128mi, 0}, |
| {X86::VPSRLWZ256ri, X86::VPSRLWZ256mi, 0}, |
| {X86::VPSRLWZri, X86::VPSRLWZmi, 0}, |
| {X86::VPTESTYrr, X86::VPTESTYrm, 0}, |
| {X86::VPTESTrr, X86::VPTESTrm, 0}, |
| {X86::VRCP14PDZ128r, X86::VRCP14PDZ128m, 0}, |
| {X86::VRCP14PDZ256r, X86::VRCP14PDZ256m, 0}, |
| {X86::VRCP14PDZr, X86::VRCP14PDZm, 0}, |
| {X86::VRCP14PSZ128r, X86::VRCP14PSZ128m, 0}, |
| {X86::VRCP14PSZ256r, X86::VRCP14PSZ256m, 0}, |
| {X86::VRCP14PSZr, X86::VRCP14PSZm, 0}, |
| {X86::VRCP28PDZr, X86::VRCP28PDZm, 0}, |
| {X86::VRCP28PSZr, X86::VRCP28PSZm, 0}, |
| {X86::VRCPPBF16Z128r, X86::VRCPPBF16Z128m, 0}, |
| {X86::VRCPPBF16Z256r, X86::VRCPPBF16Z256m, 0}, |
| {X86::VRCPPBF16Zr, X86::VRCPPBF16Zm, 0}, |
| {X86::VRCPPHZ128r, X86::VRCPPHZ128m, 0}, |
| {X86::VRCPPHZ256r, X86::VRCPPHZ256m, 0}, |
| {X86::VRCPPHZr, X86::VRCPPHZm, 0}, |
| {X86::VRCPPSYr, X86::VRCPPSYm, 0}, |
| {X86::VRCPPSr, X86::VRCPPSm, 0}, |
| {X86::VREDUCENEPBF16Z128rri, X86::VREDUCENEPBF16Z128rmi, 0}, |
| {X86::VREDUCENEPBF16Z256rri, X86::VREDUCENEPBF16Z256rmi, 0}, |
| {X86::VREDUCENEPBF16Zrri, X86::VREDUCENEPBF16Zrmi, 0}, |
| {X86::VREDUCEPDZ128rri, X86::VREDUCEPDZ128rmi, 0}, |
| {X86::VREDUCEPDZ256rri, X86::VREDUCEPDZ256rmi, 0}, |
| {X86::VREDUCEPDZrri, X86::VREDUCEPDZrmi, 0}, |
| {X86::VREDUCEPHZ128rri, X86::VREDUCEPHZ128rmi, 0}, |
| {X86::VREDUCEPHZ256rri, X86::VREDUCEPHZ256rmi, 0}, |
| {X86:: |
