| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 |
| # RUN: llc -mtriple=riscv64 -o - -global-isel -run-pass=none -verify-machineinstrs %s | FileCheck %s |
| # REQUIRES: riscv64-registered-target |
| |
| --- |
| name: test_copy_physical_to_virtual_nxv1s8 |
| legalized: true |
| regBankSelected: false |
| selected: false |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: _, preferred-register: '' } |
| liveins: |
| body: | |
| bb.0: |
| liveins: $v8 |
| |
| ; CHECK-LABEL: name: test_copy_physical_to_virtual_nxv1s8 |
| ; CHECK: liveins: $v8 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8 |
| %0:_(<vscale x 1 x s8>) = COPY $v8 |
| ... |
| |
| --- |
| name: test_copy_physical_to_virtual_nxv16s8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.1.entry: |
| liveins: $v8 |
| ; CHECK-LABEL: name: test_copy_physical_to_virtual_nxv16s8 |
| ; CHECK: liveins: $v8 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8 |
| %0:_(<vscale x 16 x s8>) = COPY $v8 |
| |
| ... |
| |
| --- |
| name: test_copy_virtual_to_physical |
| legalized: true |
| regBankSelected: false |
| selected: false |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: _, preferred-register: '' } |
| liveins: |
| body: | |
| bb.0: |
| liveins: $v8 |
| |
| ; CHECK-LABEL: name: test_copy_virtual_to_physical |
| ; CHECK: liveins: $v8 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = IMPLICIT_DEF |
| ; CHECK-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s8>) |
| ; CHECK-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 1 x s8>) = IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 1 x s8>) |
| PseudoRET implicit $v8 |
| ... |