; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 -mattr=+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA64

define i32 @m_offset_neg_2049(ptr %p) nounwind {
; LA32-LABEL: m_offset_neg_2049:
; LA32:       # %bb.0:
; LA32-NEXT:    addi.w $a0, $a0, -2048
; LA32-NEXT:    addi.w $a0, $a0, -1
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, 0
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_neg_2049:
; LA64:       # %bb.0:
; LA64-NEXT:    addi.d $a0, $a0, -2048
; LA64-NEXT:    addi.d $a0, $a0, -1
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, 0
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = getelementptr inbounds i8, ptr %p, i32 -2049
  %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
  ret i32 %2
}

define i32 @m_offset_neg_2048(ptr %p) nounwind {
; LA32-LABEL: m_offset_neg_2048:
; LA32:       # %bb.0:
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, -2048
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_neg_2048:
; LA64:       # %bb.0:
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, -2048
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = getelementptr inbounds i8, ptr %p, i32 -2048
  %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
  ret i32 %2
}

define i32 @m_offset_neg_1(ptr %p) nounwind {
; LA32-LABEL: m_offset_neg_1:
; LA32:       # %bb.0:
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, -1
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_neg_1:
; LA64:       # %bb.0:
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, -1
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = getelementptr inbounds i8, ptr %p, i32 -1
  %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
  ret i32 %2
}

define i32 @m_offset_0(ptr %p) nounwind {
; LA32-LABEL: m_offset_0:
; LA32:       # %bb.0:
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, 0
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_0:
; LA64:       # %bb.0:
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, 0
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %p)
  ret i32 %1
}

define i32 @m_offset_1(ptr %p) nounwind {
; LA32-LABEL: m_offset_1:
; LA32:       # %bb.0:
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, 1
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_1:
; LA64:       # %bb.0:
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, 1
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = getelementptr inbounds i8, ptr %p, i32 1
  %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
  ret i32 %2
}

define i32 @m_offset_2047(ptr %p) nounwind {
; LA32-LABEL: m_offset_2047:
; LA32:       # %bb.0:
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, 2047
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_2047:
; LA64:       # %bb.0:
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, 2047
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = getelementptr inbounds i8, ptr %p, i32 2047
  %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
  ret i32 %2
}

define i32 @m_offset_2048(ptr %p) nounwind {
; LA32-LABEL: m_offset_2048:
; LA32:       # %bb.0:
; LA32-NEXT:    addi.w $a0, $a0, 2047
; LA32-NEXT:    addi.w $a0, $a0, 1
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, 0
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_offset_2048:
; LA64:       # %bb.0:
; LA64-NEXT:    addi.d $a0, $a0, 2047
; LA64-NEXT:    addi.d $a0, $a0, 1
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, 0
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = getelementptr inbounds i8, ptr %p, i32 2048
  %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
  ret i32 %2
}

define i32 @m_constant_0() nounwind {
; LA32-LABEL: m_constant_0:
; LA32:       # %bb.0:
; LA32-NEXT:  .Lpcadd_hi0:
; LA32-NEXT:    pcaddu12i $a0, %pcadd_hi20(.LCPI7_0)
; LA32-NEXT:    #APP
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_constant_0:
; LA64:       # %bb.0:
; LA64-NEXT:    pcalau12i $a0, %pc_hi20(.LCPI7_0)
; LA64-NEXT:    #APP
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = call i32 asm sideeffect "", "=r,m"(i64 0)
  ret i32 %1
}

define i32 @m_constant_1() nounwind {
; LA32-LABEL: m_constant_1:
; LA32:       # %bb.0:
; LA32-NEXT:  .Lpcadd_hi1:
; LA32-NEXT:    pcaddu12i $a0, %pcadd_hi20(.LCPI8_0)
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a0, %pcadd_lo12(.Lpcadd_hi10)
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_constant_1:
; LA64:       # %bb.0:
; LA64-NEXT:    pcalau12i $a0, %pc_hi20(.LCPI8_0)
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a0, %pc_lo12(.LCPI8_0)
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = call i32 asm sideeffect "ld.w $0, $1", "=r,m"(i64 1)
  ret i32 %1
}

@g_i32 = dso_local global i32 0

define i32 @m_addr_pcrel() nounwind {
; LA32-LABEL: m_addr_pcrel:
; LA32:       # %bb.0:
; LA32-NEXT:  .Lpcadd_hi2:
; LA32-NEXT:    pcaddu12i $a1, %pcadd_hi20(g_i32)
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a1, %pcadd_lo12(.Lpcadd_hi20)
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_addr_pcrel:
; LA64:       # %bb.0:
; LA64-NEXT:    pcalau12i $a1, %pc_hi20(g_i32)
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a1, %pc_lo12(g_i32)
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = tail call i32 asm sideeffect "ld.w $0, $1", "=&r,*m"(ptr nonnull elementtype(i32) @g_i32)
  ret i32 %1
}

define i32 @m_addr_should_not_fold() nounwind {
; LA32-LABEL: m_addr_should_not_fold:
; LA32:       # %bb.0:
; LA32-NEXT:  .Lpcadd_hi3:
; LA32-NEXT:    pcaddu12i $a0, %pcadd_hi20(g_i32)
; LA32-NEXT:    addi.w $a1, $a0, %pcadd_lo12(.Lpcadd_hi3)
; LA32-NEXT:    #APP
; LA32-NEXT:    ld.w $a0, $a1, 0
; LA32-NEXT:    #NO_APP
; LA32-NEXT:    ret
;
; LA64-LABEL: m_addr_should_not_fold:
; LA64:       # %bb.0:
; LA64-NEXT:    pcalau12i $a0, %pc_hi20(g_i32)
; LA64-NEXT:    addi.d $a1, $a0, %pc_lo12(g_i32)
; LA64-NEXT:    #APP
; LA64-NEXT:    ld.w $a0, $a1, 0
; LA64-NEXT:    #NO_APP
; LA64-NEXT:    ret
  %1 = tail call i32 asm sideeffect "ld.w $0, $1, 0", "=&r,r,~{memory}"(ptr nonnull @g_i32)
  ret i32 %1
}