; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD
; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI
; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI

define bfloat @Const0() {
; CHECK-LABEL: Const0:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi d0, #0000000000000000
; CHECK-NEXT:    ret
entry:
  ret bfloat 0xR0000
}

define bfloat @Const1() {
; CHECK-FP16-LABEL: Const1:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fmov h0, #1.00000000
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const1:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI1_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI1_0]
; CHECK-NOFP16-NEXT:    ret
entry:
  ret bfloat 0xR3C00
}

define bfloat @Const2() {
; CHECK-FP16-LABEL: Const2:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fmov h0, #0.12500000
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const2:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI2_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI2_0]
; CHECK-NOFP16-NEXT:    ret
entry:
  ret bfloat 0xR3000
}

define bfloat @Const3() {
; CHECK-FP16-LABEL: Const3:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fmov h0, #30.00000000
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const3:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI3_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI3_0]
; CHECK-NOFP16-NEXT:    ret
entry:
  ret bfloat 0xR4F80
}

define bfloat @Const4() {
; CHECK-FP16-LABEL: Const4:
; CHECK-FP16:       // %bb.0: // %entry
; CHECK-FP16-NEXT:    fmov h0, #31.00000000
; CHECK-FP16-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const4:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI4_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI4_0]
; CHECK-NOFP16-NEXT:    ret
entry:
  ret bfloat 0xR4FC0
}

define bfloat @Const5() {
; CHECK-FP16-SD-LABEL: Const5:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    mov w8, #12272 // =0x2ff0
; CHECK-FP16-SD-NEXT:    fmov h0, w8
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const5:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI5_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI5_0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: Const5:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    adrp x8, .LCPI5_0
; CHECK-FP16-GI-NEXT:    ldr h0, [x8, :lo12:.LCPI5_0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  ret bfloat 0xR2FF0
}

define bfloat @Const6() {
; CHECK-FP16-SD-LABEL: Const6:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    mov w8, #20417 // =0x4fc1
; CHECK-FP16-SD-NEXT:    fmov h0, w8
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const6:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI6_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI6_0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: Const6:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    adrp x8, .LCPI6_0
; CHECK-FP16-GI-NEXT:    ldr h0, [x8, :lo12:.LCPI6_0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  ret bfloat 0xR4FC1
}

define bfloat @Const7() {
; CHECK-FP16-SD-LABEL: Const7:
; CHECK-FP16-SD:       // %bb.0: // %entry
; CHECK-FP16-SD-NEXT:    mov w8, #20480 // =0x5000
; CHECK-FP16-SD-NEXT:    fmov h0, w8
; CHECK-FP16-SD-NEXT:    ret
;
; CHECK-NOFP16-LABEL: Const7:
; CHECK-NOFP16:       // %bb.0: // %entry
; CHECK-NOFP16-NEXT:    adrp x8, .LCPI7_0
; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI7_0]
; CHECK-NOFP16-NEXT:    ret
;
; CHECK-FP16-GI-LABEL: Const7:
; CHECK-FP16-GI:       // %bb.0: // %entry
; CHECK-FP16-GI-NEXT:    adrp x8, .LCPI7_0
; CHECK-FP16-GI-NEXT:    ldr h0, [x8, :lo12:.LCPI7_0]
; CHECK-FP16-GI-NEXT:    ret
entry:
  ret bfloat 0xR5000
}

;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-NOFP16-GI: {{.*}}
; CHECK-NOFP16-SD: {{.*}}