)]}'
{
  "commit": "f87daca0d22a35a8ea5b8221e07835209942300e",
  "tree": "02529a56de3d7af5b31deb638b4a9e2dd02d4555",
  "parents": [
    "84d9740c265501259f186b0899daeabc9cc14cff"
  ],
  "author": {
    "name": "Simon Tatham",
    "email": "simon.tatham@arm.com",
    "time": "Tue Jul 02 11:26:11 2019 +0000"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Sun Oct 18 20:28:32 2020 -0700"
  },
  "message": "[ARM] MVE: allow soft-float ABI to pass vector types.\n\nPassing a vector type over the soft-float ABI involves it being split\ninto four GPRs, so the first thing that has to happen at the start of\nthe function is to recombine those into a vector register. The ABI\ntypes all vectors as v2f64, so we need to support BUILD_VECTOR for\nthat type, which I do in this patch by allowing it to be expanded in\nterms of INSERT_VECTOR_ELT, and writing an ISel pattern for that in\nturn. Similarly, I provide a rule for EXTRACT_VECTOR_ELT so that a\nreturned vector can be marshalled back into GPRs.\n\nWhile I\u0027m here, I\u0027ve also added ISD::UNDEF to the list of operations\nwe turn back on in `setAllExpand`, because I noticed that otherwise it\ngets expanded into a BUILD_VECTOR with explicit zero inputs, leading\nto pointless machine instructions to zero out a vector register that\u0027s\nabout to have every lane overwritten of in any case.\n\nReviewers: dmgreen, ostannard\n\nSubscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits\n\nTags: #llvm\n\nDifferential Revision: https://reviews.llvm.org/D63937\n\nllvm-svn: 364910\nGitOrigin-RevId: bffd099d158291ecd32413093e477ed10a7b35e5\n",
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