| @ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s |
| @ RUN: llvm-mc -triple=armebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s |
| .syntax unified |
| .globl _func |
| |
| @ Check that the assembler can handle the documented syntax from the ARM ARM. |
| @ For complex constructs like shifter operands, check more thoroughly for them |
| @ once then spot check that following instructions accept the form generally. |
| @ This gives us good coverage while keeping the overall size of the test |
| @ more reasonable. |
| |
| _func: |
| @ CHECK: _func |
| |
| @------------------------------------------------------------------------------ |
| @ ADC (immediate) |
| @------------------------------------------------------------------------------ |
| adc r1, r2, #0xf |
| adc r1, r2, $0xf |
| adc r1, r2, 0xf |
| adc r7, r8, #(0xff << 16) |
| adc r7, r8, #-2147483638 |
| adc r7, r8, #42, #2 |
| adc r7, r8, #40, #2 |
| adc r7, r8, $40, $2 |
| adc r7, r8, 40, 2 |
| adc r7, r8, (2 * 20), (1 << 1) |
| adc r1, r2, #0xf0 |
| adc r1, r2, #0xf00 |
| adc r1, r2, #0xf000 |
| adc r1, r2, #0xf0000 |
| adc r1, r2, #0xf00000 |
| adc r1, r2, #0xf000000 |
| adc r1, r2, #0xf0000000 |
| adc r1, r2, #0xf000000f |
| adcs r1, r2, #0xf00 |
| adcs r7, r8, #40, #2 |
| adcseq r1, r2, #0xf00 |
| adceq r1, r2, #0xf00 |
| |
| @ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2] |
| @ CHECK: adc r7, r8, #16711680 @ encoding: [0xff,0x78,0xa8,0xe2] |
| @ CHECK: adc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xa8,0xe2] |
| @ CHECK: adc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xa8,0xe2] |
| @ CHECK: adc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xa8,0xe2] |
| @ CHECK: adc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xa8,0xe2] |
| @ CHECK: adc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xa8,0xe2] |
| @ CHECK: adc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xa8,0xe2] |
| @ CHECK: adc r1, r2, #240 @ encoding: [0xf0,0x10,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #3840 @ encoding: [0x0f,0x1c,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #61440 @ encoding: [0x0f,0x1a,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #983040 @ encoding: [0x0f,0x18,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #15728640 @ encoding: [0x0f,0x16,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #251658240 @ encoding: [0x0f,0x14,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #-268435456 @ encoding: [0x0f,0x12,0xa2,0xe2] |
| @ CHECK: adc r1, r2, #-268435441 @ encoding: [0xff,0x12,0xa2,0xe2] |
| @ CHECK: adcs r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0xe2] |
| @ CHECK: adcs r7, r8, #40, #2 @ encoding: [0x28,0x71,0xb8,0xe2] |
| @ CHECK: adcseq r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0x02] |
| @ CHECK: adceq r1, r2, #3840 @ encoding: [0x0f,0x1c,0xa2,0x02] |
| |
| @------------------------------------------------------------------------------ |
| @ ADC (register) |
| @ ADC (shifted register) |
| @------------------------------------------------------------------------------ |
| adc r4, r5, r6 |
| @ Constant shifts |
| adc r4, r5, r6, lsl #1 |
| adc r4, r5, r6, lsl #31 |
| adc r4, r5, r6, lsr #1 |
| adc r4, r5, r6, lsr #31 |
| adc r4, r5, r6, lsr #32 |
| adc r4, r5, r6, asr #1 |
| adc r4, r5, r6, asr #31 |
| adc r4, r5, r6, asr #32 |
| adc r4, r5, r6, ror #1 |
| adc r4, r5, r6, ror #31 |
| |
| @ Register shifts |
| adc r6, r7, r8, lsl r9 |
| adc r6, r7, r8, lsr r9 |
| adc r6, r7, r8, asr r9 |
| adc r6, r7, r8, ror r9 |
| adc r4, r5, r6, rrx |
| |
| @ Destination register is optional |
| adc r5, r6 |
| adc r4, r5, lsl #1 |
| adc r4, r5, lsl #31 |
| adc r4, r5, lsr #1 |
| adc r4, r5, lsr #31 |
| adc r4, r5, lsr #32 |
| adc r4, r5, asr #1 |
| adc r4, r5, asr #31 |
| adc r4, r5, asr #32 |
| adc r4, r5, ror #1 |
| adc r4, r5, ror #31 |
| adc r4, r5, rrx |
| adc r6, r7, lsl r9 |
| adc r6, r7, lsr r9 |
| adc r6, r7, asr r9 |
| adc r6, r7, ror r9 |
| adc r4, r5, rrx |
| |
| @ CHECK: adc r4, r5, r6 @ encoding: [0x06,0x40,0xa5,0xe0] |
| |
| @ CHECK: adc r4, r5, r6, lsl #1 @ encoding: [0x86,0x40,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, lsl #31 @ encoding: [0x86,0x4f,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, lsr #1 @ encoding: [0xa6,0x40,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, lsr #31 @ encoding: [0xa6,0x4f,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, lsr #32 @ encoding: [0x26,0x40,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, asr #1 @ encoding: [0xc6,0x40,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, asr #31 @ encoding: [0xc6,0x4f,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, asr #32 @ encoding: [0x46,0x40,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, ror #1 @ encoding: [0xe6,0x40,0xa5,0xe0] |
| @ CHECK: adc r4, r5, r6, ror #31 @ encoding: [0xe6,0x4f,0xa5,0xe0] |
| |
| @ CHECK: adc r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0xa7,0xe0] |
| @ CHECK: adc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xa7,0xe0] |
| @ CHECK: adc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xa7,0xe0] |
| @ CHECK: adc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xa7,0xe0] |
| @ CHECK: adc r4, r5, r6, rrx @ encoding: [0x66,0x40,0xa5,0xe0] |
| |
| @ CHECK: adc r5, r5, r6 @ encoding: [0x06,0x50,0xa5,0xe0] |
| @ CHECK: adc r4, r4, r5, lsl #1 @ encoding: [0x85,0x40,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, lsl #31 @ encoding: [0x85,0x4f,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, lsr #1 @ encoding: [0xa5,0x40,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, lsr #31 @ encoding: [0xa5,0x4f,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, lsr #32 @ encoding: [0x25,0x40,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, asr #1 @ encoding: [0xc5,0x40,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, asr #31 @ encoding: [0xc5,0x4f,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, asr #32 @ encoding: [0x45,0x40,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, ror #1 @ encoding: [0xe5,0x40,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, ror #31 @ encoding: [0xe5,0x4f,0xa4,0xe0] |
| @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0] |
| @ CHECK: adc r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0xa6,0xe0] |
| @ CHECK: adc r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0xa6,0xe0] |
| @ CHECK: adc r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0xa6,0xe0] |
| @ CHECK: adc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xa6,0xe0] |
| @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ ADR |
| @------------------------------------------------------------------------------ |
| Lback: |
| adr r2, Lback |
| adr r3, Lforward |
| Lforward: |
| adr r2, #3 |
| adr r2, #-3 |
| |
| @ CHECK: Lback: |
| @ CHECK: adr r2, Lback @ encoding: [A,0x20'A',0x0f'A',0xe2'A'] |
| @ CHECK: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12 |
| @ CHECK-BE: adr r2, Lback @ encoding: [0xe2'A',0x0f'A',0x20'A',A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12 |
| @ CHECK: adr r3, Lforward @ encoding: [A,0x30'A',0x0f'A',0xe2'A'] |
| @ CHECK: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12 |
| @ CHECK-BE: adr r3, Lforward @ encoding: [0xe2'A',0x0f'A',0x30'A',A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12 |
| @ CHECK: Lforward: |
| @ CHECK: adr r2, #3 @ encoding: [0x03,0x20,0x8f,0xe2] |
| @ CHECK: adr r2, #-3 @ encoding: [0x03,0x20,0x4f,0xe2] |
| |
| adr r1, #-0x0 |
| adr r1, #-0x12000000 |
| adr r1, #-0x80000001 |
| adr r1, #0x12000000 |
| adr r1, #0x80000001 |
| |
| @ CHECK: adr r1, #-0 @ encoding: [0x00,0x10,0x4f,0xe2] |
| @ CHECK: adr r1, #-301989888 @ encoding: [0x12,0x14,0x4f,0xe2] |
| @ CHECK: adr r1, #2147483647 @ encoding: [0x06,0x11,0x4f,0xe2] |
| @ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2] |
| @ CHECK: adr r1, #-2147483647 @ encoding: [0x06,0x11,0x8f,0xe2] |
| |
| @------------------------------------------------------------------------------ |
| @ ADD |
| @------------------------------------------------------------------------------ |
| add r4, r5, #0xf000 |
| add r4, r5, $0xf000 |
| add r4, r5, 0xf000 |
| add r4, r5, -0xf000 |
| add r7, r8, #(0xff << 16) |
| add r7, r8, #-2147483638 |
| add r7, r8, #42, #2 |
| add r7, r8, #40, #2 |
| add r7, r8, $40, $2 |
| add r7, r8, 40, 2 |
| add r7, r8, (2 * 20), (1 << 1) |
| add r4, r5, r6 |
| add r4, r5, r6, lsl #5 |
| add r4, r5, r6, lsr #5 |
| add r4, r5, r6, lsr #5 |
| add r4, r5, r6, asr #5 |
| add r4, r5, r6, ror #5 |
| add r6, r7, r8, lsl r9 |
| add r4, r4, r3, asl r9 |
| add r6, r7, r8, lsr r9 |
| add r6, r7, r8, asr r9 |
| add r6, r7, r8, ror r9 |
| add r4, r5, r6, rrx |
| |
| @ destination register is optional |
| add r5, #0xf000 |
| add r5, $0xf000 |
| add r5, 0xf000 |
| add r5, -0xf000 |
| add r7, #(0xff << 16) |
| add r7, #-2147483638 |
| add r7, #42, #2 |
| add r7, #40, #2 |
| add r7, $40, $2 |
| add r7, 40, 2 |
| add r7, (2 * 20), (1 << 1) |
| add r4, r5 |
| add r4, r5, lsl #5 |
| add r4, r5, lsr #5 |
| add r4, r5, lsr #5 |
| add r4, r5, asr #5 |
| add r4, r5, ror #5 |
| add r6, r7, lsl r9 |
| add r6, r7, lsr r9 |
| add r6, r7, asr r9 |
| add r6, r7, ror r9 |
| add r4, r5, rrx |
| |
| add r0, #-4 |
| add r4, r5, #-21 |
| add r0, pc, #0xc0000000 |
| addseq r0,pc,#0xc0000000 |
| |
| |
| add r0, pc, #(Lback - .) |
| |
| @ CHECK: add r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe2] |
| @ CHECK: add r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe2] |
| @ CHECK: add r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe2] |
| @ CHECK: sub r4, r5, #61440 @ encoding: [0x0f,0x4a,0x45,0xe2] |
| @ CHECK: add r7, r8, #16711680 @ encoding: [0xff,0x78,0x88,0xe2] |
| @ CHECK: add r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x88,0xe2] |
| @ CHECK: add r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x88,0xe2] |
| @ CHECK: add r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe2] |
| @ CHECK: add r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe2] |
| @ CHECK: add r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe2] |
| @ CHECK: add r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe2] |
| @ CHECK: add r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe0] |
| @ CHECK: add r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0x85,0xe0] |
| @ CHECK: add r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x85,0xe0] |
| @ CHECK: add r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x85,0xe0] |
| @ CHECK: add r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0x85,0xe0] |
| @ CHECK: add r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0x85,0xe0] |
| @ CHECK: add r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x87,0xe0] |
| @ CHECK: add r4, r4, r3, lsl r9 @ encoding: [0x13,0x49,0x84,0xe0] |
| @ CHECK: add r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x87,0xe0] |
| @ CHECK: add r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x87,0xe0] |
| @ CHECK: add r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0xe0] |
| @ CHECK: add r4, r5, r6, rrx @ encoding: [0x66,0x40,0x85,0xe0] |
| |
| @ CHECK: add r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0xe2] |
| @ CHECK: add r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0xe2] |
| @ CHECK: add r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0xe2] |
| @ CHECK: sub r5, r5, #61440 @ encoding: [0x0f,0x5a,0x45,0xe2] |
| @ CHECK: add r7, r7, #16711680 @ encoding: [0xff,0x78,0x87,0xe2] |
| @ CHECK: add r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x87,0xe2] |
| @ CHECK: add r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x87,0xe2] |
| @ CHECK: add r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe2] |
| @ CHECK: add r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe2] |
| @ CHECK: add r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe2] |
| @ CHECK: add r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe2] |
| @ CHECK: add r4, r4, r5 @ encoding: [0x05,0x40,0x84,0xe0] |
| @ CHECK: add r4, r4, r5, lsl #5 @ encoding: [0x85,0x42,0x84,0xe0] |
| @ CHECK: add r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x84,0xe0] |
| @ CHECK: add r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x84,0xe0] |
| @ CHECK: add r4, r4, r5, asr #5 @ encoding: [0xc5,0x42,0x84,0xe0] |
| @ CHECK: add r4, r4, r5, ror #5 @ encoding: [0xe5,0x42,0x84,0xe0] |
| @ CHECK: add r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x86,0xe0] |
| @ CHECK: add r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x86,0xe0] |
| @ CHECK: add r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x86,0xe0] |
| @ CHECK: add r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x86,0xe0] |
| @ CHECK: add r4, r4, r5, rrx @ encoding: [0x65,0x40,0x84,0xe0] |
| |
| @ CHECK: sub r0, r0, #4 @ encoding: [0x04,0x00,0x40,0xe2] |
| @ CHECK: sub r4, r5, #21 @ encoding: [0x15,0x40,0x45,0xe2] |
| @ CHECK: adr r0, #-1073741824 @ encoding: [0x03,0x01,0x8f,0xe2] |
| @ CHECK: addseq r0, pc, #-1073741824 @ encoding: [0x03,0x01,0x9f,0x02] |
| @ CHECK: Ltmp0: |
| @ CHECK-NEXT: Ltmp1: |
| @ CHECK-NEXT: adr r0, (Ltmp1+8)+(Lback-Ltmp0) @ encoding: [A,A,0x0f'A',0xe2'A'] |
| @ CHECK-NEXT: @ fixup A - offset: 0, value: (Ltmp1+8)+(Lback-Ltmp0), kind: fixup_arm_adr_pcrel_12 |
| |
| @ Test right shift by 32, which is encoded as 0 |
| add r3, r1, r2, lsr #32 |
| add r3, r1, r2, asr #32 |
| @ CHECK: add r3, r1, r2, lsr #32 @ encoding: [0x22,0x30,0x81,0xe0] |
| @ CHECK: add r3, r1, r2, asr #32 @ encoding: [0x42,0x30,0x81,0xe0] |
| |
| @------------------------------------------------------------------------------ |
| @ ADDS |
| @------------------------------------------------------------------------------ |
| adds r7, r8, #16711680 |
| adds r7, r8, $16711680 |
| adds r7, r8, 16711680 |
| adds r7, r8, #(0xff << 16) |
| adds r7, r8, #-2147483638 |
| adds r7, r8, #42, #2 |
| adds r7, r8, #40, #2 |
| adds r7, r8, $40, $2 |
| adds r7, r8, 40, 2 |
| adds r7, r8, (2 * 20), (1 << 1) |
| |
| @ CHECK: adds r7, r8, #16711680 @ encoding: [0xff,0x78,0x98,0xe2] |
| @ CHECK: adds r7, r8, #16711680 @ encoding: [0xff,0x78,0x98,0xe2] |
| @ CHECK: adds r7, r8, #16711680 @ encoding: [0xff,0x78,0x98,0xe2] |
| @ CHECK: adds r7, r8, #16711680 @ encoding: [0xff,0x78,0x98,0xe2] |
| @ CHECK: adds r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x98,0xe2] |
| @ CHECK: adds r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x98,0xe2] |
| @ CHECK: adds r7, r8, #40, #2 @ encoding: [0x28,0x71,0x98,0xe2] |
| @ CHECK: adds r7, r8, #40, #2 @ encoding: [0x28,0x71,0x98,0xe2] |
| @ CHECK: adds r7, r8, #40, #2 @ encoding: [0x28,0x71,0x98,0xe2] |
| @ CHECK: adds r7, r8, #40, #2 @ encoding: [0x28,0x71,0x98,0xe2] |
| |
| @------------------------------------------------------------------------------ |
| @ AND |
| @------------------------------------------------------------------------------ |
| and r10, r1, #0xf |
| and r10, r1, $0xf |
| and r10, r1, 0xf |
| and r10, r1, -0xf |
| and r7, r8, #(0xff << 16) |
| and r7, r8, #-2147483638 |
| and r7, r8, #42, #2 |
| and r7, r8, #40, #2 |
| and r7, r8, $40, $2 |
| and r7, r8, 40, 2 |
| and r7, r8, (2 * 20), (1 << 1) |
| and r10, r1, r6 |
| and r10, r1, r6, lsl #10 |
| and r10, r1, r6, lsr #10 |
| and r10, r1, r6, lsr #10 |
| and r10, r1, r6, asr #10 |
| and r10, r1, r6, ror #10 |
| and r6, r7, r8, lsl r2 |
| and r6, r7, r8, lsr r2 |
| and r6, r7, r8, asr r2 |
| and r6, r7, r8, ror r2 |
| and r10, r1, r6, rrx |
| and r2, r3, #0x7fffffff |
| and sp, sp, #0x7fffffff |
| and pc, pc, #0x7fffffff |
| |
| @ destination register is optional |
| and r1, #0xf |
| and r1, $0xf |
| and r1, 0xf |
| and r1, -0xf |
| and r7, #(0xff << 16) |
| and r7, #-2147483638 |
| and r7, #42, #2 |
| and r7, #40, #2 |
| and r7, $40, $2 |
| and r7, 40, 2 |
| and r7, (2 * 20), (1 << 1) |
| and r10, r1 |
| and r10, r1, lsl #10 |
| and r10, r1, lsr #10 |
| and r10, r1, lsr #10 |
| and r10, r1, asr #10 |
| and r10, r1, ror #10 |
| and r6, r7, lsl r2 |
| and r6, r7, lsr r2 |
| and r6, r7, asr r2 |
| and r6, r7, ror r2 |
| and r10, r1, rrx |
| |
| @ CHECK: and r10, r1, #15 @ encoding: [0x0f,0xa0,0x01,0xe2] |
| @ CHECK: and r10, r1, #15 @ encoding: [0x0f,0xa0,0x01,0xe2] |
| @ CHECK: and r10, r1, #15 @ encoding: [0x0f,0xa0,0x01,0xe2] |
| @ CHECK: bic r10, r1, #14 @ encoding: [0x0e,0xa0,0xc1,0xe3] |
| @ CHECK: and r7, r8, #16711680 @ encoding: [0xff,0x78,0x08,0xe2] |
| @ CHECK: and r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x08,0xe2] |
| @ CHECK: and r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x08,0xe2] |
| @ CHECK: and r7, r8, #40, #2 @ encoding: [0x28,0x71,0x08,0xe2] |
| @ CHECK: and r7, r8, #40, #2 @ encoding: [0x28,0x71,0x08,0xe2] |
| @ CHECK: and r7, r8, #40, #2 @ encoding: [0x28,0x71,0x08,0xe2] |
| @ CHECK: and r7, r8, #40, #2 @ encoding: [0x28,0x71,0x08,0xe2] |
| @ CHECK: and r10, r1, r6 @ encoding: [0x06,0xa0,0x01,0xe0] |
| @ CHECK: and r10, r1, r6, lsl #10 @ encoding: [0x06,0xa5,0x01,0xe0] |
| @ CHECK: and r10, r1, r6, lsr #10 @ encoding: [0x26,0xa5,0x01,0xe0] |
| @ CHECK: and r10, r1, r6, lsr #10 @ encoding: [0x26,0xa5,0x01,0xe0] |
| @ CHECK: and r10, r1, r6, asr #10 @ encoding: [0x46,0xa5,0x01,0xe0] |
| @ CHECK: and r10, r1, r6, ror #10 @ encoding: [0x66,0xa5,0x01,0xe0] |
| @ CHECK: and r6, r7, r8, lsl r2 @ encoding: [0x18,0x62,0x07,0xe0] |
| @ CHECK: and r6, r7, r8, lsr r2 @ encoding: [0x38,0x62,0x07,0xe0] |
| @ CHECK: and r6, r7, r8, asr r2 @ encoding: [0x58,0x62,0x07,0xe0] |
| @ CHECK: and r6, r7, r8, ror r2 @ encoding: [0x78,0x62,0x07,0xe0] |
| @ CHECK: and r10, r1, r6, rrx @ encoding: [0x66,0xa0,0x01,0xe0] |
| @ CHECK: bic r2, r3, #-2147483648 @ encoding: [0x02,0x21,0xc3,0xe3] |
| @ CHECK: bic sp, sp, #-2147483648 @ encoding: [0x02,0xd1,0xcd,0xe3] |
| @ CHECK: bic pc, pc, #-2147483648 @ encoding: [0x02,0xf1,0xcf,0xe3] |
| |
| @ CHECK: and r1, r1, #15 @ encoding: [0x0f,0x10,0x01,0xe2] |
| @ CHECK: and r1, r1, #15 @ encoding: [0x0f,0x10,0x01,0xe2] |
| @ CHECK: and r1, r1, #15 @ encoding: [0x0f,0x10,0x01,0xe2] |
| @ CHECK: bic r1, r1, #14 @ encoding: [0x0e,0x10,0xc1,0xe3] |
| @ CHECK: and r7, r7, #16711680 @ encoding: [0xff,0x78,0x07,0xe2] |
| @ CHECK: and r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x07,0xe2] |
| @ CHECK: and r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x07,0xe2] |
| @ CHECK: and r7, r7, #40, #2 @ encoding: [0x28,0x71,0x07,0xe2] |
| @ CHECK: and r7, r7, #40, #2 @ encoding: [0x28,0x71,0x07,0xe2] |
| @ CHECK: and r7, r7, #40, #2 @ encoding: [0x28,0x71,0x07,0xe2] |
| @ CHECK: and r7, r7, #40, #2 @ encoding: [0x28,0x71,0x07,0xe2] |
| @ CHECK: and r10, r10, r1 @ encoding: [0x01,0xa0,0x0a,0xe0] |
| @ CHECK: and r10, r10, r1, lsl #10 @ encoding: [0x01,0xa5,0x0a,0xe0] |
| @ CHECK: and r10, r10, r1, lsr #10 @ encoding: [0x21,0xa5,0x0a,0xe0] |
| @ CHECK: and r10, r10, r1, lsr #10 @ encoding: [0x21,0xa5,0x0a,0xe0] |
| @ CHECK: and r10, r10, r1, asr #10 @ encoding: [0x41,0xa5,0x0a,0xe0] |
| @ CHECK: and r10, r10, r1, ror #10 @ encoding: [0x61,0xa5,0x0a,0xe0] |
| @ CHECK: and r6, r6, r7, lsl r2 @ encoding: [0x17,0x62,0x06,0xe0] |
| @ CHECK: and r6, r6, r7, lsr r2 @ encoding: [0x37,0x62,0x06,0xe0] |
| @ CHECK: and r6, r6, r7, asr r2 @ encoding: [0x57,0x62,0x06,0xe0] |
| @ CHECK: and r6, r6, r7, ror r2 @ encoding: [0x77,0x62,0x06,0xe0] |
| @ CHECK: and r10, r10, r1, rrx @ encoding: [0x61,0xa0,0x0a,0xe0] |
| |
| @ Test right shift by 32, which is encoded as 0 |
| and r3, r1, r2, lsr #32 |
| and r3, r1, r2, asr #32 |
| @ CHECK: and r3, r1, r2, lsr #32 @ encoding: [0x22,0x30,0x01,0xe0] |
| @ CHECK: and r3, r1, r2, asr #32 @ encoding: [0x42,0x30,0x01,0xe0] |
| |
| @------------------------------------------------------------------------------ |
| @ ASR |
| @------------------------------------------------------------------------------ |
| asr r2, r4, #32 |
| asr r2, r4, #2 |
| asr r2, r4, #0 |
| asr r4, #2 |
| |
| @ CHECK: asr r2, r4, #32 @ encoding: [0x44,0x20,0xa0,0xe1] |
| @ CHECK: asr r2, r4, #2 @ encoding: [0x44,0x21,0xa0,0xe1] |
| @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1] |
| @ CHECK: asr r4, r4, #2 @ encoding: [0x44,0x41,0xa0,0xe1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ B |
| @------------------------------------------------------------------------------ |
| b _bar |
| beq _baz |
| |
| @ CHECK: b _bar @ encoding: [A,A,A,0xea] |
| @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch |
| @ CHECK-BE: b _bar @ encoding: [0xea,A,A,A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch |
| @ CHECK: beq _baz @ encoding: [A,A,A,0x0a] |
| @ CHECK: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch |
| @ CHECK-BE: beq _baz @ encoding: [0x0a,A,A,A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch |
| |
| |
| @------------------------------------------------------------------------------ |
| @ BFC |
| @------------------------------------------------------------------------------ |
| bfc r5, #3, #17 |
| bfccc r5, #3, #17 |
| |
| @ CHECK: bfc r5, #3, #17 @ encoding: [0x9f,0x51,0xd3,0xe7] |
| @ CHECK: bfclo r5, #3, #17 @ encoding: [0x9f,0x51,0xd3,0x37] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ BFI |
| @------------------------------------------------------------------------------ |
| bfi r5, r2, #3, #17 |
| bfine r5, r2, #3, #17 |
| |
| @ CHECK: bfi r5, r2, #3, #17 @ encoding: [0x92,0x51,0xd3,0xe7] |
| @ CHECK: bfine r5, r2, #3, #17 @ encoding: [0x92,0x51,0xd3,0x17] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ BIC |
| @------------------------------------------------------------------------------ |
| bic r10, r1, #0xf |
| bic r10, r1, $0xf |
| bic r10, r1, 0xf |
| bic r10, r1, -0xf |
| bic r7, r8, #(0xff << 16) |
| bic r7, r8, #-2147483638 |
| bic r7, r8, #42, #2 |
| bic r7, r8, #40, #2 |
| bic r7, r8, $40, $2 |
| bic r7, r8, 40, 2 |
| bic r7, r8, (2 * 20), (1 << 1) |
| bic r10, r1, r6 |
| bic r10, r1, r6, lsl #10 |
| bic r10, r1, r6, lsr #10 |
| bic r10, r1, r6, lsr #10 |
| bic r10, r1, r6, asr #10 |
| bic r10, r1, r6, ror #10 |
| bic r6, r7, r8, lsl r2 |
| bic r6, r7, r8, lsr r2 |
| bic r6, r7, r8, asr r2 |
| bic r6, r7, r8, ror r2 |
| bic r10, r1, r6, rrx |
| bic r2, r3, #0x7fffffff |
| bic sp, sp, #0x7fffffff |
| bic pc, pc, #0x7fffffff |
| |
| |
| @ destination register is optional |
| bic r1, #0xf |
| bic r1, $0xf |
| bic r1, 0xf |
| bic r1, -0xf |
| bic r7, #(0xff << 16) |
| bic r7, #-2147483638 |
| bic r7, #42, #2 |
| bic r7, #40, #2 |
| bic r7, $40, $2 |
| bic r7, 40, 2 |
| bic r7, (2 * 20), (1 << 1) |
| bic r10, r1 |
| bic r10, r1, lsl #10 |
| bic r10, r1, lsr #10 |
| bic r10, r1, lsr #10 |
| bic r10, r1, asr #10 |
| bic r10, r1, ror #10 |
| bic r6, r7, lsl r2 |
| bic r6, r7, lsr r2 |
| bic r6, r7, asr r2 |
| bic r6, r7, ror r2 |
| bic r10, r1, rrx |
| |
| @ CHECK: bic r10, r1, #15 @ encoding: [0x0f,0xa0,0xc1,0xe3] |
| @ CHECK: bic r10, r1, #15 @ encoding: [0x0f,0xa0,0xc1,0xe3] |
| @ CHECK: bic r10, r1, #15 @ encoding: [0x0f,0xa0,0xc1,0xe3] |
| @ CHECK: and r10, r1, #14 @ encoding: [0x0e,0xa0,0x01,0xe2] |
| @ CHECK: bic r7, r8, #16711680 @ encoding: [0xff,0x78,0xc8,0xe3] |
| @ CHECK: bic r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xc8,0xe3] |
| @ CHECK: bic r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xc8,0xe3] |
| @ CHECK: bic r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe3] |
| @ CHECK: bic r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe3] |
| @ CHECK: bic r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe3] |
| @ CHECK: bic r10, r1, r6 @ encoding: [0x06,0xa0,0xc1,0xe1] |
| @ CHECK: bic r10, r1, r6, lsl #10 @ encoding: [0x06,0xa5,0xc1,0xe1] |
| @ CHECK: bic r10, r1, r6, lsr #10 @ encoding: [0x26,0xa5,0xc1,0xe1] |
| @ CHECK: bic r10, r1, r6, lsr #10 @ encoding: [0x26,0xa5,0xc1,0xe1] |
| @ CHECK: bic r10, r1, r6, asr #10 @ encoding: [0x46,0xa5,0xc1,0xe1] |
| @ CHECK: bic r10, r1, r6, ror #10 @ encoding: [0x66,0xa5,0xc1,0xe1] |
| @ CHECK: bic r6, r7, r8, lsl r2 @ encoding: [0x18,0x62,0xc7,0xe1] |
| @ CHECK: bic r6, r7, r8, lsr r2 @ encoding: [0x38,0x62,0xc7,0xe1] |
| @ CHECK: bic r6, r7, r8, asr r2 @ encoding: [0x58,0x62,0xc7,0xe1] |
| @ CHECK: bic r6, r7, r8, ror r2 @ encoding: [0x78,0x62,0xc7,0xe1] |
| @ CHECK: bic r10, r1, r6, rrx @ encoding: [0x66,0xa0,0xc1,0xe1] |
| @ CHECK: and r2, r3, #-2147483648 @ encoding: [0x02,0x21,0x03,0xe2] |
| @ CHECK: and sp, sp, #-2147483648 @ encoding: [0x02,0xd1,0x0d,0xe2] |
| @ CHECK: and pc, pc, #-2147483648 @ encoding: [0x02,0xf1,0x0f,0xe2] |
| |
| |
| @ CHECK: bic r1, r1, #15 @ encoding: [0x0f,0x10,0xc1,0xe3] |
| @ CHECK: bic r1, r1, #15 @ encoding: [0x0f,0x10,0xc1,0xe3] |
| @ CHECK: bic r1, r1, #15 @ encoding: [0x0f,0x10,0xc1,0xe3] |
| @ CHECK: and r1, r1, #14 @ encoding: [0x0e,0x10,0x01,0xe2] |
| @ CHECK: bic r7, r7, #16711680 @ encoding: [0xff,0x78,0xc7,0xe3] |
| @ CHECK: bic r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0xc7,0xe3] |
| @ CHECK: bic r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0xc7,0xe3] |
| @ CHECK: bic r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe3] |
| @ CHECK: bic r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe3] |
| @ CHECK: bic r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe3] |
| @ CHECK: bic r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe3] |
| @ CHECK: bic r10, r10, r1 @ encoding: [0x01,0xa0,0xca,0xe1] |
| @ CHECK: bic r10, r10, r1, lsl #10 @ encoding: [0x01,0xa5,0xca,0xe1] |
| @ CHECK: bic r10, r10, r1, lsr #10 @ encoding: [0x21,0xa5,0xca,0xe1] |
| @ CHECK: bic r10, r10, r1, lsr #10 @ encoding: [0x21,0xa5,0xca,0xe1] |
| @ CHECK: bic r10, r10, r1, asr #10 @ encoding: [0x41,0xa5,0xca,0xe1] |
| @ CHECK: bic r10, r10, r1, ror #10 @ encoding: [0x61,0xa5,0xca,0xe1] |
| @ CHECK: bic r6, r6, r7, lsl r2 @ encoding: [0x17,0x62,0xc6,0xe1] |
| @ CHECK: bic r6, r6, r7, lsr r2 @ encoding: [0x37,0x62,0xc6,0xe1] |
| @ CHECK: bic r6, r6, r7, asr r2 @ encoding: [0x57,0x62,0xc6,0xe1] |
| @ CHECK: bic r6, r6, r7, ror r2 @ encoding: [0x77,0x62,0xc6,0xe1] |
| @ CHECK: bic r10, r10, r1, rrx @ encoding: [0x61,0xa0,0xca,0xe1] |
| |
| @ Test right shift by 32, which is encoded as 0 |
| bic r3, r1, r2, lsr #32 |
| bic r3, r1, r2, asr #32 |
| @ CHECK: bic r3, r1, r2, lsr #32 @ encoding: [0x22,0x30,0xc1,0xe1] |
| @ CHECK: bic r3, r1, r2, asr #32 @ encoding: [0x42,0x30,0xc1,0xe1] |
| |
| @------------------------------------------------------------------------------ |
| @ BKPT |
| @------------------------------------------------------------------------------ |
| bkpt #10 |
| bkpt #65535 |
| |
| @ CHECK: bkpt #10 @ encoding: [0x7a,0x00,0x20,0xe1] |
| @ CHECK: bkpt #65535 @ encoding: [0x7f,0xff,0x2f,0xe1] |
| |
| @------------------------------------------------------------------------------ |
| @ BL/BLX (immediate) |
| @------------------------------------------------------------------------------ |
| |
| bl _bar |
| bleq _bar |
| blx _bar |
| blls #28634268 |
| blx #32424576 |
| blx #16212288 |
| |
| @ CHECK: bl _bar @ encoding: [A,A,A,0xeb] |
| @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl |
| @ CHECK-BE: bl _bar @ encoding: [0xeb,A,A,A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl |
| @ CHECK: bleq _bar @ encoding: [A,A,A,0x0b] |
| @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl |
| @ CHECK-BE: bleq _bar @ encoding: [0x0b,A,A,A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl |
| @ CHECK: blx _bar @ encoding: [A,A,A,0xfa] |
| @ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx |
| @ CHECK-BE: blx _bar @ encoding: [0xfa,A,A,A] |
| @ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx |
| @ CHECK: blls #28634268 @ encoding: [0x27,0x3b,0x6d,0x9b] |
| @ CHECK: blx #32424576 @ encoding: [0xa0,0xb0,0x7b,0xfa] |
| @ CHECK: blx #16212288 @ encoding: [0x50,0xd8,0x3d,0xfa] |
| @------------------------------------------------------------------------------ |
| @ BLX (register) |
| @------------------------------------------------------------------------------ |
| blx r2 |
| blxne r2 |
| |
| @ CHECK: blx r2 @ encoding: [0x32,0xff,0x2f,0xe1] |
| @ CHECK: blxne r2 @ encoding: [0x32,0xff,0x2f,0x11] |
| |
| @------------------------------------------------------------------------------ |
| @ BX |
| @------------------------------------------------------------------------------ |
| bx r2 |
| bxne r2 |
| |
| @ CHECK: bx r2 @ encoding: [0x12,0xff,0x2f,0xe1] |
| @ CHECK: bxne r2 @ encoding: [0x12,0xff,0x2f,0x11] |
| |
| @------------------------------------------------------------------------------ |
| @ BXJ |
| @------------------------------------------------------------------------------ |
| bxj r2 |
| bxjne r2 |
| |
| @ CHECK: bxj r2 @ encoding: [0x22,0xff,0x2f,0xe1] |
| @ CHECK: bxjne r2 @ encoding: [0x22,0xff,0x2f,0x11] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ CDP/CDP2 |
| @------------------------------------------------------------------------------ |
| cdp p7, #1, c1, c1, c1, #4 |
| cdp2 p7, #1, c1, c1, c1, #4 |
| cdp2 p12, #0, c6, c12, c0, #7 |
| |
| @ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xee] |
| @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe] |
| @ CHECK: cdp2 p12, #0, c6, c12, c0, #7 @ encoding: [0xe0,0x6c,0x0c,0xfe] |
| |
| cdpne p7, #1, c1, c1, c1, #4 |
| @ CHECK: cdpne p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0x1e] |
| |
| @------------------------------------------------------------------------------ |
| @ CLREX |
| @------------------------------------------------------------------------------ |
| clrex |
| |
| @ CHECK: clrex @ encoding: [0x1f,0xf0,0x7f,0xf5] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ CLZ |
| @------------------------------------------------------------------------------ |
| clz r1, r2 |
| clzeq r1, r2 |
| |
| @ CHECK: clz r1, r2 @ encoding: [0x12,0x1f,0x6f,0xe1] |
| @ CHECK: clzeq r1, r2 @ encoding: [0x12,0x1f,0x6f,0x01] |
| |
| @------------------------------------------------------------------------------ |
| @ CMN |
| @------------------------------------------------------------------------------ |
| cmn r1, #0xf |
| cmn r1, $0xf |
| cmn r1, 0xf |
| cmn r1, -0xf |
| cmn r7, #(0xff << 16) |
| cmn r7, #-2147483638 |
| cmn r7, #42, #2 |
| cmn r7, #40, #2 |
| cmn r7, $40, $2 |
| cmn r7, 40, 2 |
| cmn r7, (20 * 2), (1 << 1) |
| cmn r1, r6 |
| cmn r1, r6, lsl #10 |
| cmn r1, r6, lsr #10 |
| cmn sp, r6, lsr #10 |
| cmn r1, r6, asr #10 |
| cmn r1, r6, ror #10 |
| cmn r7, r8, lsl r2 |
| cmn sp, r8, lsr r2 |
| cmn r7, r8, asr r2 |
| cmn r7, r8, ror r2 |
| cmn r1, r6, rrx |
| |
| @ CHECK: cmn r1, #15 @ encoding: [0x0f,0x00,0x71,0xe3] |
| @ CHECK: cmn r1, #15 @ encoding: [0x0f,0x00,0x71,0xe3] |
| @ CHECK: cmn r1, #15 @ encoding: [0x0f,0x00,0x71,0xe3] |
| @ CHECK: cmp r1, #15 @ encoding: [0x0f,0x00,0x51,0xe3] |
| @ CHECK: cmn r7, #16711680 @ encoding: [0xff,0x08,0x77,0xe3] |
| @ CHECK: cmn r7, #-2147483638 @ encoding: [0x2a,0x01,0x77,0xe3] |
| @ CHECK: cmn r7, #-2147483638 @ encoding: [0x2a,0x01,0x77,0xe3] |
| @ CHECK: cmn r7, #40, #2 @ encoding: [0x28,0x01,0x77,0xe3] |
| @ CHECK: cmn r7, #40, #2 @ encoding: [0x28,0x01,0x77,0xe3] |
| @ CHECK: cmn r7, #40, #2 @ encoding: [0x28,0x01,0x77,0xe3] |
| @ CHECK: cmn r7, #40, #2 @ encoding: [0x28,0x01,0x77,0xe3] |
| @ CHECK: cmn r1, r6 @ encoding: [0x06,0x00,0x71,0xe1] |
| @ CHECK: cmn r1, r6, lsl #10 @ encoding: [0x06,0x05,0x71,0xe1] |
| @ CHECK: cmn r1, r6, lsr #10 @ encoding: [0x26,0x05,0x71,0xe1] |
| @ CHECK: cmn sp, r6, lsr #10 @ encoding: [0x26,0x05,0x7d,0xe1] |
| @ CHECK: cmn r1, r6, asr #10 @ encoding: [0x46,0x05,0x71,0xe1] |
| @ CHECK: cmn r1, r6, ror #10 @ encoding: [0x66,0x05,0x71,0xe1] |
| @ CHECK: cmn r7, r8, lsl r2 @ encoding: [0x18,0x02,0x77,0xe1] |
| @ CHECK: cmn sp, r8, lsr r2 @ encoding: [0x38,0x02,0x7d,0xe1] |
| @ CHECK: cmn r7, r8, asr r2 @ encoding: [0x58,0x02,0x77,0xe1] |
| @ CHECK: cmn r7, r8, ror r2 @ encoding: [0x78,0x02,0x77,0xe1] |
| @ CHECK: cmn r1, r6, rrx @ encoding: [0x66,0x00,0x71,0xe1] |
| |
| @------------------------------------------------------------------------------ |
| @ CMP |
| @------------------------------------------------------------------------------ |
| cmp r1, #0xf |
| cmp r1, $0xf |
| cmp r1, 0xf |
| cmp r1, -0xf |
| cmp r7, #(0xff << 16) |
| cmp r7, #-2147483638 |
| cmp r7, #42, #2 |
| cmp r7, #40, #2 |
| cmp r7, $40, $2 |
| cmp r7, 40, 2 |
| cmp r7, (2 * 20), (1 << 1) |
| cmp r1, r6 |
| cmp r1, r6, lsl #10 |
| cmp r1, r6, lsr #10 |
| cmp sp, r6, lsr #10 |
| cmp r1, r6, asr #10 |
| cmp r1, r6, ror #10 |
| cmp r7, r8, lsl r2 |
| cmp sp, r8, lsr r2 |
| cmp r7, r8, asr r2 |
| cmp r7, r8, ror r2 |
| cmp r1, r6, rrx |
| cmp r0, #-2 |
| cmp lr, #0 |
| |
| @ CHECK: cmp r1, #15 @ encoding: [0x0f,0x00,0x51,0xe3] |
| @ CHECK: cmp r1, #15 @ encoding: [0x0f,0x00,0x51,0xe3] |
| @ CHECK: cmp r1, #15 @ encoding: [0x0f,0x00,0x51,0xe3] |
| @ CHECK: cmn r1, #15 @ encoding: [0x0f,0x00,0x71,0xe3] |
| @ CHECK: cmp r7, #16711680 @ encoding: [0xff,0x08,0x57,0xe3] |
| @ CHECK: cmp r7, #-2147483638 @ encoding: [0x2a,0x01,0x57,0xe3] |
| @ CHECK: cmp r7, #-2147483638 @ encoding: [0x2a,0x01,0x57,0xe3] |
| @ CHECK: cmp r7, #40, #2 @ encoding: [0x28,0x01,0x57,0xe3] |
| @ CHECK: cmp r7, #40, #2 @ encoding: [0x28,0x01,0x57,0xe3] |
| @ CHECK: cmp r7, #40, #2 @ encoding: [0x28,0x01,0x57,0xe3] |
| @ CHECK: cmp r7, #40, #2 @ encoding: [0x28,0x01,0x57,0xe3] |
| @ CHECK: cmp r1, r6 @ encoding: [0x06,0x00,0x51,0xe1] |
| @ CHECK: cmp r1, r6, lsl #10 @ encoding: [0x06,0x05,0x51,0xe1] |
| @ CHECK: cmp r1, r6, lsr #10 @ encoding: [0x26,0x05,0x51,0xe1] |
| @ CHECK: cmp sp, r6, lsr #10 @ encoding: [0x26,0x05,0x5d,0xe1] |
| @ CHECK: cmp r1, r6, asr #10 @ encoding: [0x46,0x05,0x51,0xe1] |
| @ CHECK: cmp r1, r6, ror #10 @ encoding: [0x66,0x05,0x51,0xe1] |
| @ CHECK: cmp r7, r8, lsl r2 @ encoding: [0x18,0x02,0x57,0xe1] |
| @ CHECK: cmp sp, r8, lsr r2 @ encoding: [0x38,0x02,0x5d,0xe1] |
| @ CHECK: cmp r7, r8, asr r2 @ encoding: [0x58,0x02,0x57,0xe1] |
| @ CHECK: cmp r7, r8, ror r2 @ encoding: [0x78,0x02,0x57,0xe1] |
| @ CHECK: cmp r1, r6, rrx @ encoding: [0x66,0x00,0x51,0xe1] |
| @ CHECK: cmn r0, #2 @ encoding: [0x02,0x00,0x70,0xe3] |
| @ CHECK: cmp lr, #0 @ encoding: [0x00,0x00,0x5e,0xe3] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ CPS |
| @------------------------------------------------------------------------------ |
| cpsie aif |
| cpsie AIF |
| cps #15 |
| cpsid if, #10 |
| |
| @ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1] |
| @ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1] |
| @ CHECK: cps #15 @ encoding: [0x0f,0x00,0x02,0xf1] |
| @ CHECK: cpsid if, #10 @ encoding: [0xca,0x00,0x0e,0xf1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ DBG |
| @------------------------------------------------------------------------------ |
| dbg #0 |
| dbg #5 |
| dbg #15 |
| |
| @ CHECK: dbg #0 @ encoding: [0xf0,0xf0,0x20,0xe3] |
| @ CHECK: dbg #5 @ encoding: [0xf5,0xf0,0x20,0xe3] |
| @ CHECK: dbg #15 @ encoding: [0xff,0xf0,0x20,0xe3] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ DMB |
| @------------------------------------------------------------------------------ |
| dmb #0xf |
| dmb #0xe |
| dmb #0xd |
| dmb #0xc |
| dmb #0xb |
| dmb #0xa |
| dmb #0x9 |
| dmb #0x8 |
| dmb #0x7 |
| dmb #0x6 |
| dmb #0x5 |
| dmb #0x4 |
| dmb #0x3 |
| dmb #0x2 |
| dmb #0x1 |
| dmb #0x0 |
| |
| dmb sy |
| dmb st |
| dmb sh |
| dmb ish |
| dmb shst |
| dmb ishst |
| dmb un |
| dmb nsh |
| dmb unst |
| dmb nshst |
| dmb osh |
| dmb oshst |
| dmb |
| |
| @ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] |
| @ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0xd @ encoding: [0x5d,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0xc @ encoding: [0x5c,0xf0,0x7f,0xf5] |
| @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] |
| @ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0x9 @ encoding: [0x59,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0x8 @ encoding: [0x58,0xf0,0x7f,0xf5] |
| @ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] |
| @ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0x5 @ encoding: [0x55,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0x4 @ encoding: [0x54,0xf0,0x7f,0xf5] |
| @ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] |
| @ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0x1 @ encoding: [0x51,0xf0,0x7f,0xf5] |
| @ CHECK: dmb #0x0 @ encoding: [0x50,0xf0,0x7f,0xf5] |
| |
| @ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] |
| @ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] |
| @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] |
| @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] |
| @ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] |
| @ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] |
| @ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] |
| @ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] |
| @ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] |
| @ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] |
| @ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] |
| @ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] |
| @ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] |
| |
| @------------------------------------------------------------------------------ |
| @ DSB |
| @------------------------------------------------------------------------------ |
| dsb #0xf |
| dsb #0xe |
| dsb #0xd |
| dsb #0xc |
| dsb #0xb |
| dsb #0xa |
| dsb #0x9 |
| dsb #0x8 |
| dsb #0x7 |
| dsb #0x6 |
| dsb #0x5 |
| dsb #0x4 |
| dsb #0x3 |
| dsb #0x2 |
| dsb #0x1 |
| dsb #0x0 |
| |
| dsb 8 |
| dsb 7 |
| |
| dsb sy |
| dsb st |
| dsb sh |
| dsb ish |
| dsb shst |
| dsb ishst |
| dsb un |
| dsb nsh |
| dsb unst |
| dsb nshst |
| dsb osh |
| dsb oshst |
| dsb |
| |
| @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] |
| @ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] |
| @ CHECK: dsb #0xd @ encoding: [0x4d,0xf0,0x7f,0xf5] |
| @ CHECK: dsb #0xc @ encoding: [0x4c,0xf0,0x7f,0xf5] |
| @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] |
| @ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] |
| @ CHECK: dsb #0x9 @ encoding: [0x49,0xf0,0x7f,0xf5] |
| @ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] |
| @ CHECK: dsb #0x5 @ encoding: [0x45,0xf0,0x7f,0xf5] |
| @ CHECK: pssbb @ encoding: [0x44,0xf0,0x7f,0xf5] |
| @ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] |
| @ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] |
| @ CHECK: dsb #0x1 @ encoding: [0x41,0xf0,0x7f,0xf5] |
| @ CHECK: ssbb @ encoding: [0x40,0xf0,0x7f,0xf5] |
| |
| @ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] |
| |
| @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] |
| @ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] |
| @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] |
| @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] |
| @ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] |
| @ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] |
| @ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] |
| @ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] |
| @ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] |
| @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] |
| |
| @ With capitals |
| dsb SY |
| dsb OSHST |
| |
| @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] |
| @ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] |
| @------------------------------------------------------------------------------ |
| @ EOR |
| @------------------------------------------------------------------------------ |
| eor r4, r5, #0xf000 |
| eor r4, r5, $0xf000 |
| eor r4, r5, 0xf000 |
| eor r7, r8, #(0xff << 16) |
| eor r7, r8, #-2147483638 |
| eor r7, r8, #42, #2 |
| eor r7, r8, #40, #2 |
| eor r7, r8, $40, $2 |
| eor r7, r8, 40, 2 |
| eor r7, r8, (20 * 2), (1 << 1) |
| eor r4, r5, r6 |
| eor r4, r5, r6, lsl #5 |
| eor r4, r5, r6, lsr #5 |
| eor r4, r5, r6, lsr #5 |
| eor r4, r5, r6, asr #5 |
| eor r4, r5, r6, ror #5 |
| eor r6, r7, r8, lsl r9 |
| eor r6, r7, r8, lsr r9 |
| eor r6, r7, r8, asr r9 |
| eor r6, r7, r8, ror r9 |
| eor r4, r5, r6, rrx |
| |
| @ destination register is optional |
| eor r5, #0xf000 |
| eor r5, $0xf000 |
| eor r5, 0xf000 |
| eor r7, #(0xff << 16) |
| eor r7, #-2147483638 |
| eor r7, #42, #2 |
| eor r7, #40, #2 |
| eor r7, $40, $2 |
| eor r7, 40, 2 |
| eor r7, (20 * 2), (1 << 1) |
| eor r4, r5 |
| eor r4, r5, lsl #5 |
| eor r4, r5, lsr #5 |
| eor r4, r5, lsr #5 |
| eor r4, r5, asr #5 |
| eor r4, r5, ror #5 |
| eor r6, r7, lsl r9 |
| eor r6, r7, lsr r9 |
| eor r6, r7, asr r9 |
| eor r6, r7, ror r9 |
| eor r4, r5, rrx |
| |
| @ CHECK: eor r4, r5, #61440 @ encoding: [0x0f,0x4a,0x25,0xe2] |
| @ CHECK: eor r4, r5, #61440 @ encoding: [0x0f,0x4a,0x25,0xe2] |
| @ CHECK: eor r4, r5, #61440 @ encoding: [0x0f,0x4a,0x25,0xe2] |
| @ CHECK: eor r7, r8, #16711680 @ encoding: [0xff,0x78,0x28,0xe2] |
| @ CHECK: eor r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x28,0xe2] |
| @ CHECK: eor r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x28,0xe2] |
| @ CHECK: eor r7, r8, #40, #2 @ encoding: [0x28,0x71,0x28,0xe2] |
| @ CHECK: eor r7, r8, #40, #2 @ encoding: [0x28,0x71,0x28,0xe2] |
| @ CHECK: eor r7, r8, #40, #2 @ encoding: [0x28,0x71,0x28,0xe2] |
| @ CHECK: eor r7, r8, #40, #2 @ encoding: [0x28,0x71,0x28,0xe2] |
| @ CHECK: eor r4, r5, r6 @ encoding: [0x06,0x40,0x25,0xe0] |
| @ CHECK: eor r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0x25,0xe0] |
| @ CHECK: eor r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x25,0xe0] |
| @ CHECK: eor r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x25,0xe0] |
| @ CHECK: eor r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0x25,0xe0] |
| @ CHECK: eor r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0x25,0xe0] |
| @ CHECK: eor r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x27,0xe0] |
| @ CHECK: eor r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x27,0xe0] |
| @ CHECK: eor r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x27,0xe0] |
| @ CHECK: eor r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x27,0xe0] |
| @ CHECK: eor r4, r5, r6, rrx @ encoding: [0x66,0x40,0x25,0xe0] |
| |
| |
| @ CHECK: eor r5, r5, #61440 @ encoding: [0x0f,0x5a,0x25,0xe2] |
| @ CHECK: eor r5, r5, #61440 @ encoding: [0x0f,0x5a,0x25,0xe2] |
| @ CHECK: eor r5, r5, #61440 @ encoding: [0x0f,0x5a,0x25,0xe2] |
| @ CHECK: eor r7, r7, #16711680 @ encoding: [0xff,0x78,0x27,0xe2] |
| @ CHECK: eor r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x27,0xe2] |
| @ CHECK: eor r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x27,0xe2] |
| @ CHECK: eor r7, r7, #40, #2 @ encoding: [0x28,0x71,0x27,0xe2] |
| @ CHECK: eor r7, r7, #40, #2 @ encoding: [0x28,0x71,0x27,0xe2] |
| @ CHECK: eor r7, r7, #40, #2 @ encoding: [0x28,0x71,0x27,0xe2] |
| @ CHECK: eor r7, r7, #40, #2 @ encoding: [0x28,0x71,0x27,0xe2] |
| @ CHECK: eor r4, r4, r5 @ encoding: [0x05,0x40,0x24,0xe0] |
| @ CHECK: eor r4, r4, r5, lsl #5 @ encoding: [0x85,0x42,0x24,0xe0] |
| @ CHECK: eor r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x24,0xe0] |
| @ CHECK: eor r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x24,0xe0] |
| @ CHECK: eor r4, r4, r5, asr #5 @ encoding: [0xc5,0x42,0x24,0xe0] |
| @ CHECK: eor r4, r4, r5, ror #5 @ encoding: [0xe5,0x42,0x24,0xe0] |
| @ CHECK: eor r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x26,0xe0] |
| @ CHECK: eor r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x26,0xe0] |
| @ CHECK: eor r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x26,0xe0] |
| @ CHECK: eor r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x26,0xe0] |
| @ CHECK: eor r4, r4, r5, rrx @ encoding: [0x65,0x40,0x24,0xe0] |
| |
| @ Test right shift by 32, which is encoded as 0 |
| eor r3, r1, r2, lsr #32 |
| eor r3, r1, r2, asr #32 |
| @ CHECK: eor r3, r1, r2, lsr #32 @ encoding: [0x22,0x30,0x21,0xe0] |
| @ CHECK: eor r3, r1, r2, asr #32 @ encoding: [0x42,0x30,0x21,0xe0] |
| |
| @------------------------------------------------------------------------------ |
| @ ISB |
| @------------------------------------------------------------------------------ |
| isb sy |
| isb |
| isb #15 |
| isb #1 |
| |
| @ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5] |
| @ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5] |
| @ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5] |
| @ CHECK: isb #0x1 @ encoding: [0x61,0xf0,0x7f,0xf5] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ LDC{L}/LDC2{L} |
| @------------------------------------------------------------------------------ |
| ldc2 p0, c8, [r1, #4] |
| ldc2 p1, c7, [r2] |
| ldc2 p2, c6, [r3, #-224] |
| ldc2 p3, c5, [r4, #-120]! |
| ldc2 p4, c4, [r5], #16 |
| ldc2 p5, c3, [r6], #-72 |
| ldc2l p6, c2, [r7, #4] |
| ldc2l p7, c1, [r8] |
| ldc2l p8, c0, [r9, #-224] |
| ldc2l p9, c1, [r10, #-120]! |
| ldc2l p0, c2, [r11], #16 |
| ldc2l p1, c3, [r12], #-72 |
| |
| ldc p12, c4, [r0, #4] |
| ldc p13, c5, [r1] |
| ldc p14, c6, [r2, #-224] |
| ldc p15, c7, [r3, #-120]! |
| ldc p5, c8, [r4], #16 |
| ldc p4, c9, [r5], #-72 |
| ldcl p3, c10, [r6, #4] |
| ldcl p2, c11, [r7] |
| ldcl p1, c12, [r8, #-224] |
| ldcl p0, c13, [r9, #-120]! |
| ldcl p6, c14, [r10], #16 |
| ldcl p7, c15, [r11], #-72 |
| |
| ldclo p12, c4, [r0, #4] |
| ldchi p13, c5, [r1] |
| ldccs p14, c6, [r2, #-224] |
| ldccc p15, c7, [r3, #-120]! |
| ldceq p5, c8, [r4], #16 |
| ldcgt p4, c9, [r5], #-72 |
| ldcllt p3, c10, [r6, #4] |
| ldclge p2, c11, [r7] |
| ldclle p1, c12, [r8, #-224] |
| ldclne p0, c13, [r9, #-120]! |
| ldcleq p6, c14, [r10], #16 |
| ldclhi p7, c15, [r11], #-72 |
| |
| ldc2 p2, c8, [r1], { 25 } |
| |
| @ CHECK: ldc2 p0, c8, [r1, #4] @ encoding: [0x01,0x80,0x91,0xfd] |
| @ CHECK: ldc2 p1, c7, [r2] @ encoding: [0x00,0x71,0x92,0xfd] |
| @ CHECK: ldc2 p2, c6, [r3, #-224] @ encoding: [0x38,0x62,0x13,0xfd] |
| @ CHECK: ldc2 p3, c5, [r4, #-120]! @ encoding: [0x1e,0x53,0x34,0xfd] |
| @ CHECK: ldc2 p4, c4, [r5], #16 @ encoding: [0x04,0x44,0xb5,0xfc] |
| @ CHECK: ldc2 p5, c3, [r6], #-72 @ encoding: [0x12,0x35,0x36,0xfc] |
| @ CHECK: ldc2l p6, c2, [r7, #4] @ encoding: [0x01,0x26,0xd7,0xfd] |
| @ CHECK: ldc2l p7, c1, [r8] @ encoding: [0x00,0x17,0xd8,0xfd] |
| @ CHECK: ldc2l p8, c0, [r9, #-224] @ encoding: [0x38,0x08,0x59,0xfd] |
| @ CHECK: ldc2l p9, c1, [r10, #-120]! @ encoding: [0x1e,0x19,0x7a,0xfd] |
| @ CHECK: ldc2l p0, c2, [r11], #16 @ encoding: [0x04,0x20,0xfb,0xfc] |
| @ CHECK: ldc2l p1, c3, [r12], #-72 @ encoding: [0x12,0x31,0x7c,0xfc] |
| |
| @ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0xed] |
| @ CHECK: ldc p13, c5, [r1] @ encoding: [0x00,0x5d,0x91,0xed] |
| @ CHECK: ldc p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x12,0xed] |
| @ CHECK: ldc p15, c7, [r3, #-120]! @ encoding: [0x1e,0x7f,0x33,0xed] |
| @ CHECK: ldc p5, c8, [r4], #16 @ encoding: [0x04,0x85,0xb4,0xec] |
| @ CHECK: ldc p4, c9, [r5], #-72 @ encoding: [0x12,0x94,0x35,0xec] |
| @ CHECK: ldcl p3, c10, [r6, #4] @ encoding: [0x01,0xa3,0xd6,0xed] |
| @ CHECK: ldcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xd7,0xed] |
| @ CHECK: ldcl p1, c12, [r8, #-224] @ encoding: [0x38,0xc1,0x58,0xed] |
| @ CHECK: ldcl p0, c13, [r9, #-120]! @ encoding: [0x1e,0xd0,0x79,0xed] |
| @ CHECK: ldcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0xec] |
| @ CHECK: ldcl p7, c15, [r11], #-72 @ encoding: [0x12,0xf7,0x7b,0xec] |
| |
| @ CHECK: ldclo p12, c4, [r0, #4] @ encoding: [0x01,0x4c,0x90,0x3d] |
| @ CHECK: ldchi p13, c5, [r1] @ encoding: [0x00,0x5d,0x91,0x8d] |
| @ CHECK: ldchs p14, c6, [r2, #-224] @ encoding: [0x38,0x6e,0x12,0x2d] |
| @ CHECK: ldclo p15, c7, [r3, #-120]! @ encoding: [0x1e,0x7f,0x33,0x3d] |
| @ CHECK: ldceq p5, c8, [r4], #16 @ encoding: [0x04,0x85,0xb4,0x0c] |
| @ CHECK: ldcgt p4, c9, [r5], #-72 @ encoding: [0x12,0x94,0x35,0xcc] |
| @ CHECK: ldcllt p3, c10, [r6, #4] @ encoding: [0x01,0xa3,0xd6,0xbd] |
| @ CHECK: ldclge p2, c11, [r7] @ encoding: [0x00,0xb2,0xd7,0xad] |
| @ CHECK: ldclle p1, c12, [r8, #-224] @ encoding: [0x38,0xc1,0x58,0xdd] |
| @ CHECK: ldclne p0, c13, [r9, #-120]! @ encoding: [0x1e,0xd0,0x79,0x1d] |
| @ CHECK: ldcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0x0c] |
| @ CHECK: ldclhi p7, c15, [r11], #-72 @ encoding: [0x12,0xf7,0x7b,0x8c] |
| |
| @ CHECK: ldc2 p2, c8, [r1], {25} @ encoding: [0x19,0x82,0x91,0xfc] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ LDM* |
| @------------------------------------------------------------------------------ |
| ldm r2, {r1,r3-r6,sp} |
| ldmia r2, {r1,r3-r6,sp} |
| ldmib r2, {r1,r3-r6,sp} |
| ldmda r2, {r1,r3-r6,sp} |
| ldmdb r2, {r1,r3-r6,sp} |
| ldmfd r2, {r1,r3-r6,sp} |
| |
| @ with update |
| ldm r2!, {r1,r3-r6,sp} |
| ldmib r2!, {r1,r3-r6,sp} |
| ldmda r2!, {r1,r3-r6,sp} |
| ldmdb r2!, {r1,r3-r6,sp} |
| |
| @ system version |
| ldm r0, {r0, r2, lr}^ |
| ldm sp!, {r0-r3, pc}^ |
| |
| @ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] |
| @ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] |
| @ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] |
| @ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] |
| @ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] |
| @ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] |
| |
| @ CHECK: ldm r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8] |
| @ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9] |
| @ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8] |
| @ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9] |
| @ CHECK: ldm r0, {r0, r2, lr} ^ @ encoding: [0x05,0x40,0xd0,0xe8] |
| @ CHECK: ldm sp!, {r0, r1, r2, r3, pc} ^ @ encoding: [0x0f,0x80,0xfd,0xe8] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ LDREX/LDREXB/LDREXH/LDREXD |
| @------------------------------------------------------------------------------ |
| ldrexb r3, [r4] |
| ldrexh r2, [r5] |
| ldrex r1, [r7] |
| ldrexd r6, r7, [r8] |
| |
| @ CHECK: ldrexb r3, [r4] @ encoding: [0x9f,0x3f,0xd4,0xe1] |
| @ CHECK: ldrexh r2, [r5] @ encoding: [0x9f,0x2f,0xf5,0xe1] |
| @ CHECK: ldrex r1, [r7] @ encoding: [0x9f,0x1f,0x97,0xe1] |
| @ CHECK: ldrexd r6, r7, [r8] @ encoding: [0x9f,0x6f,0xb8,0xe1] |
| |
| @------------------------------------------------------------------------------ |
| @ LDRHT |
| @------------------------------------------------------------------------------ |
| ldrhthi r8, [r11], #-0 |
| ldrhthi r8, [r11], #0 |
| |
| @ CHECK: ldrhthi r8, [r11], #-0 @ encoding: [0xb0,0x80,0x7b,0x80] |
| @ CHECK: ldrhthi r8, [r11], #0 @ encoding: [0xb0,0x80,0xfb,0x80] |
| |
| @------------------------------------------------------------------------------ |
| @ LSL |
| @------------------------------------------------------------------------------ |
| lsl r2, r4, #31 |
| lsl r2, r4, #1 |
| lsl r2, r4, #0 |
| lsl r4, #1 |
| |
| @ CHECK: lsl r2, r4, #31 @ encoding: [0x84,0x2f,0xa0,0xe1] |
| @ CHECK: lsl r2, r4, #1 @ encoding: [0x84,0x20,0xa0,0xe1] |
| @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1] |
| @ CHECK: lsl r4, r4, #1 @ encoding: [0x84,0x40,0xa0,0xe1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ LSR |
| @------------------------------------------------------------------------------ |
| lsr r2, r4, #32 |
| lsr r2, r4, #2 |
| lsr r2, r4, #0 |
| lsr r4, #2 |
| |
| @ CHECK: lsr r2, r4, #32 @ encoding: [0x24,0x20,0xa0,0xe1] |
| @ CHECK: lsr r2, r4, #2 @ encoding: [0x24,0x21,0xa0,0xe1] |
| @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1] |
| @ CHECK: lsr r4, r4, #2 @ encoding: [0x24,0x41,0xa0,0xe1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MCR/MCR2 |
| @------------------------------------------------------------------------------ |
| mcr p7, #1, r5, c1, c1, #4 |
| mcr2 p7, #1, r5, c1, c1, #4 |
| MCR P7, #1, R5, C1, C1, #4 |
| MCR2 P7, #1, R5, C1, C1, #4 |
| |
| @ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] |
| @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] |
| @ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] |
| @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] |
| |
| mcrls p7, #1, r5, c1, c1, #4 |
| MCRLS P7, #1, R5, C1, C1, #4 |
| @ CHECK: mcrls p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0x9e] |
| @ CHECK: mcrls p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0x9e] |
| |
| @------------------------------------------------------------------------------ |
| @ MCRR/MCRR2 |
| @------------------------------------------------------------------------------ |
| mcrr p7, #15, r5, r4, c1 |
| mcrr2 p7, #15, r5, r4, c1 |
| MCRR P7, #15, R5, R4, C1 |
| MCRR2 P7, #15, R5, R4, C1 |
| |
| @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec] |
| @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc] |
| @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec] |
| @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc] |
| |
| mcrrgt p7, #15, r5, r4, c1 |
| MCRRGT P7, #15, R5, R4, C1 |
| @ CHECK: mcrrgt p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xcc] |
| @ CHECK: mcrrgt p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xcc] |
| |
| @------------------------------------------------------------------------------ |
| @ MLA |
| @------------------------------------------------------------------------------ |
| mla r1,r2,r3,r4 |
| mlas r1,r2,r3,r4 |
| mlane r1,r2,r3,r4 |
| mlasne r1,r2,r3,r4 |
| |
| @ CHECK: mla r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0xe0] |
| @ CHECK: mlas r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0] |
| @ CHECK: mlane r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0x10] |
| @ CHECK: mlasne r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0x10] |
| |
| @------------------------------------------------------------------------------ |
| @ MLS |
| @------------------------------------------------------------------------------ |
| mls r2,r5,r6,r3 |
| mlsne r2,r5,r6,r3 |
| |
| @ CHECK: mls r2, r5, r6, r3 @ encoding: [0x95,0x36,0x62,0xe0] |
| @ CHECK: mlsne r2, r5, r6, r3 @ encoding: [0x95,0x36,0x62,0x10] |
| |
| @------------------------------------------------------------------------------ |
| @ MOV (immediate) |
| @------------------------------------------------------------------------------ |
| mov r3, #7 |
| mov r3, $7 |
| mov r3, 7 |
| mov r3, -7 |
| mov r4, #0xff0 |
| mov r5, #0xff0000 |
| mov r7, #42, #0 |
| mov r7, #42, #10 |
| mov r7, #(0xff << 16) |
| mov r7, #-2147483638 |
| mov r7, #42, #2 |
| mov pc, #42, #2 |
| mov r7, #0, #2 |
| mov r7, #40, #2 |
| mov r7, $40, $2 |
| mov r7, 40, 2 |
| mov r7, (2 * 20), (1 << 1) |
| mov r7, #42, #30 |
| mov r6, #0xffff |
| movw r9, #0xffff |
| movs r3, #7 |
| moveq r4, #0xff0 |
| movseq r5, #0xff0000 |
| |
| @ CHECK: mov r3, #7 @ encoding: [0x07,0x30,0xa0,0xe3] |
| @ CHECK: mov r3, #7 @ encoding: [0x07,0x30,0xa0,0xe3] |
| @ CHECK: mov r3, #7 @ encoding: [0x07,0x30,0xa0,0xe3] |
| @ CHECK: mvn r3, #6 @ encoding: [0x06,0x30,0xe0,0xe3] |
| @ CHECK: mov r4, #4080 @ encoding: [0xff,0x4e,0xa0,0xe3] |
| @ CHECK: mov r5, #16711680 @ encoding: [0xff,0x58,0xa0,0xe3] |
| @ CHECK: mov r7, #42 @ encoding: [0x2a,0x70,0xa0,0xe3] |
| @ CHECK: mov r7, #176160768 @ encoding: [0x2a,0x75,0xa0,0xe3] |
| @ CHECK: mov r7, #16711680 @ encoding: [0xff,0x78,0xa0,0xe3] |
| @ CHECK: mov r7, #-2147483638 @ encoding: [0x2a,0x71,0xa0,0xe3] |
| @ CHECK: mov r7, #-2147483638 @ encoding: [0x2a,0x71,0xa0,0xe3] |
| @ CHECK: mov pc, #2147483658 @ encoding: [0x2a,0xf1,0xa0,0xe3] |
| @ CHECK: mov r7, #0, #2 @ encoding: [0x00,0x71,0xa0,0xe3] |
| @ CHECK: mov r7, #40, #2 @ encoding: [0x28,0x71,0xa0,0xe3] |
| @ CHECK: mov r7, #40, #2 @ encoding: [0x28,0x71,0xa0,0xe3] |
| @ CHECK: mov r7, #40, #2 @ encoding: [0x28,0x71,0xa0,0xe3] |
| @ CHECK: mov r7, #40, #2 @ encoding: [0x28,0x71,0xa0,0xe3] |
| @ CHECK: mov r7, #42, #30 @ encoding: [0x2a,0x7f,0xa0,0xe3] |
| @ CHECK: movw r6, #65535 @ encoding: [0xff,0x6f,0x0f,0xe3] |
| @ CHECK: movw r9, #65535 @ encoding: [0xff,0x9f,0x0f,0xe3] |
| @ CHECK: movs r3, #7 @ encoding: [0x07,0x30,0xb0,0xe3] |
| @ CHECK: moveq r4, #4080 @ encoding: [0xff,0x4e,0xa0,0x03] |
| @ CHECK: movseq r5, #16711680 @ encoding: [0xff,0x58,0xb0,0x03] |
| |
| @------------------------------------------------------------------------------ |
| @ MOV (register) |
| @------------------------------------------------------------------------------ |
| mov r2, r3 |
| movs r2, r3 |
| moveq r2, r3 |
| movseq r2, r3 |
| mov r12, r8, lsl #(2 - 2) |
| lsl r2, r3, #(2 - 2) |
| mov r12, r8, lsr #(2 - 2) |
| lsr r2, r3, #(2 - 2) |
| mov r12, r8, asr #(2 - 2) |
| asr r2, r3, #(2 - 2) |
| mov r12, r8, ror #(2 - 2) |
| ror r2, r3, #(2 - 2) |
| |
| @ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] |
| @ CHECK: movs r2, r3 @ encoding: [0x03,0x20,0xb0,0xe1] |
| @ CHECK: moveq r2, r3 @ encoding: [0x03,0x20,0xa0,0x01] |
| @ CHECK: movseq r2, r3 @ encoding: [0x03,0x20,0xb0,0x01] |
| @ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] |
| @ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] |
| @ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] |
| @ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] |
| @ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] |
| @ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] |
| @ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1] |
| @ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MOVT |
| @------------------------------------------------------------------------------ |
| movt r3, #7 |
| movt r6, #0xffff |
| movteq r4, #0xff0 |
| |
| @ CHECK: movt r3, #7 @ encoding: [0x07,0x30,0x40,0xe3] |
| @ CHECK: movt r6, #65535 @ encoding: [0xff,0x6f,0x4f,0xe3] |
| @ CHECK: movteq r4, #4080 @ encoding: [0xf0,0x4f,0x40,0x03] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MRC/MRC2 |
| @------------------------------------------------------------------------------ |
| mrc p14, #0, r1, c1, c2, #4 |
| mrc p15, #7, apsr_nzcv, c15, c6, #6 |
| mrc2 p14, #0, r1, c1, c2, #4 |
| mrc2 p9, #7, apsr_nzcv, c15, c0, #1 |
| MRC P14, #0, R1, C1, C2, #4 |
| MRC P15, #7, APSR_NZCV, C15, C6, #6 |
| MRC2 P14, #0, R1, C1, C2, #4 |
| MRC2 P9, #7, APSR_NZCV, C15, C0, #1 |
| |
| @ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee] |
| @ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0xee] |
| @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe] |
| @ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe] |
| @ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee] |
| @ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0xee] |
| @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe] |
| @ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe] |
| |
| mrceq p15, #7, apsr_nzcv, c15, c6, #6 |
| MRCEQ P15, #7, APSR_NZCV, C15, C6, #6 |
| @ CHECK: mrceq p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0x0e] |
| @ CHECK: mrceq p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0x0e] |
| |
| @------------------------------------------------------------------------------ |
| @ MRRC/MRRC2 |
| @------------------------------------------------------------------------------ |
| mrrc p7, #1, r5, r4, c1 |
| mrrc2 p7, #1, r5, r4, c1 |
| MRRC P7, #1, R5, R4, C1 |
| MRRC2 P7, #1, R5, R4, C1 |
| |
| @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec] |
| @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc] |
| @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec] |
| @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc] |
| |
| mrrclo p7, #1, r5, r4, c1 |
| MRRCLO P7, #1, R5, R4, C1 |
| @ CHECK: mrrclo p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0x3c] |
| @ CHECK: mrrclo p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0x3c] |
| |
| @------------------------------------------------------------------------------ |
| @ MRS |
| @------------------------------------------------------------------------------ |
| mrs r8, apsr |
| mrs r8, cpsr |
| mrs r8, spsr |
| @ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1] |
| @ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1] |
| @ CHECK: mrs r8, spsr @ encoding: [0x00,0x80,0x4f,0xe1] |
| |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MSR |
| @------------------------------------------------------------------------------ |
| |
| msr apsr, #5 |
| msr apsr, $5 |
| msr apsr, 5 |
| msr apsr_g, #5 |
| msr apsr_nzcvq, #5 |
| msr APSR_nzcvq, #5 |
| msr apsr_nzcvqg, #5 |
| msr cpsr_fc, #5 |
| msr cpsr_c, #5 |
| msr cpsr_x, #5 |
| msr cpsr_fc, #5 |
| msr cpsr_all, #5 |
| msr cpsr_fsx, #5 |
| msr spsr_fc, #5 |
| msr SPSR_fsxc, #5 |
| msr cpsr_fsxc, #5 |
| msr apsr_nzcvqg, #(0xff << 16) |
| msr APSR_nzcvq, #42, #2 |
| msr apsr_nzcvqg, #2147483658 |
| msr SPSR_fsxc, #40, #2 |
| msr SPSR_fsxc, $40, $2 |
| msr SPSR_fsxc, 40, 2 |
| msr SPSR_fsxc, (2 * 20), (1 << 1) |
| |
| @ CHECK: msr APSR_nzcvq, #5 @ encoding: [0x05,0xf0,0x28,0xe3] |
| @ CHECK: msr APSR_nzcvq, #5 @ encoding: [0x05,0xf0,0x28,0xe3] |
| @ CHECK: msr APSR_nzcvq, #5 @ encoding: [0x05,0xf0,0x28,0xe3] |
| @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3] |
| @ CHECK: msr APSR_nzcvq, #5 @ encoding: [0x05,0xf0,0x28,0xe3] |
| @ CHECK: msr APSR_nzcvq, #5 @ encoding: [0x05,0xf0,0x28,0xe3] |
| @ CHECK: msr APSR_nzcvqg, #5 @ encoding: [0x05,0xf0,0x2c,0xe3] |
| @ CHECK: msr CPSR_fc, #5 @ encoding: [0x05,0xf0,0x29,0xe3] |
| @ CHECK: msr CPSR_c, #5 @ encoding: [0x05,0xf0,0x21,0xe3] |
| @ CHECK: msr CPSR_x, #5 @ encoding: [0x05,0xf0,0x22,0xe3] |
| @ CHECK: msr CPSR_fc, #5 @ encoding: [0x05,0xf0,0x29,0xe3] |
| @ CHECK: msr CPSR_fc, #5 @ encoding: [0x05,0xf0,0x29,0xe3] |
| @ CHECK: msr CPSR_fsx, #5 @ encoding: [0x05,0xf0,0x2e,0xe3] |
| @ CHECK: msr SPSR_fc, #5 @ encoding: [0x05,0xf0,0x69,0xe3] |
| @ CHECK: msr SPSR_fsxc, #5 @ encoding: [0x05,0xf0,0x6f,0xe3] |
| @ CHECK: msr CPSR_fsxc, #5 @ encoding: [0x05,0xf0,0x2f,0xe3] |
| @ CHECK: msr APSR_nzcvqg, #16711680 @ encoding: [0xff,0xf8,0x2c,0xe3] |
| @ CHECK: msr APSR_nzcvq, #2147483658 @ encoding: [0x2a,0xf1,0x28,0xe3] |
| @ CHECK: msr APSR_nzcvqg, #2147483658 @ encoding: [0x2a,0xf1,0x2c,0xe3] |
| @ CHECK: msr SPSR_fsxc, #40, #2 @ encoding: [0x28,0xf1,0x6f,0xe3] |
| @ CHECK: msr SPSR_fsxc, #40, #2 @ encoding: [0x28,0xf1,0x6f,0xe3] |
| @ CHECK: msr SPSR_fsxc, #40, #2 @ encoding: [0x28,0xf1,0x6f,0xe3] |
| @ CHECK: msr SPSR_fsxc, #40, #2 @ encoding: [0x28,0xf1,0x6f,0xe3] |
| |
| msr apsr, r0 |
| msr apsr_g, r0 |
| msr apsr_nzcvq, r0 |
| msr APSR_nzcvq, r0 |
| msr apsr_nzcvqg, r0 |
| msr cpsr_fc, r0 |
| msr cpsr_c, r0 |
| msr cpsr_x, r0 |
| msr cpsr_fc, r0 |
| msr cpsr_all, r0 |
| msr cpsr_fsx, r0 |
| msr spsr_fc, r0 |
| msr SPSR_fsxc, r0 |
| msr cpsr_fsxc, r0 |
| |
| @ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] |
| @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1] |
| @ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] |
| @ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1] |
| @ CHECK: msr APSR_nzcvqg, r0 @ encoding: [0x00,0xf0,0x2c,0xe1] |
| @ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] |
| @ CHECK: msr CPSR_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1] |
| @ CHECK: msr CPSR_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1] |
| @ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] |
| @ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] |
| @ CHECK: msr CPSR_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1] |
| @ CHECK: msr SPSR_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1] |
| @ CHECK: msr SPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1] |
| @ CHECK: msr CPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1] |
| |
| @------------------------------------------------------------------------------ |
| @ MUL |
| @------------------------------------------------------------------------------ |
| mul r5, r6, r7 |
| muls r5, r6, r7 |
| mulgt r5, r6, r7 |
| mulsle r5, r6, r7 |
| mul r11, r5 |
| |
| @ CHECK: mul r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xe0] |
| @ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0] |
| @ CHECK: mulgt r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xc0] |
| @ CHECK: mulsle r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xd0] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MVN (immediate) |
| @------------------------------------------------------------------------------ |
| mvn r3, #7 |
| mvn r3, $7 |
| mvn r3, 7 |
| mvn r3, -7 |
| mvn r7, #~0xffffff00 |
| mvn r4, #0xff0 |
| mvn r5, #0xff0000 |
| mvn r7, #(0xff << 16) |
| mvn r7, #-2147483638 |
| mvn r7, #42, #2 |
| mvn r7, #40, #2 |
| mvn r7, $40, $2 |
| mvn r7, 40, 2 |
| mvn r7, (2 * 20), (1 << 1) |
| mvns r3, #7 |
| mvneq r4, #0xff0 |
| mvnseq r5, #0xff0000 |
| |
| @ CHECK: mvn r3, #7 @ encoding: [0x07,0x30,0xe0,0xe3] |
| @ CHECK: mvn r3, #7 @ encoding: [0x07,0x30,0xe0,0xe3] |
| @ CHECK: mvn r3, #7 @ encoding: [0x07,0x30,0xe0,0xe3] |
| @ CHECK: mov r3, #6 @ encoding: [0x06,0x30,0xa0,0xe3] |
| @ CHECK: mvn r7, #255 @ encoding: [0xff,0x70,0xe0,0xe3] |
| @ CHECK: mvn r4, #4080 @ encoding: [0xff,0x4e,0xe0,0xe3] |
| @ CHECK: mvn r5, #16711680 @ encoding: [0xff,0x58,0xe0,0xe3] |
| @ CHECK: mvn r7, #16711680 @ encoding: [0xff,0x78,0xe0,0xe3] |
| @ CHECK: mvn r7, #-2147483638 @ encoding: [0x2a,0x71,0xe0,0xe3] |
| @ CHECK: mvn r7, #-2147483638 @ encoding: [0x2a,0x71,0xe0,0xe3] |
| @ CHECK: mvn r7, #40, #2 @ encoding: [0x28,0x71,0xe0,0xe3] |
| @ CHECK: mvn r7, #40, #2 @ encoding: [0x28,0x71,0xe0,0xe3] |
| @ CHECK: mvn r7, #40, #2 @ encoding: [0x28,0x71,0xe0,0xe3] |
| @ CHECK: mvn r7, #40, #2 @ encoding: [0x28,0x71,0xe0,0xe3] |
| @ CHECK: mvns r3, #7 @ encoding: [0x07,0x30,0xf0,0xe3] |
| @ CHECK: mvneq r4, #4080 @ encoding: [0xff,0x4e,0xe0,0x03] |
| @ CHECK: mvnseq r5, #16711680 @ encoding: [0xff,0x58,0xf0,0x03] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MVN (register) |
| @------------------------------------------------------------------------------ |
| mvn r2, r3 |
| mvns r2, r3 |
| mvn r5, r6, lsl #19 |
| mvn r5, r6, lsr #9 |
| mvn r5, r6, asr #4 |
| mvn r5, r6, ror #6 |
| mvn r5, r6, rrx |
| mvneq r2, r3 |
| mvnseq r2, r3, lsl #10 |
| |
| @ CHECK: mvn r2, r3 @ encoding: [0x03,0x20,0xe0,0xe1] |
| @ CHECK: mvns r2, r3 @ encoding: [0x03,0x20,0xf0,0xe1] |
| @ CHECK: mvn r5, r6, lsl #19 @ encoding: [0x86,0x59,0xe0,0xe1] |
| @ CHECK: mvn r5, r6, lsr #9 @ encoding: [0xa6,0x54,0xe0,0xe1] |
| @ CHECK: mvn r5, r6, asr #4 @ encoding: [0x46,0x52,0xe0,0xe1] |
| @ CHECK: mvn r5, r6, ror #6 @ encoding: [0x66,0x53,0xe0,0xe1] |
| @ CHECK: mvn r5, r6, rrx @ encoding: [0x66,0x50,0xe0,0xe1] |
| @ CHECK: mvneq r2, r3 @ encoding: [0x03,0x20,0xe0,0x01] |
| @ CHECK: mvnseq r2, r3, lsl #10 @ encoding: [0x03,0x25,0xf0,0x01] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ MVN (shifted register) |
| @------------------------------------------------------------------------------ |
| mvn r5, r6, lsl r7 |
| mvns r5, r6, lsr r7 |
| mvngt r5, r6, asr r7 |
| mvnslt r5, r6, ror r7 |
| |
| @ CHECK: mvn r5, r6, lsl r7 @ encoding: [0x16,0x57,0xe0,0xe1] |
| @ CHECK: mvns r5, r6, lsr r7 @ encoding: [0x36,0x57,0xf0,0xe1] |
| @ CHECK: mvngt r5, r6, asr r7 @ encoding: [0x56,0x57,0xe0,0xc1] |
| @ CHECK: mvnslt r5, r6, ror r7 @ encoding: [0x76,0x57,0xf0,0xb1] |
| |
| @------------------------------------------------------------------------------ |
| @ NEG |
| @------------------------------------------------------------------------------ |
| neg r5, r8 |
| |
| @ CHECK: rsb r5, r8, #0 @ encoding: [0x00,0x50,0x68,0xe2] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ NOP |
| @------------------------------------------------------------------------------ |
| nop |
| nop.w |
| nopgt |
| |
| @ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] |
| @ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] |
| @ CHECK: nopgt @ encoding: [0x00,0xf0,0x20,0xc3] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ ORR |
| @------------------------------------------------------------------------------ |
| orr r4, r5, #0xf000 |
| orr r4, r5, $0xf000 |
| orr r4, r5, 0xf000 |
| orr r7, r8, #(0xff << 16) |
| orr r7, r8, #-2147483638 |
| orr r7, r8, #42, #2 |
| orr r7, r8, #40, #2 |
| orr r7, r8, $40, $2 |
| orr r7, r8, 40, 2 |
| orr r7, r8, (2 * 20), (1 << 1) |
| orr r4, r5, r6 |
| orr r4, r5, r6, lsl #5 |
| orr r4, r5, r6, lsr #5 |
| orr r4, r5, r6, lsr #5 |
| orr r4, r5, r6, asr #5 |
| orr r4, r5, r6, ror #5 |
| orr r6, r7, r8, lsl r9 |
| orr r6, r7, r8, lsr r9 |
| orr r6, r7, r8, asr r9 |
| orr r6, r7, r8, ror r9 |
| orr r4, r5, r6, rrx |
| |
| @ destination register is optional |
| orr r5, #0xf000 |
| orr r5, $0xf000 |
| orr r5, 0xf000 |
| |
| orr r7, #(0xff << 16) |
| orr r7, #-2147483638 |
| orr r7, #42, #2 |
| orr r7, #40, #2 |
| orr r7, $40, $2 |
| orr r7, 40, 2 |
| orr r7, (2 * 20), (1 << 1) |
| |
| orr r4, r5 |
| orr r4, r5, lsl #5 |
| orr r4, r5, lsr #5 |
| orr r4, r5, lsr #5 |
| orr r4, r5, asr #5 |
| orr r4, r5, ror #5 |
| orr r6, r7, lsl r9 |
| orr r6, r7, lsr r9 |
| orr r6, r7, asr r9 |
| orr r6, r7, ror r9 |
| orr r4, r5, rrx |
| |
| @ CHECK: orr r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe3] |
| @ CHECK: orr r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe3] |
| @ CHECK: orr r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe3] |
| @ CHECK: orr r7, r8, #16711680 @ encoding: [0xff,0x78,0x88,0xe3] |
| @ CHECK: orr r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x88,0xe3] |
| @ CHECK: orr r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x88,0xe3] |
| @ CHECK: orr r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe3] |
| @ CHECK: orr r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe3] |
| @ CHECK: orr r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe3] |
| @ CHECK: orr r7, r8, #40, #2 @ encoding: [0x28,0x71,0x88,0xe3] |
| @ CHECK: orr r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe1] |
| @ CHECK: orr r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0x85,0xe1] |
| @ CHECK: orr r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x85,0xe1] |
| @ CHECK: orr r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x85,0xe1] |
| @ CHECK: orr r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0x85,0xe1] |
| @ CHECK: orr r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0x85,0xe1] |
| @ CHECK: orr r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x87,0xe1] |
| @ CHECK: orr r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x87,0xe1] |
| @ CHECK: orr r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x87,0xe1] |
| @ CHECK: orr r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0xe1] |
| @ CHECK: orr r4, r5, r6, rrx @ encoding: [0x66,0x40,0x85,0xe1] |
| |
| @ CHECK: orr r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0xe3] |
| @ CHECK: orr r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0xe3] |
| @ CHECK: orr r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0xe3] |
| @ CHECK: orr r7, r7, #16711680 @ encoding: [0xff,0x78,0x87,0xe3] |
| @ CHECK: orr r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x87,0xe3] |
| @ CHECK: orr r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x87,0xe3] |
| @ CHECK: orr r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe3] |
| @ CHECK: orr r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe3] |
| @ CHECK: orr r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe3] |
| @ CHECK: orr r7, r7, #40, #2 @ encoding: [0x28,0x71,0x87,0xe3] |
| @ CHECK: orr r4, r4, r5 @ encoding: [0x05,0x40,0x84,0xe1] |
| @ CHECK: orr r4, r4, r5, lsl #5 @ encoding: [0x85,0x42,0x84,0xe1] |
| @ CHECK: orr r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x84,0xe1] |
| @ CHECK: orr r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x84,0xe1] |
| @ CHECK: orr r4, r4, r5, asr #5 @ encoding: [0xc5,0x42,0x84,0xe1] |
| @ CHECK: orr r4, r4, r5, ror #5 @ encoding: [0xe5,0x42,0x84,0xe1] |
| @ CHECK: orr r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x86,0xe1] |
| @ CHECK: orr r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x86,0xe1] |
| @ CHECK: orr r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x86,0xe1] |
| @ CHECK: orr r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x86,0xe1] |
| @ CHECK: orr r4, r4, r5, rrx @ encoding: [0x65,0x40,0x84,0xe1] |
| |
| orrseq r4, r5, #0xf000 |
| orrne r4, r5, r6 |
| orrseq r4, r5, r6, lsl #5 |
| orrlo r6, r7, r8, ror r9 |
| orrshi r4, r5, r6, rrx |
| orrcs r5, #0xf000 |
| orrseq r4, r5 |
| orrne r6, r7, asr r9 |
| orrslt r6, r7, ror r9 |
| orrsgt r4, r5, rrx |
| |
| @ CHECK: orrseq r4, r5, #61440 @ encoding: [0x0f,0x4a,0x95,0x03] |
| @ CHECK: orrne r4, r5, r6 @ encoding: [0x06,0x40,0x85,0x11] |
| @ CHECK: orrseq r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0x95,0x01] |
| @ CHECK: orrlo r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0x31] |
| @ CHECK: orrshi r4, r5, r6, rrx @ encoding: [0x66,0x40,0x95,0x81] |
| @ CHECK: orrhs r5, r5, #61440 @ encoding: [0x0f,0x5a,0x85,0x23] |
| @ CHECK: orrseq r4, r4, r5 @ encoding: [0x05,0x40,0x94,0x01] |
| @ CHECK: orrne r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x86,0x11] |
| @ CHECK: orrslt r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x96,0xb1] |
| @ CHECK: orrsgt r4, r4, r5, rrx @ encoding: [0x65,0x40,0x94,0xc1] |
| |
| @ Test right shift by 32, which is encoded as 0 |
| orr r3, r1, r2, lsr #32 |
| orr r3, r1, r2, asr #32 |
| @ CHECK: orr r3, r1, r2, lsr #32 @ encoding: [0x22,0x30,0x81,0xe1] |
| @ CHECK: orr r3, r1, r2, asr #32 @ encoding: [0x42,0x30,0x81,0xe1] |
| |
| @------------------------------------------------------------------------------ |
| @ PKH |
| @------------------------------------------------------------------------------ |
| pkhbt r2, r2, r3 |
| pkhbt r2, r2, r3, lsl #31 |
| pkhbt r2, r2, r3, lsl #0 |
| pkhbt r2, r2, r3, lsl #15 |
| |
| pkhtb r2, r2, r3 |
| pkhtb r2, r2, r3, asr #31 |
| pkhtb r2, r2, r3, asr #15 |
| |
| @ CHECK: pkhbt r2, r2, r3 @ encoding: [0x13,0x20,0x82,0xe6] |
| @ CHECK: pkhbt r2, r2, r3, lsl #31 @ encoding: [0x93,0x2f,0x82,0xe6] |
| @ CHECK: pkhbt r2, r2, r3 @ encoding: [0x13,0x20,0x82,0xe6] |
| @ CHECK: pkhbt r2, r2, r3, lsl #15 @ encoding: [0x93,0x27,0x82,0xe6] |
| |
| @ CHECK: pkhbt r2, r3, r2 @ encoding: [0x12,0x20,0x83,0xe6] |
| @ CHECK: pkhtb r2, r2, r3, asr #31 @ encoding: [0xd3,0x2f,0x82,0xe6] |
| @ CHECK: pkhtb r2, r2, r3, asr #15 @ encoding: [0xd3,0x27,0x82,0xe6] |
| |
| @------------------------------------------------------------------------------ |
| @ FIXME: PLD |
| @------------------------------------------------------------------------------ |
| @------------------------------------------------------------------------------ |
| @ FIXME: PLI |
| @------------------------------------------------------------------------------ |
| |
| |
| @------------------------------------------------------------------------------ |
| @ POP |
| @------------------------------------------------------------------------------ |
| pop {r7} |
| pop {r7, r8, r9, r10} |
| |
| @ CHECK: pop {r7} @ encoding: [0x04,0x70,0x9d,0xe4] |
| @ CHECK: pop {r7, r8, r9, r10} @ encoding: [0x80,0x07,0xbd,0xe8] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ PUSH |
| @------------------------------------------------------------------------------ |
| push {r7} |
| push {r7, r8, r9, r10} |
| |
| @ CHECK: push {r7} @ encoding: [0x04,0x70,0x2d,0xe5] |
| @ CHECK: push {r7, r8, r9, r10} @ encoding: [0x80,0x07,0x2d,0xe9] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ QADD/QADD16/QADD8 |
| @------------------------------------------------------------------------------ |
| qadd r1, r2, r3 |
| qaddne r1, r2, r3 |
| qadd16 r1, r2, r3 |
| qadd16gt r1, r2, r3 |
| qadd8 r1, r2, r3 |
| qadd8le r1, r2, r3 |
| |
| @ CHECK: qadd r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1] |
| @ CHECK: qaddne r1, r2, r3 @ encoding: [0x52,0x10,0x03,0x11] |
| @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6] |
| @ CHECK: qadd16gt r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xc6] |
| @ CHECK: qadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x22,0xe6] |
| @ CHECK: qadd8le r1, r2, r3 @ encoding: [0x93,0x1f,0x22,0xd6] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ QDADD/QDSUB |
| @------------------------------------------------------------------------------ |
| qdadd r6, r7, r8 |
| qdaddhi r6, r7, r8 |
| qdsub r6, r7, r8 |
| qdsubhi r6, r7, r8 |
| |
| @ CHECK: qdadd r6, r7, r8 @ encoding: [0x57,0x60,0x48,0xe1] |
| @ CHECK: qdaddhi r6, r7, r8 @ encoding: [0x57,0x60,0x48,0x81] |
| @ CHECK: qdsub r6, r7, r8 @ encoding: [0x57,0x60,0x68,0xe1] |
| @ CHECK: qdsubhi r6, r7, r8 @ encoding: [0x57,0x60,0x68,0x81] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ QSAX |
| @------------------------------------------------------------------------------ |
| qsax r9, r12, r0 |
| qsaxeq r9, r12, r0 |
| |
| @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6] |
| @ CHECK: qsaxeq r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0x06] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ QSUB/QSUB16/QSUB8 |
| @------------------------------------------------------------------------------ |
| qsub r1, r2, r3 |
| qsubne r1, r2, r3 |
| qsub16 r1, r2, r3 |
| qsub16gt r1, r2, r3 |
| qsub8 r1, r2, r3 |
| qsub8le r1, r2, r3 |
| |
| @ CHECK: qsub r1, r2, r3 @ encoding: [0x52,0x10,0x23,0xe1] |
| @ CHECK: qsubne r1, r2, r3 @ encoding: [0x52,0x10,0x23,0x11] |
| @ CHECK: qsub16 r1, r2, r3 @ encoding: [0x73,0x1f,0x22,0xe6] |
| @ CHECK: qsub16gt r1, r2, r3 @ encoding: [0x73,0x1f,0x22,0xc6] |
| @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xe6] |
| @ CHECK: qsub8le r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xd6] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ RBIT |
| @------------------------------------------------------------------------------ |
| rbit r1, r2 |
| rbitne r1, r2 |
| |
| @ CHECK: rbit r1, r2 @ encoding: [0x32,0x1f,0xff,0xe6] |
| @ CHECK: rbitne r1, r2 @ encoding: [0x32,0x1f,0xff,0x16] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ REV/REV16/REVSH |
| @------------------------------------------------------------------------------ |
| rev r1, r9 |
| revne r1, r5 |
| rev16 r8, r3 |
| rev16ne r12, r4 |
| revsh r4, r9 |
| revshne r9, r1 |
| |
| @ CHECK: rev r1, r9 @ encoding: [0x39,0x1f,0xbf,0xe6] |
| @ CHECK: revne r1, r5 @ encoding: [0x35,0x1f,0xbf,0x16] |
| @ CHECK: rev16 r8, r3 @ encoding: [0xb3,0x8f,0xbf,0xe6] |
| @ CHECK: rev16ne r12, r4 @ encoding: [0xb4,0xcf,0xbf,0x16] |
| @ CHECK: revsh r4, r9 @ encoding: [0xb9,0x4f,0xff,0xe6] |
| @ CHECK: revshne r9, r1 @ encoding: [0xb1,0x9f,0xff,0x16] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ RFE |
| @------------------------------------------------------------------------------ |
| rfeda r2 |
| rfedb r3 |
| rfeia r5 |
| rfeib r6 |
| |
| rfeda r4! |
| rfedb r7! |
| rfeia r9! |
| rfeib r8! |
| |
| rfefa r2 |
| rfeea r3 |
| rfefd r5 |
| rfeed r6 |
| |
| rfefa r4! |
| rfeea r7! |
| rfefd r9! |
| rfeed r8! |
| |
| rfe r1 |
| rfe r1! |
| |
| @ CHECK: rfeda r2 @ encoding: [0x00,0x0a,0x12,0xf8] |
| @ CHECK: rfedb r3 @ encoding: [0x00,0x0a,0x13,0xf9] |
| @ CHECK: rfeia r5 @ encoding: [0x00,0x0a,0x95,0xf8] |
| @ CHECK: rfeib r6 @ encoding: [0x00,0x0a,0x96,0xf9] |
| |
| @ CHECK: rfeda r4! @ encoding: [0x00,0x0a,0x34,0xf8] |
| @ CHECK: rfedb r7! @ encoding: [0x00,0x0a,0x37,0xf9] |
| @ CHECK: rfeia r9! @ encoding: [0x00,0x0a,0xb9,0xf8] |
| @ CHECK: rfeib r8! @ encoding: [0x00,0x0a,0xb8,0xf9] |
| |
| @ CHECK: rfeda r2 @ encoding: [0x00,0x0a,0x12,0xf8] |
| @ CHECK: rfedb r3 @ encoding: [0x00,0x0a,0x13,0xf9] |
| @ CHECK: rfeia r5 @ encoding: [0x00,0x0a,0x95,0xf8] |
| @ CHECK: rfeib r6 @ encoding: [0x00,0x0a,0x96,0xf9] |
| |
| @ CHECK: rfeda r4! @ encoding: [0x00,0x0a,0x34,0xf8] |
| @ CHECK: rfedb r7! @ encoding: [0x00,0x0a,0x37,0xf9] |
| @ CHECK: rfeia r9! @ encoding: [0x00,0x0a,0xb9,0xf8] |
| @ CHECK: rfeib r8! @ encoding: [0x00,0x0a,0xb8,0xf9] |
| |
| @ CHECK: rfeia r1 @ encoding: [0x00,0x0a,0x91,0xf8] |
| @ CHECK: rfeia r1! @ encoding: [0x00,0x0a,0xb1,0xf8] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ ROR |
| @------------------------------------------------------------------------------ |
| ror r2, r4, #31 |
| ror r2, r4, #1 |
| ror r2, r4, #0 |
| ror r4, #1 |
| |
| @ CHECK: ror r2, r4, #31 @ encoding: [0xe4,0x2f,0xa0,0xe1] |
| @ CHECK: ror r2, r4, #1 @ encoding: [0xe4,0x20,0xa0,0xe1] |
| @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1] |
| @ CHECK: ror r4, r4, #1 @ encoding: [0xe4,0x40,0xa0,0xe1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ RSB |
| @------------------------------------------------------------------------------ |
| rsb r4, r5, #0xf000 |
| rsb r4, r5, $0xf000 |
| rsb r4, r5, 0xf000 |
| rsb r7, r8, #(0xff << 16) |
| rsb r7, r8, #-2147483638 |
| rsb r7, r8, #42, #2 |
| rsb r7, r8, #40, #2 |
| rsb r7, r8, $40, $2 |
| rsb r7, r8, 40, 2 |
| rsb r7, r8, (2 * 20), (1 << 1) |
| rsb r4, r5, r6 |
| rsb r4, r5, r6, lsl #5 |
| rsblo r4, r5, r6, lsr #5 |
| rsb r4, r5, r6, lsr #5 |
| rsb r4, r5, r6, asr #5 |
| rsb r4, r5, r6, ror #5 |
| rsb r6, r7, r8, lsl r9 |
| rsb r6, r7, r8, lsr r9 |
| rsb r6, r7, r8, asr r9 |
| rsble r6, r7, r8, ror r9 |
| rsb r4, r5, r6, rrx |
| |
| @ destination register is optional |
| rsb r5, #0xf000 |
| rsb r5, $0xf000 |
| rsb r5, 0xf000 |
| rsb r7, #(0xff << 16) |
| rsb r7, #-2147483638 |
| rsb r7, #42, #2 |
| rsb r7, #40, #2 |
| rsb r7, $40, $2 |
| rsb r7, 40, 2 |
| rsb r7, (2 * 20), (1 << 1) |
| rsb r4, r5 |
| rsb r4, r5, lsl #5 |
| rsb r4, r5, lsr #5 |
| rsbne r4, r5, lsr #5 |
| rsb r4, r5, asr #5 |
| rsb r4, r5, ror #5 |
| rsbgt r6, r7, lsl r9 |
| rsb r6, r7, lsr r9 |
| rsb r6, r7, asr r9 |
| rsb r6, r7, ror r9 |
| rsb r4, r5, rrx |
| |
| @ CHECK: rsb r4, r5, #61440 @ encoding: [0x0f,0x4a,0x65,0xe2] |
| @ CHECK: rsb r4, r5, #61440 @ encoding: [0x0f,0x4a,0x65,0xe2] |
| @ CHECK: rsb r4, r5, #61440 @ encoding: [0x0f,0x4a,0x65,0xe2] |
| @ CHECK: rsb r7, r8, #16711680 @ encoding: [0xff,0x78,0x68,0xe2] |
| @ CHECK: rsb r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x68,0xe2] |
| @ CHECK: rsb r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x68,0xe2] |
| @ CHECK: rsb r7, r8, #40, #2 @ encoding: [0x28,0x71,0x68,0xe2] |
| @ CHECK: rsb r7, r8, #40, #2 @ encoding: [0x28,0x71,0x68,0xe2] |
| @ CHECK: rsb r7, r8, #40, #2 @ encoding: [0x28,0x71,0x68,0xe2] |
| @ CHECK: rsb r7, r8, #40, #2 @ encoding: [0x28,0x71,0x68,0xe2] |
| @ CHECK: rsb r4, r5, r6 @ encoding: [0x06,0x40,0x65,0xe0] |
| @ CHECK: rsb r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0x65,0xe0] |
| @ CHECK: rsblo r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x65,0x30] |
| @ CHECK: rsb r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0x65,0xe0] |
| @ CHECK: rsb r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0x65,0xe0] |
| @ CHECK: rsb r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0x65,0xe0] |
| @ CHECK: rsb r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x67,0xe0] |
| @ CHECK: rsb r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x67,0xe0] |
| @ CHECK: rsb r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x67,0xe0] |
| @ CHECK: rsble r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x67,0xd0] |
| @ CHECK: rsb r4, r5, r6, rrx @ encoding: [0x66,0x40,0x65,0xe0] |
| |
| @ CHECK: rsb r5, r5, #61440 @ encoding: [0x0f,0x5a,0x65,0xe2] |
| @ CHECK: rsb r5, r5, #61440 @ encoding: [0x0f,0x5a,0x65,0xe2] |
| @ CHECK: rsb r5, r5, #61440 @ encoding: [0x0f,0x5a,0x65,0xe2] |
| @ CHECK: rsb r7, r7, #16711680 @ encoding: [0xff,0x78,0x67,0xe2] |
| @ CHECK: rsb r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x67,0xe2] |
| @ CHECK: rsb r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0x67,0xe2] |
| @ CHECK: rsb r7, r7, #40, #2 @ encoding: [0x28,0x71,0x67,0xe2] |
| @ CHECK: rsb r7, r7, #40, #2 @ encoding: [0x28,0x71,0x67,0xe2] |
| @ CHECK: rsb r7, r7, #40, #2 @ encoding: [0x28,0x71,0x67,0xe2] |
| @ CHECK: rsb r7, r7, #40, #2 @ encoding: [0x28,0x71,0x67,0xe2] |
| @ CHECK: rsb r4, r4, r5 @ encoding: [0x05,0x40,0x64,0xe0] |
| @ CHECK: rsb r4, r4, r5, lsl #5 @ encoding: [0x85,0x42,0x64,0xe0] |
| @ CHECK: rsb r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x64,0xe0] |
| @ CHECK: rsbne r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0x64,0x10] |
| @ CHECK: rsb r4, r4, r5, asr #5 @ encoding: [0xc5,0x42,0x64,0xe0] |
| @ CHECK: rsb r4, r4, r5, ror #5 @ encoding: [0xe5,0x42,0x64,0xe0] |
| @ CHECK: rsbgt r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x66,0xc0] |
| @ CHECK: rsb r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x66,0xe0] |
| @ CHECK: rsb r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x66,0xe0] |
| @ CHECK: rsb r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x66,0xe0] |
| @ CHECK: rsb r4, r4, r5, rrx @ encoding: [0x65,0x40,0x64,0xe0] |
| |
| @------------------------------------------------------------------------------ |
| @ RSBS |
| @------------------------------------------------------------------------------ |
| rsbs r7, #16711680 |
| rsbs r7, $16711680 |
| rsbs r7, 16711680 |
| rsbs r7, #(0xff << 16) |
| rsbs r7, r8, #-2147483638 |
| rsbs r7, r8, #42, #2 |
| rsbs r7, r8, #40, #2 |
| rsbs r7, r8, $40, $2 |
| rsbs r7, r8, 40, 2 |
| rsbs r7, r8, (2 * 20), (1 << 1) |
| |
| @ CHECK: rsbs r7, r7, #16711680 @ encoding: [0xff,0x78,0x77,0xe2] |
| @ CHECK: rsbs r7, r7, #16711680 @ encoding: [0xff,0x78,0x77,0xe2] |
| @ CHECK: rsbs r7, r7, #16711680 @ encoding: [0xff,0x78,0x77,0xe2] |
| @ CHECK: rsbs r7, r7, #16711680 @ encoding: [0xff,0x78,0x77,0xe2] |
| @ CHECK: rsbs r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x78,0xe2] |
| @ CHECK: rsbs r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0x78,0xe2] |
| @ CHECK: rsbs r7, r8, #40, #2 @ encoding: [0x28,0x71,0x78,0xe2] |
| @ CHECK: rsbs r7, r8, #40, #2 @ encoding: [0x28,0x71,0x78,0xe2] |
| @ CHECK: rsbs r7, r8, #40, #2 @ encoding: [0x28,0x71,0x78,0xe2] |
| @ CHECK: rsbs r7, r8, #40, #2 @ encoding: [0x28,0x71,0x78,0xe2] |
| |
| @------------------------------------------------------------------------------ |
| @ RSC |
| @------------------------------------------------------------------------------ |
| rsc r4, r5, #0xf000 |
| rsc r4, r5, $0xf000 |
| rsc r4, r5, 0xf000 |
| rsc r7, r8, #(0xff << 16) |
| rsc r7, r8, #-2147483638 |
| rsc r7, r8, #42, #2 |
| rsc r7, r8, #40, #2 |
| rsc r7, r8, $40, $2 |
| rsc r7, r8, 40, 2 |
| rsc r7, r8, (2 * 20), (1 << 1) |
| rsc r4, r5, r6 |
| rsc r4, r5, r6, lsl #5 |
| rsclo r4, r5, r6, lsr #5 |
| rsc r4, r5, r6, lsr #5 |
| rsc r4, r5, r6, asr #5 |
| rsc r4, r5, r6, ror #5 |
| rsc r6, r7, r8, lsl r9 |
| rsc r6, r7, r8, lsr r9 |
| rsc r6, r7, r8, asr r9 |
| rscle r6, r7, r8, ror r9 |
| rscs r1, r8, #4064 |
| |
| @ destination register is optional |
| rsc r5, #0xf000 |
| rsc r5, $0xf000 |
| rsc r5, 0xf000 |
| rsc r7, #(0xff << 16) |
| rsc r7, #-2147483638 |
| rsc r7, #42, #2 |
| rsc r7, #40, #2 |
| rsc r7, $40, $2 |
| rsc r7, 40, 2 |
| rsc r7, (2 * 20), (1 << 1) |
| rsc r4, r5 |
| rsc r4, r5, lsl #5 |
| rsc r4, r5, lsr #5 |
| rscne r4, r5, lsr #5 |
| rsc r4, r5, asr #5 |
| rsc r4, r5, ror #5 |
| rscgt r6, r7, lsl r9 |
| rsc r6, r7, lsr r9 |
| rsc r6, r7, asr r9 |
| rsc r6, r7, ror r9 |
| |
| @ CHECK: rsc r4, r5, #61440 @ encoding: [0x0f,0x4a,0xe5,0xe2] |
| @ CHECK: rsc r4, r5, #61440 @ encoding: [0x0f,0x4a,0xe5,0xe2] |
| @ CHECK: rsc r4, r5, #61440 @ encoding: [0x0f,0x4a,0xe5,0xe2] |
| @ CHECK: rsc r7, r8, #16711680 @ encoding: [0xff,0x78,0xe8,0xe2] |
| @ CHECK: rsc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xe8,0xe2] |
| @ CHECK: rsc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xe8,0xe2] |
| @ CHECK: rsc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xe8,0xe2] |
| @ CHECK: rsc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xe8,0xe2] |
| @ CHECK: rsc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xe8,0xe2] |
| @ CHECK: rsc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xe8,0xe2] |
| @ CHECK: rsc r4, r5, r6 @ encoding: [0x06,0x40,0xe5,0xe0] |
| @ CHECK: rsc r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0xe5,0xe0] |
| @ CHECK: rsclo r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0xe5,0x30] |
| @ CHECK: rsc r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0xe5,0xe0] |
| @ CHECK: rsc r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0xe5,0xe0] |
| @ CHECK: rsc r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0xe5,0xe0] |
| @ CHECK: rsc r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0xe7,0xe0] |
| @ CHECK: rsc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xe7,0xe0] |
| @ CHECK: rsc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xe7,0xe0] |
| @ CHECK: rscle r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xe7,0xd0] |
| @ CHECK: rscs r1, r8, #4064 @ encoding: [0xfe,0x1e,0xf8,0xe2] |
| |
| @ CHECK: rsc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xe5,0xe2] |
| @ CHECK: rsc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xe5,0xe2] |
| @ CHECK: rsc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xe5,0xe2] |
| @ CHECK: rsc r7, r7, #16711680 @ encoding: [0xff,0x78,0xe7,0xe2] |
| @ CHECK: rsc r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0xe7,0xe2] |
| @ CHECK: rsc r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0xe7,0xe2] |
| @ CHECK: rsc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xe7,0xe2] |
| @ CHECK: rsc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xe7,0xe2] |
| @ CHECK: rsc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xe7,0xe2] |
| @ CHECK: rsc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xe7,0xe2] |
| @ CHECK: rsc r4, r4, r5 @ encoding: [0x05,0x40,0xe4,0xe0] |
| @ CHECK: rsc r4, r4, r5, lsl #5 @ encoding: [0x85,0x42,0xe4,0xe0] |
| @ CHECK: rsc r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0xe4,0xe0] |
| @ CHECK: rscne r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0xe4,0x10] |
| @ CHECK: rsc r4, r4, r5, asr #5 @ encoding: [0xc5,0x42,0xe4,0xe0] |
| @ CHECK: rsc r4, r4, r5, ror #5 @ encoding: [0xe5,0x42,0xe4,0xe0] |
| @ CHECK: rscgt r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0xe6,0xc0] |
| @ CHECK: rsc r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0xe6,0xe0] |
| @ CHECK: rsc r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0xe6,0xe0] |
| @ CHECK: rsc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xe6,0xe0] |
| |
| @------------------------------------------------------------------------------ |
| @ RRX/RRXS |
| @------------------------------------------------------------------------------ |
| |
| rrx r0, r1 |
| rrx sp, pc |
| rrx pc, lr |
| rrx lr, sp |
| |
| @ CHECK: rrx r0, r1 @ encoding: [0x61,0x00,0xa0,0xe1] |
| @ CHECK: rrx sp, pc @ encoding: [0x6f,0xd0,0xa0,0xe1] |
| @ CHECK: rrx pc, lr @ encoding: [0x6e,0xf0,0xa0,0xe1] |
| @ CHECK: rrx lr, sp @ encoding: [0x6d,0xe0,0xa0,0xe1] |
| |
| rrxs r0, r1 |
| rrxs sp, pc |
| rrxs pc, lr |
| rrxs lr, sp |
| |
| @CHECK: rrxs r0, r1 @ encoding: [0x61,0x00,0xb0,0xe1] |
| @CHECK: rrxs sp, pc @ encoding: [0x6f,0xd0,0xb0,0xe1] |
| @CHECK: rrxs pc, lr @ encoding: [0x6e,0xf0,0xb0,0xe1] |
| @CHECK: rrxs lr, sp @ encoding: [0x6d,0xe0,0xb0,0xe1] |
| |
| @ ------------------------------------------------------------------------------ |
| @ SADD16/SADD8 |
| @------------------------------------------------------------------------------ |
| sadd16 r1, r2, r3 |
| sadd16gt r1, r2, r3 |
| sadd8 r1, r2, r3 |
| sadd8le r1, r2, r3 |
| |
| @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xe6] |
| @ CHECK: sadd16gt r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xc6] |
| @ CHECK: sadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xe6] |
| @ CHECK: sadd8le r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xd6] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SASX |
| @------------------------------------------------------------------------------ |
| sasx r9, r12, r0 |
| sasxeq r9, r12, r0 |
| |
| @ CHECK: sasx r9, r12, r0 @ encoding: [0x30,0x9f,0x1c,0xe6] |
| @ CHECK: sasxeq r9, r12, r0 @ encoding: [0x30,0x9f,0x1c,0x06] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SBC |
| @------------------------------------------------------------------------------ |
| sbc r4, r5, #0xf000 |
| sbc r4, r5, $0xf000 |
| sbc r4, r5, 0xf000 |
| sbc r7, r8, #(0xff << 16) |
| sbc r7, r8, #-2147483638 |
| sbc r7, r8, #42, #2 |
| sbc r7, r8, #40, #2 |
| sbc r7, r8, $40, $2 |
| sbc r7, r8, 40, 2 |
| sbc r7, r8, (20 * 2), (1 << 1) |
| sbc r4, r5, r6 |
| sbc r4, r5, r6, lsl #5 |
| sbc r4, r5, r6, lsr #5 |
| sbc r4, r5, r6, lsr #5 |
| sbc r4, r5, r6, asr #5 |
| sbc r4, r5, r6, ror #5 |
| sbc r6, r7, r8, lsl r9 |
| sbc r6, r7, r8, lsr r9 |
| sbc r6, r7, r8, asr r9 |
| sbc r6, r7, r8, ror r9 |
| |
| @ destination register is optional |
| sbc r5, #0xf000 |
| sbc r5, $0xf000 |
| sbc r5, 0xf000 |
| sbc r7, #(0xff << 16) |
| sbc r7, #-2147483638 |
| sbc r7, #42, #2 |
| sbc r7, #40, #2 |
| sbc r7, $40, $2 |
| sbc r7, 40, 2 |
| sbc r7, (20 * 2), (1 << 1) |
| sbc r4, r5 |
| sbc r4, r5, lsl #5 |
| sbc r4, r5, lsr #5 |
| sbc r4, r5, lsr #5 |
| sbc r4, r5, asr #5 |
| sbc r4, r5, ror #5 |
| sbc r6, r7, lsl r9 |
| sbc r6, r7, lsr r9 |
| sbc r6, r7, asr r9 |
| sbc r6, r7, ror r9 |
| |
| @ CHECK: sbc r4, r5, #61440 @ encoding: [0x0f,0x4a,0xc5,0xe2] |
| @ CHECK: sbc r4, r5, #61440 @ encoding: [0x0f,0x4a,0xc5,0xe2] |
| @ CHECK: sbc r4, r5, #61440 @ encoding: [0x0f,0x4a,0xc5,0xe2] |
| @ CHECK: sbc r7, r8, #16711680 @ encoding: [0xff,0x78,0xc8,0xe2] |
| @ CHECK: sbc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xc8,0xe2] |
| @ CHECK: sbc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xc8,0xe2] |
| @ CHECK: sbc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe2] |
| @ CHECK: sbc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe2] |
| @ CHECK: sbc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe2] |
| @ CHECK: sbc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xc8,0xe2] |
| @ CHECK: sbc r4, r5, r6 @ encoding: [0x06,0x40,0xc5,0xe0] |
| @ CHECK: sbc r4, r5, r6, lsl #5 @ encoding: [0x86,0x42,0xc5,0xe0] |
| @ CHECK: sbc r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0xc5,0xe0] |
| @ CHECK: sbc r4, r5, r6, lsr #5 @ encoding: [0xa6,0x42,0xc5,0xe0] |
| @ CHECK: sbc r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0xc5,0xe0] |
| @ CHECK: sbc r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0xc5,0xe0] |
| @ CHECK: sbc r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0xc7,0xe0] |
| @ CHECK: sbc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xc7,0xe0] |
| @ CHECK: sbc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xc7,0xe0] |
| @ CHECK: sbc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xc7,0xe0] |
| |
| @ CHECK: sbc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xc5,0xe2] |
| @ CHECK: sbc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xc5,0xe2] |
| @ CHECK: sbc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xc5,0xe2] |
| @ CHECK: sbc r7, r7, #16711680 @ encoding: [0xff,0x78,0xc7,0xe2] |
| @ CHECK: sbc r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0xc7,0xe2] |
| @ CHECK: sbc r7, r7, #-2147483638 @ encoding: [0x2a,0x71,0xc7,0xe2] |
| @ CHECK: sbc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe2] |
| @ CHECK: sbc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe2] |
| @ CHECK: sbc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe2] |
| @ CHECK: sbc r7, r7, #40, #2 @ encoding: [0x28,0x71,0xc7,0xe2] |
| @ CHECK: sbc r4, r4, r5 @ encoding: [0x05,0x40,0xc4,0xe0] |
| @ CHECK: sbc r4, r4, r5, lsl #5 @ encoding: [0x85,0x42,0xc4,0xe0] |
| @ CHECK: sbc r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0xc4,0xe0] |
| @ CHECK: sbc r4, r4, r5, lsr #5 @ encoding: [0xa5,0x42,0xc4,0xe0] |
| @ CHECK: sbc r4, r4, r5, asr #5 @ encoding: [0xc5,0x42,0xc4,0xe0] |
| @ CHECK: sbc r4, r4, r5, ror #5 @ encoding: [0xe5,0x42,0xc4,0xe0] |
| @ CHECK: sbc r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0xc6,0xe0] |
| @ CHECK: sbc r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0xc6,0xe0] |
| @ CHECK: sbc r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0xc6,0xe0] |
| @ CHECK: sbc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xc6,0xe0] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SBFX |
| @------------------------------------------------------------------------------ |
| sbfx r4, r5, #16, #1 |
| sbfxgt r4, r5, #16, #16 |
| |
| @ CHECK: sbfx r4, r5, #16, #1 @ encoding: [0x55,0x48,0xa0,0xe7] |
| @ CHECK: sbfxgt r4, r5, #16, #16 @ encoding: [0x55,0x48,0xaf,0xc7] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SEL |
| @------------------------------------------------------------------------------ |
| sel r9, r2, r1 |
| selne r9, r2, r1 |
| |
| @ CHECK: sel r9, r2, r1 @ encoding: [0xb1,0x9f,0x82,0xe6] |
| @ CHECK: selne r9, r2, r1 @ encoding: [0xb1,0x9f,0x82,0x16] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SETEND |
| @------------------------------------------------------------------------------ |
| setend be |
| setend BE |
| setend le |
| setend LE |
| |
| @ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1] |
| @ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1] |
| @ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1] |
| @ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SEV |
| @------------------------------------------------------------------------------ |
| sev |
| seveq |
| |
| @ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3] |
| @ CHECK: seveq @ encoding: [0x04,0xf0,0x20,0x03] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SHADD16/SHADD8 |
| @------------------------------------------------------------------------------ |
| shadd16 r4, r8, r2 |
| shadd16gt r4, r8, r2 |
| shadd8 r4, r8, r2 |
| shadd8gt r4, r8, r2 |
| |
| @ CHECK: shadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x38,0xe6] |
| @ CHECK: shadd16gt r4, r8, r2 @ encoding: [0x12,0x4f,0x38,0xc6] |
| @ CHECK: shadd8 r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xe6] |
| @ CHECK: shadd8gt r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xc6] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SHASX |
| @------------------------------------------------------------------------------ |
| shasx r4, r8, r2 |
| shasxgt r4, r8, r2 |
| |
| @ CHECK: shasx r4, r8, r2 @ encoding: [0x32,0x4f,0x38,0xe6] |
| @ CHECK: shasxgt r4, r8, r2 @ encoding: [0x32,0x4f,0x38,0xc6] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SHSUB16/SHSUB8 |
| @------------------------------------------------------------------------------ |
| shsub16 r4, r8, r2 |
| shsub16gt r4, r8, r2 |
| shsub8 r4, r8, r2 |
| shsub8gt r4, r8, r2 |
| |
| @ CHECK: shsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x38,0xe6] |
| @ CHECK: shsub16gt r4, r8, r2 @ encoding: [0x72,0x4f,0x38,0xc6] |
| @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xe6] |
| @ CHECK: shsub8gt r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xc6] |
| |
| @------------------------------------------------------------------------------ |
| @ SMLABB/SMLABT/SMLATB/SMLATT |
| @------------------------------------------------------------------------------ |
| smlabb r3, r1, r9, r0 |
| smlabt r5, r6, r4, r1 |
| smlatb r4, r2, r3, r2 |
| smlatt r8, r3, r8, r4 |
| smlabbge r3, r1, r9, r0 |
| smlabtle r5, r6, r4, r1 |
| smlatbne r4, r2, r3, r2 |
| smlatteq r8, r3, r8, r4 |
| |
| @ CHECK: smlabb r3, r1, r9, r0 @ encoding: [0x81,0x09,0x03,0xe1] |
| @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1] |
| @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0xe1] |
| @ CHECK: smlatt r8, r3, r8, r4 @ encoding: [0xe3,0x48,0x08,0xe1] |
| @ CHECK: smlabbge r3, r1, r9, r0 @ encoding: [0x81,0x09,0x03,0xa1] |
| @ CHECK: smlabtle r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xd1] |
| @ CHECK: smlatbne r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0x11] |
| @ CHECK: smlatteq r8, r3, r8, r4 @ encoding: [0xe3,0x48,0x08,0x01] |
| |
| @------------------------------------------------------------------------------ |
| @ SMLAD/SMLADX |
| @------------------------------------------------------------------------------ |
| smlad r2, r3, r5, r8 |
| smladx r2, r3, r5, r8 |
| smladeq r2, r3, r5, r8 |
| smladxhi r2, r3, r5, r8 |
| |
| @ CHECK: smlad r2, r3, r5, r8 @ encoding: [0x13,0x85,0x02,0xe7] |
| @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0xe7] |
| @ CHECK: smladeq r2, r3, r5, r8 @ encoding: [0x13,0x85,0x02,0x07] |
| @ CHECK: smladxhi r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0x87] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SMLAL |
| @------------------------------------------------------------------------------ |
| smlal r2, r3, r5, r8 |
| smlals r2, r3, r5, r8 |
| smlaleq r2, r3, r5, r8 |
| smlalshi r2, r3, r5, r8 |
| |
| @ CHECK: smlal r2, r3, r5, r8 @ encoding: [0x95,0x28,0xe3,0xe0] |
| @ CHECK: smlals r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0xe0] |
| @ CHECK: smlaleq r2, r3, r5, r8 @ encoding: [0x95,0x28,0xe3,0x00] |
| @ CHECK: smlalshi r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0x80] |
| |
| |
| @------------------------------------------------------------------------------ |
| @ SMLALBB/SMLALBT/SMLALTB/SMLALTT |
| @------------------------------------------------------------------------------ |
| smlalbb r3, r1, r9, r0 |
| smlalbt r5, r6, r4, r1 |
| smlaltb r4, r2, r3, r2 |
| smlaltt r8, r3, r8, r4 |
| smlalbbge r3, r1, r9, r0 |
| smlalbtle r5, r6, r4, r1 |
| smlaltbne r4, r2, r3, r2 |
| smlaltteq r8, r3, r8, r4 |
| |
| @ CHECK: smlalbb r3, |