| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=riscv32 -x mir -run-pass=machine-outliner -simplify-mir -verify-machineinstrs < %s \ |
| # RUN: | FileCheck %s |
| # RUN: llc -march=riscv64 -x mir -run-pass=machine-outliner -simplify-mir -verify-machineinstrs < %s \ |
| # RUN: | FileCheck %s |
| # RUN: llc -march=riscv32 -x mir -run-pass=machine-outliner -simplify-mir --function-sections -verify-machineinstrs < %s \ |
| # RUN: | FileCheck -check-prefix=CHECK-FS %s |
| # RUN: llc -march=riscv64 -x mir -run-pass=machine-outliner -simplify-mir --function-sections -verify-machineinstrs < %s \ |
| # RUN: | FileCheck -check-prefix=CHECK-FS %s |
| |
| --- | |
| ; Cannot outline instructions with pcrel-lo operands if function section |
| ; enabled. |
| @bar = dso_local local_unnamed_addr global i32 0, align 4 |
| define i32 @foo(i32 %a, i32 %b) { ret i32 0 } |
| |
| $foo2 = comdat any |
| define i32 @foo2(i32 %a, i32 %b) comdat { ret i32 0 } |
| |
| define i32 @foo3(i32 %a, i32 %b) section ".abc" { ret i32 0 } |
| ... |
| --- |
| name: foo |
| tracksRegLiveness: true |
| body: | |
| ; CHECK-LABEL: name: foo |
| ; CHECK: bb.0: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11, implicit $x13 |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.1: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11, implicit $x13 |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.2: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11, implicit $x13 |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.3: |
| ; CHECK-NEXT: PseudoRET |
| ; CHECK-FS-LABEL: name: foo |
| ; CHECK-FS: bb.0: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.1: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.2: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.3: |
| ; CHECK-FS-NEXT: PseudoRET |
| bb.0: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.1: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.2: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.3: |
| PseudoRET |
| ... |
| --- |
| name: foo2 |
| tracksRegLiveness: true |
| body: | |
| ; CHECK-LABEL: name: foo2 |
| ; CHECK: bb.0: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.1: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.2: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.3: |
| ; CHECK-NEXT: PseudoRET |
| ; CHECK-FS-LABEL: name: foo2 |
| ; CHECK-FS: bb.0: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.1: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.2: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x5 = PseudoCALLReg target-flags(riscv-call) @OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, implicit-def $x12, implicit $x10, implicit $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.3: |
| ; CHECK-FS-NEXT: PseudoRET |
| bb.0: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.1: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.2: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.3: |
| PseudoRET |
| ... |
| --- |
| name: foo3 |
| tracksRegLiveness: true |
| body: | |
| ; CHECK-LABEL: name: foo3 |
| ; CHECK: bb.0: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x11 = ORI $x11, 1023 |
| ; CHECK-NEXT: $x12 = ADDI $x10, 17 |
| ; CHECK-NEXT: $x11 = AND $x12, $x11 |
| ; CHECK-NEXT: $x10 = SUB $x10, $x11 |
| ; CHECK-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.1: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x11 = ORI $x11, 1023 |
| ; CHECK-NEXT: $x12 = ADDI $x10, 17 |
| ; CHECK-NEXT: $x11 = AND $x12, $x11 |
| ; CHECK-NEXT: $x10 = SUB $x10, $x11 |
| ; CHECK-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.2: |
| ; CHECK-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x11 = ORI $x11, 1023 |
| ; CHECK-NEXT: $x12 = ADDI $x10, 17 |
| ; CHECK-NEXT: $x11 = AND $x12, $x11 |
| ; CHECK-NEXT: $x10 = SUB $x10, $x11 |
| ; CHECK-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-NEXT: PseudoBR %bb.3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.3: |
| ; CHECK-NEXT: PseudoRET |
| ; CHECK-FS-LABEL: name: foo3 |
| ; CHECK-FS: bb.0: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x11 = ORI $x11, 1023 |
| ; CHECK-FS-NEXT: $x12 = ADDI $x10, 17 |
| ; CHECK-FS-NEXT: $x11 = AND $x12, $x11 |
| ; CHECK-FS-NEXT: $x10 = SUB $x10, $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.1: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x11 = ORI $x11, 1023 |
| ; CHECK-FS-NEXT: $x12 = ADDI $x10, 17 |
| ; CHECK-FS-NEXT: $x11 = AND $x12, $x11 |
| ; CHECK-FS-NEXT: $x10 = SUB $x10, $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.2: |
| ; CHECK-FS-NEXT: liveins: $x10, $x11, $x13 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: $x11 = ORI $x11, 1023 |
| ; CHECK-FS-NEXT: $x12 = ADDI $x10, 17 |
| ; CHECK-FS-NEXT: $x11 = AND $x12, $x11 |
| ; CHECK-FS-NEXT: $x10 = SUB $x10, $x11 |
| ; CHECK-FS-NEXT: $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| ; CHECK-FS-NEXT: PseudoBR %bb.3 |
| ; CHECK-FS-NEXT: {{ $}} |
| ; CHECK-FS-NEXT: bb.3: |
| ; CHECK-FS-NEXT: PseudoRET |
| bb.0: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.1: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.2: |
| liveins: $x10, $x11, $x13 |
| |
| $x11 = ORI $x11, 1023 |
| $x12 = ADDI $x10, 17 |
| $x11 = AND $x12, $x11 |
| $x10 = SUB $x10, $x11 |
| $x11 = LW killed renamable $x13, target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1> :: (dereferenceable load (s32) from @bar) |
| PseudoBR %bb.3 |
| |
| bb.3: |
| PseudoRET |
| ... |
