test/CodeGen/RISCV/atomic-rmw.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefix=RV32I %s
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV32IA,RV32IA-WMO %s
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV32IA,RV32IA-TSO %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefix=RV64I %s
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s

define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xchg_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_xchg_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w a4, (a2)
; RV32IA-NEXT:    mv a5, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB0_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_xchg_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w a4, (a2)
; RV64IA-NEXT:    mv a5, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB0_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xchg_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    mv a5, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB1_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    mv a5, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB1_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    mv a5, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB1_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    mv a5, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB1_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_xchg_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xchg_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w a4, (a2)
; RV32IA-WMO-NEXT:    mv a5, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB2_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    mv a5, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB2_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w a4, (a2)
; RV64IA-WMO-NEXT:    mv a5, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB2_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    mv a5, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB2_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_xchg_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xchg_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    mv a5, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB3_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    mv a5, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB3_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    mv a5, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB3_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    mv a5, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB3_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_xchg_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xchg_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_xchg_i8_seq_cst:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a2)
; RV32IA-NEXT:    mv a5, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB4_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_xchg_i8_seq_cst:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
; RV64IA-NEXT:    mv a5, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB4_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 %b seq_cst
  ret i8 %1
}

; Ensure the following 'atomicrmw xchg a, {0,-1}` cases are lowered to an
; amoand or amoor with appropriate mask.

define i8 @atomicrmw_xchg_0_i8_monotonic(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_0_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_xchg_0_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a1, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a2, 255
; RV32IA-NEXT:    sll a2, a2, a0
; RV32IA-NEXT:    not a2, a2
; RV32IA-NEXT:    amoand.w a1, a2, (a1)
; RV32IA-NEXT:    srl a0, a1, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_0_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_xchg_0_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a1, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a2, 255
; RV64IA-NEXT:    sllw a2, a2, a0
; RV64IA-NEXT:    not a2, a2
; RV64IA-NEXT:    amoand.w a1, a2, (a1)
; RV64IA-NEXT:    srlw a0, a1, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 0 monotonic
  ret i8 %1
}

define i8 @atomicrmw_xchg_0_i8_acquire(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_0_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    not a2, a2
; RV32IA-WMO-NEXT:    amoand.w.aq a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    not a2, a2
; RV32IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_0_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    not a2, a2
; RV64IA-WMO-NEXT:    amoand.w.aq a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    not a2, a2
; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 0 acquire
  ret i8 %1
}

define i8 @atomicrmw_xchg_0_i8_release(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_0_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    not a2, a2
; RV32IA-WMO-NEXT:    amoand.w.rl a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    not a2, a2
; RV32IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_0_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    not a2, a2
; RV64IA-WMO-NEXT:    amoand.w.rl a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    not a2, a2
; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 0 release
  ret i8 %1
}

define i8 @atomicrmw_xchg_0_i8_acq_rel(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_0_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    not a2, a2
; RV32IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    not a2, a2
; RV32IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_0_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    not a2, a2
; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    not a2, a2
; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 0 acq_rel
  ret i8 %1
}

define i8 @atomicrmw_xchg_0_i8_seq_cst(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_0_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_0_i8_seq_cst:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    not a2, a2
; RV32IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_0_i8_seq_cst:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    not a2, a2
; RV32IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_0_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_0_i8_seq_cst:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    not a2, a2
; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_0_i8_seq_cst:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    not a2, a2
; RV64IA-TSO-NEXT:    amoand.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 0 seq_cst
  ret i8 %1
}

define i8 @atomicrmw_xchg_minus_1_i8_monotonic(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 255
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a1, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a2, 255
; RV32IA-NEXT:    sll a2, a2, a0
; RV32IA-NEXT:    amoor.w a1, a2, (a1)
; RV32IA-NEXT:    srl a0, a1, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 255
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_xchg_minus_1_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a1, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a2, 255
; RV64IA-NEXT:    sllw a2, a2, a0
; RV64IA-NEXT:    amoor.w a1, a2, (a1)
; RV64IA-NEXT:    srlw a0, a1, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 -1 monotonic
  ret i8 %1
}

define i8 @atomicrmw_xchg_minus_1_i8_acquire(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 255
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    amoor.w.aq a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 255
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    amoor.w.aq a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 -1 acquire
  ret i8 %1
}

define i8 @atomicrmw_xchg_minus_1_i8_release(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_minus_1_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 255
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    amoor.w.rl a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 255
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    amoor.w.rl a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 -1 release
  ret i8 %1
}

define i8 @atomicrmw_xchg_minus_1_i8_acq_rel(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 255
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 255
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 -1 acq_rel
  ret i8 %1
}

define i8 @atomicrmw_xchg_minus_1_i8_seq_cst(ptr %a) nounwind {
; RV32I-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 255
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_exchange_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a1, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a2, 255
; RV32IA-WMO-NEXT:    sll a2, a2, a0
; RV32IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a1, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a2, 255
; RV32IA-TSO-NEXT:    sll a2, a2, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 255
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_exchange_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a1, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a2, 255
; RV64IA-WMO-NEXT:    sllw a2, a2, a0
; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a2, (a1)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xchg_minus_1_i8_seq_cst:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a1, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a2, 255
; RV64IA-TSO-NEXT:    sllw a2, a2, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a2, (a1)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xchg ptr %a, i8 -1 seq_cst
  ret i8 %1
}

define i8 @atomicrmw_add_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_add_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_add_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_add_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w a4, (a2)
; RV32IA-NEXT:    add a5, a4, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB15_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_fetch_add_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_add_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w a4, (a2)
; RV64IA-NEXT:    add a5, a4, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB15_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw add ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_add_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_add_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_fetch_add_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_add_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    add a5, a4, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB16_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_add_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    add a5, a4, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB16_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_fetch_add_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_add_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    add a5, a4, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB16_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_add_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    add a5, a4, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB16_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw add ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_add_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_add_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_fetch_add_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_add_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w a4, (a2)
; RV32IA-WMO-NEXT:    add a5, a4, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB17_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_add_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    add a5, a4, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB17_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_fetch_add_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_add_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w a4, (a2)
; RV64IA-WMO-NEXT:    add a5, a4, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB17_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_add_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    add a5, a4, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB17_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw add ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_add_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_add_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_fetch_add_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_add_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    add a5, a4, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB18_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_add_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    add a5, a4, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB18_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_fetch_add_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_add_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    add a5, a4, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB18_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_add_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    add a5, a4, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB18_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw add ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_add_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_add_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_add_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_add_i8_seq_cst:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a2)
; RV32IA-NEXT:    add a5, a4, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB19_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_add_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_add_i8_seq_cst:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
; RV64IA-NEXT:    add a5, a4, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB19_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw add ptr %a, i8 %b seq_cst
  ret i8 %1
}

define i8 @atomicrmw_sub_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_sub_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_sub_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w a4, (a2)
; RV32IA-NEXT:    sub a5, a4, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB20_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_fetch_sub_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w a4, (a2)
; RV64IA-NEXT:    sub a5, a4, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB20_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_sub_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_sub_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_fetch_sub_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_sub_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    sub a5, a4, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB21_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_sub_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    sub a5, a4, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB21_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_fetch_sub_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_sub_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    sub a5, a4, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB21_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_sub_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    sub a5, a4, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB21_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_sub_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_sub_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_fetch_sub_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_sub_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w a4, (a2)
; RV32IA-WMO-NEXT:    sub a5, a4, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB22_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_sub_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    sub a5, a4, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB22_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_fetch_sub_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_sub_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w a4, (a2)
; RV64IA-WMO-NEXT:    sub a5, a4, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB22_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_sub_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    sub a5, a4, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB22_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_sub_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_sub_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_fetch_sub_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_sub_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    sub a5, a4, a1
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB23_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_sub_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    sub a5, a4, a1
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB23_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_fetch_sub_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_sub_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    sub a5, a4, a1
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB23_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_sub_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    sub a5, a4, a1
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB23_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_sub_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_sub_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i8_seq_cst:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a2)
; RV32IA-NEXT:    sub a5, a4, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB24_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i8_seq_cst:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
; RV64IA-NEXT:    sub a5, a4, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB24_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i8 %b seq_cst
  ret i8 %1
}

define i8 @atomicrmw_and_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_and_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_and_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_and_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    not a3, a3
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:    or a1, a3, a1
; RV32IA-NEXT:    amoand.w a1, a1, (a2)
; RV32IA-NEXT:    srl a0, a1, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_and_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_fetch_and_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_and_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    not a3, a3
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:    or a1, a3, a1
; RV64IA-NEXT:    amoand.w a1, a1, (a2)
; RV64IA-NEXT:    srlw a0, a1, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw and ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_and_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_and_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_fetch_and_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_and_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    not a3, a3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    or a1, a3, a1
; RV32IA-WMO-NEXT:    amoand.w.aq a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_and_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    not a3, a3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    or a1, a3, a1
; RV32IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_and_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_fetch_and_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_and_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    not a3, a3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    or a1, a3, a1
; RV64IA-WMO-NEXT:    amoand.w.aq a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_and_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    not a3, a3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    or a1, a3, a1
; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw and ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_and_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_and_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_fetch_and_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_and_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    not a3, a3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    or a1, a3, a1
; RV32IA-WMO-NEXT:    amoand.w.rl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_and_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    not a3, a3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    or a1, a3, a1
; RV32IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_and_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_fetch_and_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_and_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    not a3, a3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    or a1, a3, a1
; RV64IA-WMO-NEXT:    amoand.w.rl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_and_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    not a3, a3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    or a1, a3, a1
; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw and ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_and_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_and_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_fetch_and_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_and_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    not a3, a3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    or a1, a3, a1
; RV32IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_and_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    not a3, a3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    or a1, a3, a1
; RV32IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_and_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_fetch_and_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_and_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    not a3, a3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    or a1, a3, a1
; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_and_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    not a3, a3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    or a1, a3, a1
; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw and ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_and_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_and_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_and_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_and_i8_seq_cst:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    not a3, a3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    or a1, a3, a1
; RV32IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_and_i8_seq_cst:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    not a3, a3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    or a1, a3, a1
; RV32IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_and_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_and_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_and_i8_seq_cst:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    not a3, a3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    or a1, a3, a1
; RV64IA-WMO-NEXT:    amoand.w.aqrl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_and_i8_seq_cst:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    not a3, a3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    or a1, a3, a1
; RV64IA-TSO-NEXT:    amoand.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw and ptr %a, i8 %b seq_cst
  ret i8 %1
}

define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_nand_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_nand_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_nand_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w a4, (a2)
; RV32IA-NEXT:    and a5, a4, a1
; RV32IA-NEXT:    not a5, a5
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB30_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_nand_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_fetch_nand_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_nand_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w a4, (a2)
; RV64IA-NEXT:    and a5, a4, a1
; RV64IA-NEXT:    not a5, a5
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB30_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw nand ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_nand_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_nand_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_fetch_nand_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_nand_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    and a5, a4, a1
; RV32IA-WMO-NEXT:    not a5, a5
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB31_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_nand_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    and a5, a4, a1
; RV32IA-TSO-NEXT:    not a5, a5
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB31_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_nand_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_fetch_nand_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_nand_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    and a5, a4, a1
; RV64IA-WMO-NEXT:    not a5, a5
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB31_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_nand_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    and a5, a4, a1
; RV64IA-TSO-NEXT:    not a5, a5
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB31_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw nand ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_nand_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_nand_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_fetch_nand_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_nand_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w a4, (a2)
; RV32IA-WMO-NEXT:    and a5, a4, a1
; RV32IA-WMO-NEXT:    not a5, a5
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB32_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_nand_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    and a5, a4, a1
; RV32IA-TSO-NEXT:    not a5, a5
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB32_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_nand_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_fetch_nand_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_nand_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w a4, (a2)
; RV64IA-WMO-NEXT:    and a5, a4, a1
; RV64IA-WMO-NEXT:    not a5, a5
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB32_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_nand_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    and a5, a4, a1
; RV64IA-TSO-NEXT:    not a5, a5
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB32_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw nand ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_nand_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_nand_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_fetch_nand_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_nand_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    li a3, 255
; RV32IA-WMO-NEXT:    sll a3, a3, a0
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV32IA-WMO-NEXT:    and a5, a4, a1
; RV32IA-WMO-NEXT:    not a5, a5
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    and a5, a5, a3
; RV32IA-WMO-NEXT:    xor a5, a4, a5
; RV32IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-WMO-NEXT:    bnez a5, .LBB33_1
; RV32IA-WMO-NEXT:  # %bb.2:
; RV32IA-WMO-NEXT:    srl a0, a4, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_nand_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    li a3, 255
; RV32IA-TSO-NEXT:    sll a3, a3, a0
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a4, (a2)
; RV32IA-TSO-NEXT:    and a5, a4, a1
; RV32IA-TSO-NEXT:    not a5, a5
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    and a5, a5, a3
; RV32IA-TSO-NEXT:    xor a5, a4, a5
; RV32IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV32IA-TSO-NEXT:    bnez a5, .LBB33_1
; RV32IA-TSO-NEXT:  # %bb.2:
; RV32IA-TSO-NEXT:    srl a0, a4, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_nand_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_fetch_nand_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_nand_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    li a3, 255
; RV64IA-WMO-NEXT:    sllw a3, a3, a0
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a4, (a2)
; RV64IA-WMO-NEXT:    and a5, a4, a1
; RV64IA-WMO-NEXT:    not a5, a5
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    and a5, a5, a3
; RV64IA-WMO-NEXT:    xor a5, a4, a5
; RV64IA-WMO-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-WMO-NEXT:    bnez a5, .LBB33_1
; RV64IA-WMO-NEXT:  # %bb.2:
; RV64IA-WMO-NEXT:    srlw a0, a4, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_nand_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    li a3, 255
; RV64IA-TSO-NEXT:    sllw a3, a3, a0
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a4, (a2)
; RV64IA-TSO-NEXT:    and a5, a4, a1
; RV64IA-TSO-NEXT:    not a5, a5
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    and a5, a5, a3
; RV64IA-TSO-NEXT:    xor a5, a4, a5
; RV64IA-TSO-NEXT:    sc.w a5, a5, (a2)
; RV64IA-TSO-NEXT:    bnez a5, .LBB33_1
; RV64IA-TSO-NEXT:  # %bb.2:
; RV64IA-TSO-NEXT:    srlw a0, a4, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw nand ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_nand_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_nand_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_nand_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_nand_i8_seq_cst:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    li a3, 255
; RV32IA-NEXT:    sll a3, a3, a0
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a2)
; RV32IA-NEXT:    and a5, a4, a1
; RV32IA-NEXT:    not a5, a5
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a3
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV32IA-NEXT:    bnez a5, .LBB34_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_nand_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_nand_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_nand_i8_seq_cst:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    li a3, 255
; RV64IA-NEXT:    sllw a3, a3, a0
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a2)
; RV64IA-NEXT:    and a5, a4, a1
; RV64IA-NEXT:    not a5, a5
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a3
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a2)
; RV64IA-NEXT:    bnez a5, .LBB34_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw nand ptr %a, i8 %b seq_cst
  ret i8 %1
}

define i8 @atomicrmw_or_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_or_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_or_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_or_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:    amoor.w a1, a1, (a2)
; RV32IA-NEXT:    srl a0, a1, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_or_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_fetch_or_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_or_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:    amoor.w a1, a1, (a2)
; RV64IA-NEXT:    srlw a0, a1, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw or ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_or_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_or_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_fetch_or_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_or_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoor.w.aq a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_or_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_or_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_fetch_or_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_or_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoor.w.aq a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_or_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw or ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_or_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_or_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_fetch_or_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_or_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoor.w.rl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_or_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_or_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_fetch_or_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_or_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoor.w.rl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_or_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw or ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_or_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_or_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_fetch_or_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_or_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_or_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_or_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_fetch_or_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_or_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_or_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw or ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_or_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_or_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_or_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_or_i8_seq_cst:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_or_i8_seq_cst:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_or_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_or_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_or_i8_seq_cst:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoor.w.aqrl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_or_i8_seq_cst:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw or ptr %a, i8 %b seq_cst
  ret i8 %1
}

define i8 @atomicrmw_xor_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xor_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_xor_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_xor_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    andi a1, a1, 255
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:    amoxor.w a1, a1, (a2)
; RV32IA-NEXT:    srl a0, a1, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xor_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 0
; RV64I-NEXT:    call __atomic_fetch_xor_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_xor_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    andi a1, a1, 255
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:    amoxor.w a1, a1, (a2)
; RV64IA-NEXT:    srlw a0, a1, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw xor ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_xor_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xor_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 2
; RV32I-NEXT:    call __atomic_fetch_xor_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xor_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoxor.w.aq a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xor_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xor_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 2
; RV64I-NEXT:    call __atomic_fetch_xor_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xor_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoxor.w.aq a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xor_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xor ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_xor_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xor_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 3
; RV32I-NEXT:    call __atomic_fetch_xor_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xor_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoxor.w.rl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xor_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xor_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 3
; RV64I-NEXT:    call __atomic_fetch_xor_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xor_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoxor.w.rl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xor_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xor ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_xor_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xor_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 4
; RV32I-NEXT:    call __atomic_fetch_xor_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xor_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xor_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xor_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 4
; RV64I-NEXT:    call __atomic_fetch_xor_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xor_i8_acq_rel:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xor_i8_acq_rel:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xor ptr %a, i8 %b acq_rel
  ret i8 %1
}

define i8 @atomicrmw_xor_i8_seq_cst(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_xor_i8_seq_cst:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_xor_1@plt
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_xor_i8_seq_cst:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a1, a1, 255
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
; RV32IA-WMO-NEXT:    srl a0, a1, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_xor_i8_seq_cst:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a1, a1, 255
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV32IA-TSO-NEXT:    srl a0, a1, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_xor_i8_seq_cst:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_xor_1@plt
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_xor_i8_seq_cst:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a1, a1, 255
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    amoxor.w.aqrl a1, a1, (a2)
; RV64IA-WMO-NEXT:    srlw a0, a1, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_xor_i8_seq_cst:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a1, a1, 255
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    amoxor.w a1, a1, (a2)
; RV64IA-TSO-NEXT:    srlw a0, a1, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw xor ptr %a, i8 %b seq_cst
  ret i8 %1
}

define i8 @atomicrmw_max_i8_monotonic(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_max_i8_monotonic:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    lbu a3, 0(a0)
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    slli a0, a1, 24
; RV32I-NEXT:    srai s2, a0, 24
; RV32I-NEXT:    j .LBB45_2
; RV32I-NEXT:  .LBB45_1: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB45_2 Depth=1
; RV32I-NEXT:    sb a3, 15(sp)
; RV32I-NEXT:    addi a1, sp, 15
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    li a4, 0
; RV32I-NEXT:    call __atomic_compare_exchange_1@plt
; RV32I-NEXT:    lbu a3, 15(sp)
; RV32I-NEXT:    bnez a0, .LBB45_4
; RV32I-NEXT:  .LBB45_2: # %atomicrmw.start
; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32I-NEXT:    slli a0, a3, 24
; RV32I-NEXT:    srai a0, a0, 24
; RV32I-NEXT:    mv a2, a3
; RV32I-NEXT:    blt s2, a0, .LBB45_1
; RV32I-NEXT:  # %bb.3: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB45_2 Depth=1
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    j .LBB45_1
; RV32I-NEXT:  .LBB45_4: # %atomicrmw.end
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_max_i8_monotonic:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    andi a2, a0, -4
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    andi a3, a0, 24
; RV32IA-NEXT:    li a4, 255
; RV32IA-NEXT:    sll a4, a4, a0
; RV32IA-NEXT:    slli a1, a1, 24
; RV32IA-NEXT:    srai a1, a1, 24
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:    xori a3, a3, 24
; RV32IA-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w a5, (a2)
; RV32IA-NEXT:    and a7, a5, a4
; RV32IA-NEXT:    mv a6, a5
; RV32IA-NEXT:    sll a7, a7, a3
; RV32IA-NEXT:    sra a7, a7, a3
; RV32IA-NEXT:    bge a7, a1, .LBB45_3
; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
; RV32IA-NEXT:    xor a6, a5, a1
; RV32IA-NEXT:    and a6, a6, a4
; RV32IA-NEXT:    xor a6, a5, a6
; RV32IA-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
; RV32IA-NEXT:    sc.w a6, a6, (a2)
; RV32IA-NEXT:    bnez a6, .LBB45_1
; RV32IA-NEXT:  # %bb.4:
; RV32IA-NEXT:    srl a0, a5, a0
; RV32IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_max_i8_monotonic:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -48
; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    lbu a3, 0(a0)
; RV64I-NEXT:    mv s1, a1
; RV64I-NEXT:    slli a0, a1, 56
; RV64I-NEXT:    srai s2, a0, 56
; RV64I-NEXT:    j .LBB45_2
; RV64I-NEXT:  .LBB45_1: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB45_2 Depth=1
; RV64I-NEXT:    sb a3, 15(sp)
; RV64I-NEXT:    addi a1, sp, 15
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    li a4, 0
; RV64I-NEXT:    call __atomic_compare_exchange_1@plt
; RV64I-NEXT:    lbu a3, 15(sp)
; RV64I-NEXT:    bnez a0, .LBB45_4
; RV64I-NEXT:  .LBB45_2: # %atomicrmw.start
; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV64I-NEXT:    slli a0, a3, 56
; RV64I-NEXT:    srai a0, a0, 56
; RV64I-NEXT:    mv a2, a3
; RV64I-NEXT:    blt s2, a0, .LBB45_1
; RV64I-NEXT:  # %bb.3: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB45_2 Depth=1
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    j .LBB45_1
; RV64I-NEXT:  .LBB45_4: # %atomicrmw.end
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 48
; RV64I-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_max_i8_monotonic:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    andi a2, a0, -4
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    andi a3, a0, 24
; RV64IA-NEXT:    li a4, 255
; RV64IA-NEXT:    sllw a4, a4, a0
; RV64IA-NEXT:    slli a1, a1, 56
; RV64IA-NEXT:    srai a1, a1, 56
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:    xori a3, a3, 56
; RV64IA-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w a5, (a2)
; RV64IA-NEXT:    and a7, a5, a4
; RV64IA-NEXT:    mv a6, a5
; RV64IA-NEXT:    sll a7, a7, a3
; RV64IA-NEXT:    sra a7, a7, a3
; RV64IA-NEXT:    bge a7, a1, .LBB45_3
; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
; RV64IA-NEXT:    xor a6, a5, a1
; RV64IA-NEXT:    and a6, a6, a4
; RV64IA-NEXT:    xor a6, a5, a6
; RV64IA-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
; RV64IA-NEXT:    sc.w a6, a6, (a2)
; RV64IA-NEXT:    bnez a6, .LBB45_1
; RV64IA-NEXT:  # %bb.4:
; RV64IA-NEXT:    srlw a0, a5, a0
; RV64IA-NEXT:    ret
  %1 = atomicrmw max ptr %a, i8 %b monotonic
  ret i8 %1
}

define i8 @atomicrmw_max_i8_acquire(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_max_i8_acquire:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    lbu a3, 0(a0)
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    slli a0, a1, 24
; RV32I-NEXT:    srai s2, a0, 24
; RV32I-NEXT:    j .LBB46_2
; RV32I-NEXT:  .LBB46_1: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB46_2 Depth=1
; RV32I-NEXT:    sb a3, 15(sp)
; RV32I-NEXT:    addi a1, sp, 15
; RV32I-NEXT:    li a3, 2
; RV32I-NEXT:    li a4, 2
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    call __atomic_compare_exchange_1@plt
; RV32I-NEXT:    lbu a3, 15(sp)
; RV32I-NEXT:    bnez a0, .LBB46_4
; RV32I-NEXT:  .LBB46_2: # %atomicrmw.start
; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32I-NEXT:    slli a0, a3, 24
; RV32I-NEXT:    srai a0, a0, 24
; RV32I-NEXT:    mv a2, a3
; RV32I-NEXT:    blt s2, a0, .LBB46_1
; RV32I-NEXT:  # %bb.3: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB46_2 Depth=1
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    j .LBB46_1
; RV32I-NEXT:  .LBB46_4: # %atomicrmw.end
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_max_i8_acquire:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a3, a0, 24
; RV32IA-WMO-NEXT:    li a4, 255
; RV32IA-WMO-NEXT:    sll a4, a4, a0
; RV32IA-WMO-NEXT:    slli a1, a1, 24
; RV32IA-WMO-NEXT:    srai a1, a1, 24
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    xori a3, a3, 24
; RV32IA-WMO-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a5, (a2)
; RV32IA-WMO-NEXT:    and a7, a5, a4
; RV32IA-WMO-NEXT:    mv a6, a5
; RV32IA-WMO-NEXT:    sll a7, a7, a3
; RV32IA-WMO-NEXT:    sra a7, a7, a3
; RV32IA-WMO-NEXT:    bge a7, a1, .LBB46_3
; RV32IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
; RV32IA-WMO-NEXT:    xor a6, a5, a1
; RV32IA-WMO-NEXT:    and a6, a6, a4
; RV32IA-WMO-NEXT:    xor a6, a5, a6
; RV32IA-WMO-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
; RV32IA-WMO-NEXT:    sc.w a6, a6, (a2)
; RV32IA-WMO-NEXT:    bnez a6, .LBB46_1
; RV32IA-WMO-NEXT:  # %bb.4:
; RV32IA-WMO-NEXT:    srl a0, a5, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_max_i8_acquire:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a3, a0, 24
; RV32IA-TSO-NEXT:    li a4, 255
; RV32IA-TSO-NEXT:    sll a4, a4, a0
; RV32IA-TSO-NEXT:    slli a1, a1, 24
; RV32IA-TSO-NEXT:    srai a1, a1, 24
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    xori a3, a3, 24
; RV32IA-TSO-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a5, (a2)
; RV32IA-TSO-NEXT:    and a7, a5, a4
; RV32IA-TSO-NEXT:    mv a6, a5
; RV32IA-TSO-NEXT:    sll a7, a7, a3
; RV32IA-TSO-NEXT:    sra a7, a7, a3
; RV32IA-TSO-NEXT:    bge a7, a1, .LBB46_3
; RV32IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
; RV32IA-TSO-NEXT:    xor a6, a5, a1
; RV32IA-TSO-NEXT:    and a6, a6, a4
; RV32IA-TSO-NEXT:    xor a6, a5, a6
; RV32IA-TSO-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
; RV32IA-TSO-NEXT:    sc.w a6, a6, (a2)
; RV32IA-TSO-NEXT:    bnez a6, .LBB46_1
; RV32IA-TSO-NEXT:  # %bb.4:
; RV32IA-TSO-NEXT:    srl a0, a5, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_max_i8_acquire:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -48
; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    lbu a3, 0(a0)
; RV64I-NEXT:    mv s1, a1
; RV64I-NEXT:    slli a0, a1, 56
; RV64I-NEXT:    srai s2, a0, 56
; RV64I-NEXT:    j .LBB46_2
; RV64I-NEXT:  .LBB46_1: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB46_2 Depth=1
; RV64I-NEXT:    sb a3, 15(sp)
; RV64I-NEXT:    addi a1, sp, 15
; RV64I-NEXT:    li a3, 2
; RV64I-NEXT:    li a4, 2
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    call __atomic_compare_exchange_1@plt
; RV64I-NEXT:    lbu a3, 15(sp)
; RV64I-NEXT:    bnez a0, .LBB46_4
; RV64I-NEXT:  .LBB46_2: # %atomicrmw.start
; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV64I-NEXT:    slli a0, a3, 56
; RV64I-NEXT:    srai a0, a0, 56
; RV64I-NEXT:    mv a2, a3
; RV64I-NEXT:    blt s2, a0, .LBB46_1
; RV64I-NEXT:  # %bb.3: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB46_2 Depth=1
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    j .LBB46_1
; RV64I-NEXT:  .LBB46_4: # %atomicrmw.end
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 48
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_max_i8_acquire:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a3, a0, 24
; RV64IA-WMO-NEXT:    li a4, 255
; RV64IA-WMO-NEXT:    sllw a4, a4, a0
; RV64IA-WMO-NEXT:    slli a1, a1, 56
; RV64IA-WMO-NEXT:    srai a1, a1, 56
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    xori a3, a3, 56
; RV64IA-WMO-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w.aq a5, (a2)
; RV64IA-WMO-NEXT:    and a7, a5, a4
; RV64IA-WMO-NEXT:    mv a6, a5
; RV64IA-WMO-NEXT:    sll a7, a7, a3
; RV64IA-WMO-NEXT:    sra a7, a7, a3
; RV64IA-WMO-NEXT:    bge a7, a1, .LBB46_3
; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
; RV64IA-WMO-NEXT:    xor a6, a5, a1
; RV64IA-WMO-NEXT:    and a6, a6, a4
; RV64IA-WMO-NEXT:    xor a6, a5, a6
; RV64IA-WMO-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
; RV64IA-WMO-NEXT:    sc.w a6, a6, (a2)
; RV64IA-WMO-NEXT:    bnez a6, .LBB46_1
; RV64IA-WMO-NEXT:  # %bb.4:
; RV64IA-WMO-NEXT:    srlw a0, a5, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_max_i8_acquire:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a3, a0, 24
; RV64IA-TSO-NEXT:    li a4, 255
; RV64IA-TSO-NEXT:    sllw a4, a4, a0
; RV64IA-TSO-NEXT:    slli a1, a1, 56
; RV64IA-TSO-NEXT:    srai a1, a1, 56
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    xori a3, a3, 56
; RV64IA-TSO-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a5, (a2)
; RV64IA-TSO-NEXT:    and a7, a5, a4
; RV64IA-TSO-NEXT:    mv a6, a5
; RV64IA-TSO-NEXT:    sll a7, a7, a3
; RV64IA-TSO-NEXT:    sra a7, a7, a3
; RV64IA-TSO-NEXT:    bge a7, a1, .LBB46_3
; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
; RV64IA-TSO-NEXT:    xor a6, a5, a1
; RV64IA-TSO-NEXT:    and a6, a6, a4
; RV64IA-TSO-NEXT:    xor a6, a5, a6
; RV64IA-TSO-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
; RV64IA-TSO-NEXT:    bnez a6, .LBB46_1
; RV64IA-TSO-NEXT:  # %bb.4:
; RV64IA-TSO-NEXT:    srlw a0, a5, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw max ptr %a, i8 %b acquire
  ret i8 %1
}

define i8 @atomicrmw_max_i8_release(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_max_i8_release:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    lbu a3, 0(a0)
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    slli a0, a1, 24
; RV32I-NEXT:    srai s2, a0, 24
; RV32I-NEXT:    j .LBB47_2
; RV32I-NEXT:  .LBB47_1: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB47_2 Depth=1
; RV32I-NEXT:    sb a3, 15(sp)
; RV32I-NEXT:    addi a1, sp, 15
; RV32I-NEXT:    li a3, 3
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    li a4, 0
; RV32I-NEXT:    call __atomic_compare_exchange_1@plt
; RV32I-NEXT:    lbu a3, 15(sp)
; RV32I-NEXT:    bnez a0, .LBB47_4
; RV32I-NEXT:  .LBB47_2: # %atomicrmw.start
; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32I-NEXT:    slli a0, a3, 24
; RV32I-NEXT:    srai a0, a0, 24
; RV32I-NEXT:    mv a2, a3
; RV32I-NEXT:    blt s2, a0, .LBB47_1
; RV32I-NEXT:  # %bb.3: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB47_2 Depth=1
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    j .LBB47_1
; RV32I-NEXT:  .LBB47_4: # %atomicrmw.end
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_max_i8_release:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a3, a0, 24
; RV32IA-WMO-NEXT:    li a4, 255
; RV32IA-WMO-NEXT:    sll a4, a4, a0
; RV32IA-WMO-NEXT:    slli a1, a1, 24
; RV32IA-WMO-NEXT:    srai a1, a1, 24
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    xori a3, a3, 24
; RV32IA-WMO-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w a5, (a2)
; RV32IA-WMO-NEXT:    and a7, a5, a4
; RV32IA-WMO-NEXT:    mv a6, a5
; RV32IA-WMO-NEXT:    sll a7, a7, a3
; RV32IA-WMO-NEXT:    sra a7, a7, a3
; RV32IA-WMO-NEXT:    bge a7, a1, .LBB47_3
; RV32IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
; RV32IA-WMO-NEXT:    xor a6, a5, a1
; RV32IA-WMO-NEXT:    and a6, a6, a4
; RV32IA-WMO-NEXT:    xor a6, a5, a6
; RV32IA-WMO-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
; RV32IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
; RV32IA-WMO-NEXT:    bnez a6, .LBB47_1
; RV32IA-WMO-NEXT:  # %bb.4:
; RV32IA-WMO-NEXT:    srl a0, a5, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_max_i8_release:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a3, a0, 24
; RV32IA-TSO-NEXT:    li a4, 255
; RV32IA-TSO-NEXT:    sll a4, a4, a0
; RV32IA-TSO-NEXT:    slli a1, a1, 24
; RV32IA-TSO-NEXT:    srai a1, a1, 24
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    xori a3, a3, 24
; RV32IA-TSO-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a5, (a2)
; RV32IA-TSO-NEXT:    and a7, a5, a4
; RV32IA-TSO-NEXT:    mv a6, a5
; RV32IA-TSO-NEXT:    sll a7, a7, a3
; RV32IA-TSO-NEXT:    sra a7, a7, a3
; RV32IA-TSO-NEXT:    bge a7, a1, .LBB47_3
; RV32IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
; RV32IA-TSO-NEXT:    xor a6, a5, a1
; RV32IA-TSO-NEXT:    and a6, a6, a4
; RV32IA-TSO-NEXT:    xor a6, a5, a6
; RV32IA-TSO-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
; RV32IA-TSO-NEXT:    sc.w a6, a6, (a2)
; RV32IA-TSO-NEXT:    bnez a6, .LBB47_1
; RV32IA-TSO-NEXT:  # %bb.4:
; RV32IA-TSO-NEXT:    srl a0, a5, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_max_i8_release:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -48
; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    lbu a3, 0(a0)
; RV64I-NEXT:    mv s1, a1
; RV64I-NEXT:    slli a0, a1, 56
; RV64I-NEXT:    srai s2, a0, 56
; RV64I-NEXT:    j .LBB47_2
; RV64I-NEXT:  .LBB47_1: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB47_2 Depth=1
; RV64I-NEXT:    sb a3, 15(sp)
; RV64I-NEXT:    addi a1, sp, 15
; RV64I-NEXT:    li a3, 3
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    li a4, 0
; RV64I-NEXT:    call __atomic_compare_exchange_1@plt
; RV64I-NEXT:    lbu a3, 15(sp)
; RV64I-NEXT:    bnez a0, .LBB47_4
; RV64I-NEXT:  .LBB47_2: # %atomicrmw.start
; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV64I-NEXT:    slli a0, a3, 56
; RV64I-NEXT:    srai a0, a0, 56
; RV64I-NEXT:    mv a2, a3
; RV64I-NEXT:    blt s2, a0, .LBB47_1
; RV64I-NEXT:  # %bb.3: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB47_2 Depth=1
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    j .LBB47_1
; RV64I-NEXT:  .LBB47_4: # %atomicrmw.end
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 48
; RV64I-NEXT:    ret
;
; RV64IA-WMO-LABEL: atomicrmw_max_i8_release:
; RV64IA-WMO:       # %bb.0:
; RV64IA-WMO-NEXT:    andi a2, a0, -4
; RV64IA-WMO-NEXT:    slli a0, a0, 3
; RV64IA-WMO-NEXT:    andi a3, a0, 24
; RV64IA-WMO-NEXT:    li a4, 255
; RV64IA-WMO-NEXT:    sllw a4, a4, a0
; RV64IA-WMO-NEXT:    slli a1, a1, 56
; RV64IA-WMO-NEXT:    srai a1, a1, 56
; RV64IA-WMO-NEXT:    sllw a1, a1, a0
; RV64IA-WMO-NEXT:    xori a3, a3, 56
; RV64IA-WMO-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
; RV64IA-WMO-NEXT:    lr.w a5, (a2)
; RV64IA-WMO-NEXT:    and a7, a5, a4
; RV64IA-WMO-NEXT:    mv a6, a5
; RV64IA-WMO-NEXT:    sll a7, a7, a3
; RV64IA-WMO-NEXT:    sra a7, a7, a3
; RV64IA-WMO-NEXT:    bge a7, a1, .LBB47_3
; RV64IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
; RV64IA-WMO-NEXT:    xor a6, a5, a1
; RV64IA-WMO-NEXT:    and a6, a6, a4
; RV64IA-WMO-NEXT:    xor a6, a5, a6
; RV64IA-WMO-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
; RV64IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
; RV64IA-WMO-NEXT:    bnez a6, .LBB47_1
; RV64IA-WMO-NEXT:  # %bb.4:
; RV64IA-WMO-NEXT:    srlw a0, a5, a0
; RV64IA-WMO-NEXT:    ret
;
; RV64IA-TSO-LABEL: atomicrmw_max_i8_release:
; RV64IA-TSO:       # %bb.0:
; RV64IA-TSO-NEXT:    andi a2, a0, -4
; RV64IA-TSO-NEXT:    slli a0, a0, 3
; RV64IA-TSO-NEXT:    andi a3, a0, 24
; RV64IA-TSO-NEXT:    li a4, 255
; RV64IA-TSO-NEXT:    sllw a4, a4, a0
; RV64IA-TSO-NEXT:    slli a1, a1, 56
; RV64IA-TSO-NEXT:    srai a1, a1, 56
; RV64IA-TSO-NEXT:    sllw a1, a1, a0
; RV64IA-TSO-NEXT:    xori a3, a3, 56
; RV64IA-TSO-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
; RV64IA-TSO-NEXT:    lr.w a5, (a2)
; RV64IA-TSO-NEXT:    and a7, a5, a4
; RV64IA-TSO-NEXT:    mv a6, a5
; RV64IA-TSO-NEXT:    sll a7, a7, a3
; RV64IA-TSO-NEXT:    sra a7, a7, a3
; RV64IA-TSO-NEXT:    bge a7, a1, .LBB47_3
; RV64IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
; RV64IA-TSO-NEXT:    xor a6, a5, a1
; RV64IA-TSO-NEXT:    and a6, a6, a4
; RV64IA-TSO-NEXT:    xor a6, a5, a6
; RV64IA-TSO-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
; RV64IA-TSO-NEXT:    sc.w a6, a6, (a2)
; RV64IA-TSO-NEXT:    bnez a6, .LBB47_1
; RV64IA-TSO-NEXT:  # %bb.4:
; RV64IA-TSO-NEXT:    srlw a0, a5, a0
; RV64IA-TSO-NEXT:    ret
  %1 = atomicrmw max ptr %a, i8 %b release
  ret i8 %1
}

define i8 @atomicrmw_max_i8_acq_rel(ptr %a, i8 %b) nounwind {
; RV32I-LABEL: atomicrmw_max_i8_acq_rel:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    lbu a3, 0(a0)
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    slli a0, a1, 24
; RV32I-NEXT:    srai s2, a0, 24
; RV32I-NEXT:    j .LBB48_2
; RV32I-NEXT:  .LBB48_1: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB48_2 Depth=1
; RV32I-NEXT:    sb a3, 15(sp)
; RV32I-NEXT:    addi a1, sp, 15
; RV32I-NEXT:    li a3, 4
; RV32I-NEXT:    li a4, 2
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    call __atomic_compare_exchange_1@plt
; RV32I-NEXT:    lbu a3, 15(sp)
; RV32I-NEXT:    bnez a0, .LBB48_4
; RV32I-NEXT:  .LBB48_2: # %atomicrmw.start
; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32I-NEXT:    slli a0, a3, 24
; RV32I-NEXT:    srai a0, a0, 24
; RV32I-NEXT:    mv a2, a3
; RV32I-NEXT:    blt s2, a0, .LBB48_1
; RV32I-NEXT:  # %bb.3: # %atomicrmw.start
; RV32I-NEXT:    # in Loop: Header=BB48_2 Depth=1
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    j .LBB48_1
; RV32I-NEXT:  .LBB48_4: # %atomicrmw.end
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV32IA-WMO-LABEL: atomicrmw_max_i8_acq_rel:
; RV32IA-WMO:       # %bb.0:
; RV32IA-WMO-NEXT:    andi a2, a0, -4
; RV32IA-WMO-NEXT:    slli a0, a0, 3
; RV32IA-WMO-NEXT:    andi a3, a0, 24
; RV32IA-WMO-NEXT:    li a4, 255
; RV32IA-WMO-NEXT:    sll a4, a4, a0
; RV32IA-WMO-NEXT:    slli a1, a1, 24
; RV32IA-WMO-NEXT:    srai a1, a1, 24
; RV32IA-WMO-NEXT:    sll a1, a1, a0
; RV32IA-WMO-NEXT:    xori a3, a3, 24
; RV32IA-WMO-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
; RV32IA-WMO-NEXT:    lr.w.aq a5, (a2)
; RV32IA-WMO-NEXT:    and a7, a5, a4
; RV32IA-WMO-NEXT:    mv a6, a5
; RV32IA-WMO-NEXT:    sll a7, a7, a3
; RV32IA-WMO-NEXT:    sra a7, a7, a3
; RV32IA-WMO-NEXT:    bge a7, a1, .LBB48_3
; RV32IA-WMO-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
; RV32IA-WMO-NEXT:    xor a6, a5, a1
; RV32IA-WMO-NEXT:    and a6, a6, a4
; RV32IA-WMO-NEXT:    xor a6, a5, a6
; RV32IA-WMO-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
; RV32IA-WMO-NEXT:    sc.w.rl a6, a6, (a2)
; RV32IA-WMO-NEXT:    bnez a6, .LBB48_1
; RV32IA-WMO-NEXT:  # %bb.4:
; RV32IA-WMO-NEXT:    srl a0, a5, a0
; RV32IA-WMO-NEXT:    ret
;
; RV32IA-TSO-LABEL: atomicrmw_max_i8_acq_rel:
; RV32IA-TSO:       # %bb.0:
; RV32IA-TSO-NEXT:    andi a2, a0, -4
; RV32IA-TSO-NEXT:    slli a0, a0, 3
; RV32IA-TSO-NEXT:    andi a3, a0, 24
; RV32IA-TSO-NEXT:    li a4, 255
; RV32IA-TSO-NEXT:    sll a4, a4, a0
; RV32IA-TSO-NEXT:    slli a1, a1, 24
; RV32IA-TSO-NEXT:    srai a1, a1, 24
; RV32IA-TSO-NEXT:    sll a1, a1, a0
; RV32IA-TSO-NEXT:    xori a3, a3, 24
; RV32IA-TSO-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
; RV32IA-TSO-NEXT:    lr.w a5, (a2)
; RV32IA-TSO-NEXT:    and a7, a5, a4
; RV32IA-TSO-NEXT:    mv a6, a5
; RV32IA-TSO-NEXT:    sll a7, a7, a3
; RV32IA-TSO-NEXT:    sra a7, a7, a3
; RV32IA-TSO-NEXT:    bge a7, a1, .LBB48_3
; RV32IA-TSO-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
; RV32IA-TSO-NEXT:    xor a6, a5, a1
; RV32IA-TSO-NEXT:    and a6, a6, a4
; RV32IA-TSO-NEXT:    xor a6, a5, a6
; RV32IA-TSO-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
; RV32IA-TSO-NEXT:    sc.w a6, a6, (a2)
; RV32IA-TSO-NEXT:    bnez a6, .LBB48_1
; RV32IA-TSO-NEXT:  # %bb.4:
; RV32IA-TSO-NEXT:    srl a0, a5, a0
; RV32IA-TSO-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_max_i8_acq_rel:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -48
; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    lbu a3, 0(a0)
; RV64I-NEXT:    mv s1, a1
; RV64I-NEXT:    slli a0, a1, 56
; RV64I-NEXT:    srai s2, a0, 56
; RV64I-NEXT:    j .LBB48_2
; RV64I-NEXT:  .LBB48_1: # %atomicrmw.start
; RV64I-NEXT:    # in Loop: Header=BB48_2 Depth=1
; RV64I-NEXT:    sb a3, 15(sp)
; RV64I-NEXT:    addi a1, sp, 15
; RV64I-NEXT:    li a3, 4
; RV64I-NEXT:    li a4, 2
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    call __atomic_compare_exchange_1@plt
; RV64I-NEXT:    lbu a3, 15(sp)
; RV64I-NEXT:    bnez a0, .LBB48_4
; RV64I-NEXT:  .LBB48_2: # %atomicrmw.start
; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
; RV64I-NEXT:    slli a0, a3, 56