)]}'
{
  "commit": "df211bc0eec9bc344c21faf55103e8ab7ebb309a",
  "tree": "2c77602071fd34b3c9c10f52292410da1245fe2b",
  "parents": [
    "3bc8af8352c3783ae4d3cd3ca6bc4237aecf79a1"
  ],
  "author": {
    "name": "Matt Arsenault",
    "email": "Matthew.Arsenault@amd.com",
    "time": "Tue Mar 28 08:30:50 2023 -0400"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Sun Oct 01 01:42:27 2023 -0700"
  },
  "message": "InlineSpiller: Consider if all subranges are the same when avoiding redundant spills\n\nThis avoids some redundant spills of subranges, and avoids a compile failure.\nThis greatly reduces the numbers of spills in a loop.\n\nThe main range is not informative when multiple instructions are needed to fully define\na register. A common scenario is a lowered reg_sequence where every subregister\nis sequentially defined, but each def changes the main range\u0027s value number. If\nwe look at specific lanes at the use index, we can see the value is actually the\nsame.\n\nIn this testcase, there are a large number of materialized 64-bit constant defs\nwhich are hoisted outside of the loop by MachineLICM. These are feeding REG_SEQUENCES,\nwhich is not considered rematerializable inside the loop. After coalescing, the split\nconstant defs produce main ranges with an apparent phi def. There\u0027s no phi def if you look\nat each individual subrange, and only half of the register is really redefined to a constant.\n\nFixes: SWDEV-380865\n\nhttps://reviews.llvm.org/D147079\n\nGitOrigin-RevId: d8127b2ba8a87a610851b9a462f2fc2526c36e37\n",
  "tree_diff": [
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