)]}'
{
  "id": "d08cfd28d0abda7934a8fd0d7f91589faebb84d0",
  "repo": "llvm-project/llvm",
  "revision": "daefd4c3e5ce67c47c331de8e57763b793150fef",
  "path": "test/CodeGen/AMDGPU/schedule-barrier.mir"
}