)]}'
{
  "id": "acfd1b60ff3afd12ffef663703bae7deaf5b1a98",
  "repo": "llvm-project/llvm",
  "revision": "daefd4c3e5ce67c47c331de8e57763b793150fef",
  "path": "docs/AMDGPUOperandSyntax.rst"
}